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authorLennert Buytenhek <buytenh@wantstofly.org>2006-03-22 15:14:11 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-03-22 15:14:11 -0500
commita04f2d9d3a08002a7712f18fcec43e2c4151d953 (patch)
treed65e921b8f64b4ea7b61bc61db931892a680243d /include/asm-arm/arch-ixp2000
parent709eb502ebcfcca8a3a36bab3bca3bd78caa53b1 (diff)
[ARM] 3381/1: ixp2000: fix slowport write timing control register fields
Patch from Lennert Buytenhek The original version of the chip docs had the PW and SU fields in the slowport write timing control register accidentally reversed. This is mentioned in the errata (documentation change #4) and fixed in newer docs. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ixp2000')
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index 2b57f91b4ebd..ccae4bec92c5 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -353,8 +353,8 @@
353 * Masks and shifts for various fields in the WTC and RTC registers. 353 * Masks and shifts for various fields in the WTC and RTC registers.
354 */ 354 */
355#define SLOWPORT_WRTC_MASK_HD 0x0003 355#define SLOWPORT_WRTC_MASK_HD 0x0003
356#define SLOWPORT_WRTC_MASK_SU 0x003c 356#define SLOWPORT_WRTC_MASK_PW 0x003c
357#define SLOWPORT_WRTC_MASK_PW 0x03c0 357#define SLOWPORT_WRTC_MASK_SU 0x03c0
358 358
359#define SLOWPORT_WRTC_SHIFT_HD 0x00 359#define SLOWPORT_WRTC_SHIFT_HD 0x00
360#define SLOWPORT_WRTC_SHIFT_SU 0x02 360#define SLOWPORT_WRTC_SHIFT_SU 0x02