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authorLinus Torvalds <torvalds@g5.osdl.org>2005-11-02 00:32:14 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2005-11-02 00:32:14 -0500
commit7f36b1e9582c06d0ddef5f2416c9b17017647d1f (patch)
treef83cbcef623476b9b8a14f7a0cc66eb92552a651 /include/asm-arm/arch-ixp2000/ixp2000-regs.h
parent0e016b9fa134d79341cca5e336ccbcea066d5f81 (diff)
parent73ee723e4c6d179c2e9496cc4caf160a18d95603 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Diffstat (limited to 'include/asm-arm/arch-ixp2000/ixp2000-regs.h')
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h7
1 files changed, 4 insertions, 3 deletions
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index def089d693d2..fc5ac6aec4f2 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -59,14 +59,15 @@
59#define IXP2000_CAP_SIZE 0x00100000 59#define IXP2000_CAP_SIZE 0x00100000
60 60
61/* 61/*
62 * Addresses for specific on-chip peripherals 62 * Addresses for specific on-chip peripherals.
63 */ 63 */
64#define IXP2000_SLOWPORT_CSR_VIRT_BASE 0xfef80000 64#define IXP2000_SLOWPORT_CSR_VIRT_BASE 0xfef80000
65#define IXP2000_GLOBAL_REG_VIRT_BASE 0xfef04000 65#define IXP2000_GLOBAL_REG_VIRT_BASE 0xfef04000
66#define IXP2000_UART_PHYS_BASE 0xc0030000 66#define IXP2000_UART_PHYS_BASE 0xc0030000
67#define IXP2000_UART_VIRT_BASE 0xfef30000 67#define IXP2000_UART_VIRT_BASE 0xfef30000
68#define IXP2000_TIMER_VIRT_BASE 0xfef20000 68#define IXP2000_TIMER_VIRT_BASE 0xfef20000
69#define IXP2000_GPIO_VIRT_BASE 0Xfef10000 69#define IXP2000_UENGINE_CSR_VIRT_BASE 0xfef18000
70#define IXP2000_GPIO_VIRT_BASE 0xfef10000
70 71
71/* 72/*
72 * Devices outside of the 0xc0000000 -> 0xc0100000 range. The virtual 73 * Devices outside of the 0xc0000000 -> 0xc0100000 range. The virtual
@@ -252,7 +253,7 @@
252#define IXP2000_PCI_XSCALE_INT_ENABLE IXP2000_PCI_CSR(0x15C) 253#define IXP2000_PCI_XSCALE_INT_ENABLE IXP2000_PCI_CSR(0x15C)
253 254
254#define IXP2000_PCICNTL_PNR (1<<17) /* PCI not Reset bit of PCI_CONTROL */ 255#define IXP2000_PCICNTL_PNR (1<<17) /* PCI not Reset bit of PCI_CONTROL */
255#define IXP2000_PCICNTL_PCF (1<<28) /* PCI Centrolfunction bit */ 256#define IXP2000_PCICNTL_PCF (1<<28) /* PCI Central function bit */
256#define IXP2000_XSCALE_INT (1<<1) /* Interrupt from XScale to PCI */ 257#define IXP2000_XSCALE_INT (1<<1) /* Interrupt from XScale to PCI */
257 258
258/* These are from the IRQ register in the PCI ISR register */ 259/* These are from the IRQ register in the PCI ISR register */