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authorLennert Buytenhek <buytenh@wantstofly.org>2005-06-25 14:30:04 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2005-06-25 14:30:04 -0400
commit321ab6a5fab812658626aee6bce2617f8cfb3a55 (patch)
tree4e8d828a52bba4c3ab30413f51eedbb50c86b7c5 /include/asm-arm/arch-ixp2000/ixp2000-regs.h
parent3cd9e19ebc91593c9f076410d6f979be188f01a0 (diff)
[PATCH] ARM: 2752/1: disable ixp2000 PCI I/O software workaround on chips that don't need it
Patch from Lennert Buytenhek The later ixp2000 models don't need the PCI I/O workaround that we currently perform. Add a config option to disable the workaround, and panic on boot if a kernel without the workaround is booted on a buggy chip. As only pre-production ixp2000s need the workaround, the default is for it not to be configured in. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Deepak Saxena Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ixp2000/ixp2000-regs.h')
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index a1d9e181b10f..5eb47d4bfbf6 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -241,7 +241,7 @@
241#define PCI_CONTROL_BE_DEI (1 << 21) /* Big Endian Data Enable In */ 241#define PCI_CONTROL_BE_DEI (1 << 21) /* Big Endian Data Enable In */
242#define PCI_CONTROL_BE_BEO (1 << 20) /* Big Endian Byte Enable Out */ 242#define PCI_CONTROL_BE_BEO (1 << 20) /* Big Endian Byte Enable Out */
243#define PCI_CONTROL_BE_BEI (1 << 19) /* Big Endian Byte Enable In */ 243#define PCI_CONTROL_BE_BEI (1 << 19) /* Big Endian Byte Enable In */
244#define PCI_CONTROL_PNR (1 << 17) /* PCI Not Reset bit */ 244#define PCI_CONTROL_IEE (1 << 17) /* I/O cycle Endian swap Enable */
245 245
246#define IXP2000_PCI_RST_REL (1 << 2) 246#define IXP2000_PCI_RST_REL (1 << 2)
247#define CFG_RST_DIR (*IXP2000_PCI_CONTROL & IXP2000_PCICNTL_PCF) 247#define CFG_RST_DIR (*IXP2000_PCI_CONTROL & IXP2000_PCICNTL_PCF)