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authorLinus Torvalds <torvalds@g5.osdl.org>2006-09-28 17:40:39 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-28 17:40:39 -0400
commitebdea46fecae40c4d7effcd33f40918a37a1df4b (patch)
treee4312bf7f1f3d184738963a0ec300aa9fdfd55c1 /include/asm-arm/arch-iop3xx/entry-macro.S
parentfecf3404f4aba6d0edeba31eeb018cbb6326dff2 (diff)
parent250d375d1da45a5e08ab8baf5eaa7eb258afd82b (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (130 commits) [ARM] 3856/1: Add clocksource for Intel IXP4xx platforms [ARM] 3855/1: Add generic time support [ARM] 3873/1: S3C24XX: Add irq_chip names [ARM] 3872/1: S3C24XX: Apply consistant tabbing to irq_chips [ARM] 3871/1: S3C24XX: Fix ordering of EINT4..23 [ARM] nommu: confirms the CR_V bit in nommu mode [ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores. [ARM] 3870/1: AT91: Start removing static memory mappings [ARM] 3869/1: AT91: NAND support for DK and KB9202 boards [ARM] 3868/1: AT91 hardware header update [ARM] 3867/1: AT91 GPIO update [ARM] 3866/1: AT91 clock update [ARM] 3865/1: AT91RM9200 header updates [ARM] 3862/2: S3C2410 - add basic power management support for AML M5900 series [ARM] kthread: switch arch/arm/kernel/apm.c [ARM] Off-by-one in arch/arm/common/icst* [ARM] 3864/1: Refactore sharpsl_pm [ARM] 3863/1: Add Locomo SPI Device [ARM] 3847/2: Convert LOMOMO to use struct device for GPIOs [ARM] Use CPU_CACHE_* where possible in asm/cacheflush.h ...
Diffstat (limited to 'include/asm-arm/arch-iop3xx/entry-macro.S')
-rw-r--r--include/asm-arm/arch-iop3xx/entry-macro.S57
1 files changed, 0 insertions, 57 deletions
diff --git a/include/asm-arm/arch-iop3xx/entry-macro.S b/include/asm-arm/arch-iop3xx/entry-macro.S
deleted file mode 100644
index 926668c098a5..000000000000
--- a/include/asm-arm/arch-iop3xx/entry-macro.S
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * include/asm-arm/arch-iop3xx/entry-macro.S
3 *
4 * Low-level IRQ helper macros for IOP3xx-based platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10#include <asm/arch/irqs.h>
11
12#if defined(CONFIG_ARCH_IOP321)
13 .macro disable_fiq
14 .endm
15
16 /*
17 * Note: only deal with normal interrupts, not FIQ
18 */
19 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
20 mov \irqnr, #0
21 mrc p6, 0, \irqstat, c8, c0, 0 @ Read IINTSRC
22 cmp \irqstat, #0
23 beq 1001f
24 clz \irqnr, \irqstat
25 mov \base, #31
26 subs \irqnr,\base,\irqnr
27 add \irqnr,\irqnr,#IRQ_IOP321_DMA0_EOT
281001:
29 .endm
30
31#elif defined(CONFIG_ARCH_IOP331)
32 .macro disable_fiq
33 .endm
34
35 /*
36 * Note: only deal with normal interrupts, not FIQ
37 */
38 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
39 mov \irqnr, #0
40 mrc p6, 0, \irqstat, c4, c0, 0 @ Read IINTSRC0
41 cmp \irqstat, #0
42 bne 1002f
43 mrc p6, 0, \irqstat, c5, c0, 0 @ Read IINTSRC1
44 cmp \irqstat, #0
45 beq 1001f
46 clz \irqnr, \irqstat
47 rsbs \irqnr,\irqnr,#31 @ recommend by RMK
48 add \irqnr,\irqnr,#IRQ_IOP331_XINT8
49 b 1001f
501002: clz \irqnr, \irqstat
51 rsbs \irqnr,\irqnr,#31 @ recommend by RMK
52 add \irqnr,\irqnr,#IRQ_IOP331_DMA0_EOT
531001:
54 .endm
55
56#endif
57