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authorLinus Torvalds <torvalds@g5.osdl.org>2006-09-28 17:40:39 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-28 17:40:39 -0400
commitebdea46fecae40c4d7effcd33f40918a37a1df4b (patch)
treee4312bf7f1f3d184738963a0ec300aa9fdfd55c1 /include/asm-arm/arch-iop33x/uncompress.h
parentfecf3404f4aba6d0edeba31eeb018cbb6326dff2 (diff)
parent250d375d1da45a5e08ab8baf5eaa7eb258afd82b (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (130 commits) [ARM] 3856/1: Add clocksource for Intel IXP4xx platforms [ARM] 3855/1: Add generic time support [ARM] 3873/1: S3C24XX: Add irq_chip names [ARM] 3872/1: S3C24XX: Apply consistant tabbing to irq_chips [ARM] 3871/1: S3C24XX: Fix ordering of EINT4..23 [ARM] nommu: confirms the CR_V bit in nommu mode [ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores. [ARM] 3870/1: AT91: Start removing static memory mappings [ARM] 3869/1: AT91: NAND support for DK and KB9202 boards [ARM] 3868/1: AT91 hardware header update [ARM] 3867/1: AT91 GPIO update [ARM] 3866/1: AT91 clock update [ARM] 3865/1: AT91RM9200 header updates [ARM] 3862/2: S3C2410 - add basic power management support for AML M5900 series [ARM] kthread: switch arch/arm/kernel/apm.c [ARM] Off-by-one in arch/arm/common/icst* [ARM] 3864/1: Refactore sharpsl_pm [ARM] 3863/1: Add Locomo SPI Device [ARM] 3847/2: Convert LOMOMO to use struct device for GPIOs [ARM] Use CPU_CACHE_* where possible in asm/cacheflush.h ...
Diffstat (limited to 'include/asm-arm/arch-iop33x/uncompress.h')
-rw-r--r--include/asm-arm/arch-iop33x/uncompress.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/include/asm-arm/arch-iop33x/uncompress.h b/include/asm-arm/arch-iop33x/uncompress.h
new file mode 100644
index 000000000000..e17fbc05877b
--- /dev/null
+++ b/include/asm-arm/arch-iop33x/uncompress.h
@@ -0,0 +1,37 @@
1/*
2 * include/asm-arm/arch-iop33x/uncompress.h
3 */
4
5#include <asm/types.h>
6#include <asm/mach-types.h>
7#include <linux/serial_reg.h>
8#include <asm/hardware.h>
9
10static volatile u32 *uart_base;
11
12#define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE)
13
14static inline void putc(char c)
15{
16 while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE)
17 barrier();
18 uart_base[UART_TX] = c;
19}
20
21static inline void flush(void)
22{
23}
24
25static __inline__ void __arch_decomp_setup(unsigned long arch_id)
26{
27 if (machine_is_iq80331() || machine_is_iq80332())
28 uart_base = (volatile u32 *)IOP33X_UART0_PHYS;
29 else
30 uart_base = (volatile u32 *)0xfe800000;
31}
32
33/*
34 * nothing to do
35 */
36#define arch_decomp_setup() __arch_decomp_setup(arch_id)
37#define arch_decomp_wdog()