diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2006-09-18 18:26:25 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-25 05:25:53 -0400 |
commit | c852ac80440db9b0a47f48578e9c6303078abbc1 (patch) | |
tree | 0c7fc1ca7700b0196a20242ca306003db7e35fb6 /include/asm-arm/arch-iop33x/irqs.h | |
parent | 475549faa161f4e002225f2ef75fdd2a6d83d151 (diff) |
[ARM] 3832/1: iop3xx: coding style cleanup
Since the iop32x code isn't iop321-specific, and the iop33x code isn't
iop331-specfic, do a s/iop321/iop32x/ and s/iop331/iop33x/, and tidy up
the code to conform to the coding style guidelines somewhat better.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-iop33x/irqs.h')
-rw-r--r-- | include/asm-arm/arch-iop33x/irqs.h | 86 |
1 files changed, 43 insertions, 43 deletions
diff --git a/include/asm-arm/arch-iop33x/irqs.h b/include/asm-arm/arch-iop33x/irqs.h index a875404a07fc..d045f8403396 100644 --- a/include/asm-arm/arch-iop33x/irqs.h +++ b/include/asm-arm/arch-iop33x/irqs.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm-arm/arch-iop33x/irqs.h | 2 | * include/asm-arm/arch-iop33x/irqs.h |
3 | * | 3 | * |
4 | * Author: Dave Jiang (dave.jiang@intel.com) | 4 | * Author: Dave Jiang (dave.jiang@intel.com) |
5 | * Copyright: (C) 2003 Intel Corp. | 5 | * Copyright: (C) 2003 Intel Corp. |
@@ -7,54 +7,54 @@ | |||
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | * | ||
11 | */ | 10 | */ |
12 | #ifndef _IRQS_H_ | 11 | |
13 | #define _IRQS_H_ | 12 | #ifndef __IRQS_H |
13 | #define __IRQS_H | ||
14 | 14 | ||
15 | /* | 15 | /* |
16 | * IOP80331 chipset interrupts | 16 | * IOP80331 chipset interrupts |
17 | */ | 17 | */ |
18 | #define IRQ_IOP331_DMA0_EOT 0 | 18 | #define IRQ_IOP33X_DMA0_EOT 0 |
19 | #define IRQ_IOP331_DMA0_EOC 1 | 19 | #define IRQ_IOP33X_DMA0_EOC 1 |
20 | #define IRQ_IOP331_DMA1_EOT 2 | 20 | #define IRQ_IOP33X_DMA1_EOT 2 |
21 | #define IRQ_IOP331_DMA1_EOC 3 | 21 | #define IRQ_IOP33X_DMA1_EOC 3 |
22 | #define IRQ_IOP331_AA_EOT 6 | 22 | #define IRQ_IOP33X_AA_EOT 6 |
23 | #define IRQ_IOP331_AA_EOC 7 | 23 | #define IRQ_IOP33X_AA_EOC 7 |
24 | #define IRQ_IOP331_TIMER0 8 | 24 | #define IRQ_IOP33X_TIMER0 8 |
25 | #define IRQ_IOP331_TIMER1 9 | 25 | #define IRQ_IOP33X_TIMER1 9 |
26 | #define IRQ_IOP331_I2C_0 10 | 26 | #define IRQ_IOP33X_I2C_0 10 |
27 | #define IRQ_IOP331_I2C_1 11 | 27 | #define IRQ_IOP33X_I2C_1 11 |
28 | #define IRQ_IOP331_MSG 12 | 28 | #define IRQ_IOP33X_MSG 12 |
29 | #define IRQ_IOP331_MSGIBQ 13 | 29 | #define IRQ_IOP33X_MSGIBQ 13 |
30 | #define IRQ_IOP331_ATU_BIST 14 | 30 | #define IRQ_IOP33X_ATU_BIST 14 |
31 | #define IRQ_IOP331_PERFMON 15 | 31 | #define IRQ_IOP33X_PERFMON 15 |
32 | #define IRQ_IOP331_CORE_PMU 16 | 32 | #define IRQ_IOP33X_CORE_PMU 16 |
33 | #define IRQ_IOP331_XINT0 24 | 33 | #define IRQ_IOP33X_XINT0 24 |
34 | #define IRQ_IOP331_XINT1 25 | 34 | #define IRQ_IOP33X_XINT1 25 |
35 | #define IRQ_IOP331_XINT2 26 | 35 | #define IRQ_IOP33X_XINT2 26 |
36 | #define IRQ_IOP331_XINT3 27 | 36 | #define IRQ_IOP33X_XINT3 27 |
37 | #define IRQ_IOP331_XINT8 32 | 37 | #define IRQ_IOP33X_XINT8 32 |
38 | #define IRQ_IOP331_XINT9 33 | 38 | #define IRQ_IOP33X_XINT9 33 |
39 | #define IRQ_IOP331_XINT10 34 | 39 | #define IRQ_IOP33X_XINT10 34 |
40 | #define IRQ_IOP331_XINT11 35 | 40 | #define IRQ_IOP33X_XINT11 35 |
41 | #define IRQ_IOP331_XINT12 36 | 41 | #define IRQ_IOP33X_XINT12 36 |
42 | #define IRQ_IOP331_XINT13 37 | 42 | #define IRQ_IOP33X_XINT13 37 |
43 | #define IRQ_IOP331_XINT14 38 | 43 | #define IRQ_IOP33X_XINT14 38 |
44 | #define IRQ_IOP331_XINT15 39 | 44 | #define IRQ_IOP33X_XINT15 39 |
45 | #define IRQ_IOP331_UART0 51 | 45 | #define IRQ_IOP33X_UART0 51 |
46 | #define IRQ_IOP331_UART1 52 | 46 | #define IRQ_IOP33X_UART1 52 |
47 | #define IRQ_IOP331_PBIE 53 | 47 | #define IRQ_IOP33X_PBIE 53 |
48 | #define IRQ_IOP331_ATU_CRW 54 | 48 | #define IRQ_IOP33X_ATU_CRW 54 |
49 | #define IRQ_IOP331_ATU_ERR 55 | 49 | #define IRQ_IOP33X_ATU_ERR 55 |
50 | #define IRQ_IOP331_MCU_ERR 56 | 50 | #define IRQ_IOP33X_MCU_ERR 56 |
51 | #define IRQ_IOP331_DMA0_ERR 57 | 51 | #define IRQ_IOP33X_DMA0_ERR 57 |
52 | #define IRQ_IOP331_DMA1_ERR 58 | 52 | #define IRQ_IOP33X_DMA1_ERR 58 |
53 | #define IRQ_IOP331_AA_ERR 60 | 53 | #define IRQ_IOP33X_AA_ERR 60 |
54 | #define IRQ_IOP331_MSG_ERR 62 | 54 | #define IRQ_IOP33X_MSG_ERR 62 |
55 | #define IRQ_IOP331_HPI 63 | 55 | #define IRQ_IOP33X_HPI 63 |
56 | 56 | ||
57 | #define NR_IRQS 64 | 57 | #define NR_IRQS 64 |
58 | 58 | ||
59 | 59 | ||
60 | #endif // _IRQ_H_ | 60 | #endif |