[ARM] 3829/1: iop3xx: optimise irq entry macros

Squeeze three instructions out of the iop32x irq demuxer, and nine
out of the iop33x irq demuxer by using the hardware vector generator.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 3 insertions, 7 deletions

diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S
index c5ec1e23cbea..3497fef0b890 100644
--- a/include/asm-arm/arch-iop32x/entry-macro.S
+++ b/include/asm-arm/arch-iop32x/entry-macro.S
@@ -16,13 +16,9 @@
                  * Note: only deal with normal interrupts, not FIQ
                  */
                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                mov     \irqnr, #0
                 ldr     \base, =IOP3XX_REG_ADDR(0x07D8)
                 ldr     \irqstat, [\base]               @ Read IINTSRC
-                cmp     \irqstat, #0
-                beq     1001f
-                clz     \irqnr, \irqstat
-                mov     \base, #31
-                subs    \irqnr,\base,\irqnr
-1001:
+                cmp     \irqstat, #0
+                clzne   \irqnr, \irqstat
+                rsbne   \irqnr, \irqnr, #31
                 .endm