diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2006-09-18 18:26:25 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-09-25 05:25:53 -0400 |
commit | c852ac80440db9b0a47f48578e9c6303078abbc1 (patch) | |
tree | 0c7fc1ca7700b0196a20242ca306003db7e35fb6 /include/asm-arm/arch-iop32x | |
parent | 475549faa161f4e002225f2ef75fdd2a6d83d151 (diff) |
[ARM] 3832/1: iop3xx: coding style cleanup
Since the iop32x code isn't iop321-specific, and the iop33x code isn't
iop331-specfic, do a s/iop321/iop32x/ and s/iop331/iop33x/, and tidy up
the code to conform to the coding style guidelines somewhat better.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-iop32x')
-rw-r--r-- | include/asm-arm/arch-iop32x/debug-macro.S | 14 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/dma.h | 4 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/entry-macro.S | 11 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/hardware.h | 24 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/io.h | 11 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/iop321.h | 86 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/iop32x.h | 28 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/iq31244.h | 8 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/iq80321.h | 8 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/irqs.h | 66 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/memory.h | 7 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/system.h | 17 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/timex.h | 5 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/uncompress.h | 7 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/vmalloc.h | 15 |
15 files changed, 119 insertions, 192 deletions
diff --git a/include/asm-arm/arch-iop32x/debug-macro.S b/include/asm-arm/arch-iop32x/debug-macro.S index 75ab2e0d8c67..9022b6849e23 100644 --- a/include/asm-arm/arch-iop32x/debug-macro.S +++ b/include/asm-arm/arch-iop32x/debug-macro.S | |||
@@ -1,18 +1,18 @@ | |||
1 | /* linux/include/asm-arm/arch-iop32x/debug-macro.S | 1 | /* |
2 | * include/asm-arm/arch-iop32x/debug-macro.S | ||
2 | * | 3 | * |
3 | * Debugging macro include header | 4 | * Debugging macro include header |
4 | * | 5 | * |
5 | * Copyright (C) 1994-1999 Russell King | 6 | * Copyright (C) 1994-1999 Russell King |
6 | * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks | 7 | * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks |
7 | * | 8 | * |
8 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 10 | * it under the terms of the GNU General Public License version 2 as |
10 | * published by the Free Software Foundation. | 11 | * published by the Free Software Foundation. |
11 | * | 12 | */ |
12 | */ | ||
13 | 13 | ||
14 | .macro addruart,rx | 14 | .macro addruart, rx |
15 | mov \rx, #0xfe000000 @ physical | 15 | mov \rx, #0xfe000000 @ physical as well as virtual |
16 | orr \rx, \rx, #0x00800000 @ location of the UART | 16 | orr \rx, \rx, #0x00800000 @ location of the UART |
17 | .endm | 17 | .endm |
18 | 18 | ||
diff --git a/include/asm-arm/arch-iop32x/dma.h b/include/asm-arm/arch-iop32x/dma.h index 5be36676e58f..e977a9ef3160 100644 --- a/include/asm-arm/arch-iop32x/dma.h +++ b/include/asm-arm/arch-iop32x/dma.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm-arm/arch-iop32x/dma.h | 2 | * include/asm-arm/arch-iop32x/dma.h |
3 | * | 3 | * |
4 | * Copyright (C) 2004 Intel Corp. | 4 | * Copyright (C) 2004 Intel Corp. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S index 3497fef0b890..1500cbbd2295 100644 --- a/include/asm-arm/arch-iop32x/entry-macro.S +++ b/include/asm-arm/arch-iop32x/entry-macro.S | |||
@@ -3,19 +3,16 @@ | |||
3 | * | 3 | * |
4 | * Low-level IRQ helper macros for IOP32x-based platforms | 4 | * Low-level IRQ helper macros for IOP32x-based platforms |
5 | * | 5 | * |
6 | * This file is licensed under the terms of the GNU General Public | 6 | * This file is licensed under the terms of the GNU General Public |
7 | * License version 2. This program is licensed "as is" without any | 7 | * License version 2. This program is licensed "as is" without any |
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | #include <asm/arch/irqs.h> | 10 | #include <asm/arch/iop32x.h> |
11 | 11 | ||
12 | .macro disable_fiq | 12 | .macro disable_fiq |
13 | .endm | 13 | .endm |
14 | 14 | ||
15 | /* | 15 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
16 | * Note: only deal with normal interrupts, not FIQ | ||
17 | */ | ||
18 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | ||
19 | ldr \base, =IOP3XX_REG_ADDR(0x07D8) | 16 | ldr \base, =IOP3XX_REG_ADDR(0x07D8) |
20 | ldr \irqstat, [\base] @ Read IINTSRC | 17 | ldr \irqstat, [\base] @ Read IINTSRC |
21 | cmp \irqstat, #0 | 18 | cmp \irqstat, #0 |
diff --git a/include/asm-arm/arch-iop32x/hardware.h b/include/asm-arm/arch-iop32x/hardware.h index 16d0630ab252..6a3001f2f7e0 100644 --- a/include/asm-arm/arch-iop32x/hardware.h +++ b/include/asm-arm/arch-iop32x/hardware.h | |||
@@ -1,8 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm-arm/arch-iop32x/hardware.h | 2 | * include/asm-arm/arch-iop32x/hardware.h |
3 | */ | 3 | */ |
4 | #ifndef __ASM_ARCH_HARDWARE_H | 4 | |
5 | #define __ASM_ARCH_HARDWARE_H | 5 | #ifndef __HARDWARE_H |
6 | #define __HARDWARE_H | ||
6 | 7 | ||
7 | #include <asm/types.h> | 8 | #include <asm/types.h> |
8 | 9 | ||
@@ -13,21 +14,23 @@ | |||
13 | * the IO resources. | 14 | * the IO resources. |
14 | * | 15 | * |
15 | * The PCI IO space is located at virtual 0xfe000000 from physical | 16 | * The PCI IO space is located at virtual 0xfe000000 from physical |
16 | * 0x90000000. The PCI BARs must be programmed with physical addresses, | 17 | * 0x90000000. The PCI BARs must be programmed with physical addresses, |
17 | * but when we read them, we convert them to virtual addresses. See | 18 | * but when we read them, we convert them to virtual addresses. See |
18 | * arch/arm/mach-iop3xx/iop3xx-pci.c | 19 | * arch/arm/plat-iop/pci.c. |
19 | */ | 20 | */ |
20 | |||
21 | #define pcibios_assign_all_busses() 1 | 21 | #define pcibios_assign_all_busses() 1 |
22 | #define PCIBIOS_MIN_IO 0x00000000 | 22 | #define PCIBIOS_MIN_IO 0x00000000 |
23 | #define PCIBIOS_MIN_MEM 0x00000000 | 23 | #define PCIBIOS_MIN_MEM 0x00000000 |
24 | 24 | ||
25 | #ifndef __ASSEMBLY__ | ||
26 | void iop32x_init_irq(void); | ||
27 | #endif | ||
28 | |||
25 | 29 | ||
26 | /* | 30 | /* |
27 | * Generic chipset bits | 31 | * Generic chipset bits |
28 | * | ||
29 | */ | 32 | */ |
30 | #include "iop321.h" | 33 | #include "iop32x.h" |
31 | 34 | ||
32 | /* | 35 | /* |
33 | * Board specific bits | 36 | * Board specific bits |
@@ -35,4 +38,5 @@ | |||
35 | #include "iq80321.h" | 38 | #include "iq80321.h" |
36 | #include "iq31244.h" | 39 | #include "iq31244.h" |
37 | 40 | ||
38 | #endif /* _ASM_ARCH_HARDWARE_H */ | 41 | |
42 | #endif | ||
diff --git a/include/asm-arm/arch-iop32x/io.h b/include/asm-arm/arch-iop32x/io.h index 36d05ada12c4..12d9ee02cde3 100644 --- a/include/asm-arm/arch-iop32x/io.h +++ b/include/asm-arm/arch-iop32x/io.h | |||
@@ -1,21 +1,22 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm-arm/arch-iop32x/io.h | 2 | * include/asm-arm/arch-iop32x/io.h |
3 | * | 3 | * |
4 | * Copyright (C) 2001 MontaVista Software, Inc. | 4 | * Copyright (C) 2001 MontaVista Software, Inc. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #ifndef __ASM_ARM_ARCH_IO_H | 11 | #ifndef __IO_H |
12 | #define __ASM_ARM_ARCH_IO_H | 12 | #define __IO_H |
13 | 13 | ||
14 | #include <asm/hardware.h> | 14 | #include <asm/hardware.h> |
15 | 15 | ||
16 | #define IO_SPACE_LIMIT 0xffffffff | 16 | #define IO_SPACE_LIMIT 0xffffffff |
17 | 17 | ||
18 | #define __io(p) ((void __iomem *)(p)) | 18 | #define __io(p) ((void __iomem *)(p)) |
19 | #define __mem_pci(a) (a) | 19 | #define __mem_pci(a) (a) |
20 | 20 | ||
21 | |||
21 | #endif | 22 | #endif |
diff --git a/include/asm-arm/arch-iop32x/iop321.h b/include/asm-arm/arch-iop32x/iop321.h deleted file mode 100644 index 1757222a4cad..000000000000 --- a/include/asm-arm/arch-iop32x/iop321.h +++ /dev/null | |||
@@ -1,86 +0,0 @@ | |||
1 | /* | ||
2 | * linux/include/asm/arch-iop32x/iop321.h | ||
3 | * | ||
4 | * Intel IOP321 Chip definitions | ||
5 | * | ||
6 | * Author: Rory Bolt <rorybolt@pacbell.net> | ||
7 | * Copyright (C) 2002 Rory Bolt | ||
8 | * Copyright (C) 2004 Intel Corp. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef _IOP321_HW_H_ | ||
16 | #define _IOP321_HW_H_ | ||
17 | |||
18 | |||
19 | /* | ||
20 | * This is needed for mixed drivers that need to work on all | ||
21 | * IOP3xx variants but behave slightly differently on each. | ||
22 | */ | ||
23 | #ifndef __ASSEMBLY__ | ||
24 | #define iop_is_321() 1 | ||
25 | #endif | ||
26 | |||
27 | /* | ||
28 | * IOP321 chipset registers | ||
29 | */ | ||
30 | #define IOP321_VIRT_MEM_BASE 0xfeffe000 /* chip virtual mem address*/ | ||
31 | #define IOP321_PHYS_MEM_BASE 0xffffe000 /* chip physical memory address */ | ||
32 | #define IOP321_REG_ADDR(reg) (IOP321_VIRT_MEM_BASE | (reg)) | ||
33 | |||
34 | /* Reserved 0x00000000 through 0x000000FF */ | ||
35 | |||
36 | /* Address Translation Unit 0x00000100 through 0x000001FF */ | ||
37 | |||
38 | /* Messaging Unit 0x00000300 through 0x000003FF */ | ||
39 | |||
40 | /* DMA Controller 0x00000400 through 0x000004FF */ | ||
41 | |||
42 | /* Memory controller 0x00000500 through 0x0005FF */ | ||
43 | |||
44 | /* Peripheral bus interface unit 0x00000680 through 0x0006FF */ | ||
45 | |||
46 | /* Peripheral performance monitoring unit 0x00000700 through 0x00077F */ | ||
47 | |||
48 | /* Internal arbitration unit 0x00000780 through 0x0007BF */ | ||
49 | #define IOP321_IACR (volatile u32 *)IOP321_REG_ADDR(0x00000780) | ||
50 | #define IOP321_MTTR1 (volatile u32 *)IOP321_REG_ADDR(0x00000784) | ||
51 | #define IOP321_MTTR2 (volatile u32 *)IOP321_REG_ADDR(0x00000788) | ||
52 | |||
53 | /* General Purpose I/O Registers */ | ||
54 | #define IOP321_GPOE (volatile u32 *)IOP321_REG_ADDR(0x000007C4) | ||
55 | #define IOP321_GPID (volatile u32 *)IOP321_REG_ADDR(0x000007C8) | ||
56 | #define IOP321_GPOD (volatile u32 *)IOP321_REG_ADDR(0x000007CC) | ||
57 | |||
58 | /* Interrupt Controller */ | ||
59 | #define IOP321_INTCTL (volatile u32 *)IOP321_REG_ADDR(0x000007D0) | ||
60 | #define IOP321_INTSTR (volatile u32 *)IOP321_REG_ADDR(0x000007D4) | ||
61 | #define IOP321_IINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007D8) | ||
62 | #define IOP321_FINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007DC) | ||
63 | |||
64 | /* Application accelerator unit 0x00000800 - 0x000008FF */ | ||
65 | |||
66 | /* SSP serial port unit 0x00001600 - 0x0000167F */ | ||
67 | /* I2C bus interface unit 0x00001680 - 0x000016FF */ | ||
68 | |||
69 | /* for I2C bit defs see drivers/i2c/i2c-iop3xx.h */ | ||
70 | |||
71 | /* | ||
72 | * Peripherals that are shared between the iop32x and iop33x but | ||
73 | * located at different addresses. | ||
74 | */ | ||
75 | #define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c0 + (reg)) | ||
76 | #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) | ||
77 | |||
78 | #include <asm/hardware/iop3xx.h> | ||
79 | |||
80 | |||
81 | #ifndef __ASSEMBLY__ | ||
82 | extern void iop321_init_irq(void); | ||
83 | extern void iop321_time_init(void); | ||
84 | #endif | ||
85 | |||
86 | #endif // _IOP321_HW_H_ | ||
diff --git a/include/asm-arm/arch-iop32x/iop32x.h b/include/asm-arm/arch-iop32x/iop32x.h new file mode 100644 index 000000000000..4bbd85f3ed2a --- /dev/null +++ b/include/asm-arm/arch-iop32x/iop32x.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * include/asm-arm/arch-iop32x/iop32x.h | ||
3 | * | ||
4 | * Intel IOP32X Chip definitions | ||
5 | * | ||
6 | * Author: Rory Bolt <rorybolt@pacbell.net> | ||
7 | * Copyright (C) 2002 Rory Bolt | ||
8 | * Copyright (C) 2004 Intel Corp. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #ifndef __IOP32X_H | ||
16 | #define __IOP32X_H | ||
17 | |||
18 | /* | ||
19 | * Peripherals that are shared between the iop32x and iop33x but | ||
20 | * located at different addresses. | ||
21 | */ | ||
22 | #define IOP3XX_GPIO_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c0 + (reg)) | ||
23 | #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) | ||
24 | |||
25 | #include <asm/hardware/iop3xx.h> | ||
26 | |||
27 | |||
28 | #endif | ||
diff --git a/include/asm-arm/arch-iop32x/iq31244.h b/include/asm-arm/arch-iop32x/iq31244.h index cf2d2343398d..fff4eafa1f6b 100644 --- a/include/asm-arm/arch-iop32x/iq31244.h +++ b/include/asm-arm/arch-iop32x/iq31244.h | |||
@@ -1,11 +1,11 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm/arch-iop32x/iq31244.h | 2 | * include/asm-arm/arch-iop32x/iq31244.h |
3 | * | 3 | * |
4 | * Intel IQ31244 evaluation board registers | 4 | * Intel IQ31244 evaluation board registers |
5 | */ | 5 | */ |
6 | 6 | ||
7 | #ifndef _IQ31244_H_ | 7 | #ifndef __IQ31244_H |
8 | #define _IQ31244_H_ | 8 | #define __IQ31244_H |
9 | 9 | ||
10 | #define IQ31244_UART 0xfe800000 /* UART #1 */ | 10 | #define IQ31244_UART 0xfe800000 /* UART #1 */ |
11 | #define IQ31244_7SEG_1 0xfe840000 /* 7-Segment MSB */ | 11 | #define IQ31244_7SEG_1 0xfe840000 /* 7-Segment MSB */ |
@@ -14,4 +14,4 @@ | |||
14 | #define IQ31244_BATT_STAT 0xfe8f0000 /* Battery Status */ | 14 | #define IQ31244_BATT_STAT 0xfe8f0000 /* Battery Status */ |
15 | 15 | ||
16 | 16 | ||
17 | #endif // _IQ31244_H_ | 17 | #endif |
diff --git a/include/asm-arm/arch-iop32x/iq80321.h b/include/asm-arm/arch-iop32x/iq80321.h index 55d70f49b7fd..eb69db9b9a06 100644 --- a/include/asm-arm/arch-iop32x/iq80321.h +++ b/include/asm-arm/arch-iop32x/iq80321.h | |||
@@ -1,11 +1,11 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm/arch-iop32x/iq80321.h | 2 | * include/asm-arm/arch-iop32x/iq80321.h |
3 | * | 3 | * |
4 | * Intel IQ80321 evaluation board registers | 4 | * Intel IQ80321 evaluation board registers |
5 | */ | 5 | */ |
6 | 6 | ||
7 | #ifndef _IQ80321_H_ | 7 | #ifndef __IQ80321_H |
8 | #define _IQ80321_H_ | 8 | #define __IQ80321_H |
9 | 9 | ||
10 | #define IQ80321_UART 0xfe800000 /* UART #1 */ | 10 | #define IQ80321_UART 0xfe800000 /* UART #1 */ |
11 | #define IQ80321_7SEG_1 0xfe840000 /* 7-Segment MSB */ | 11 | #define IQ80321_7SEG_1 0xfe840000 /* 7-Segment MSB */ |
@@ -14,4 +14,4 @@ | |||
14 | #define IQ80321_BATT_STAT 0xfe8f0000 /* Battery Status */ | 14 | #define IQ80321_BATT_STAT 0xfe8f0000 /* Battery Status */ |
15 | 15 | ||
16 | 16 | ||
17 | #endif // _IQ80321_H_ | 17 | #endif |
diff --git a/include/asm-arm/arch-iop32x/irqs.h b/include/asm-arm/arch-iop32x/irqs.h index a48327ced92e..bbaef873afce 100644 --- a/include/asm-arm/arch-iop32x/irqs.h +++ b/include/asm-arm/arch-iop32x/irqs.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm-arm/arch-iop32x/irqs.h | 2 | * include/asm-arm/arch-iop32x/irqs.h |
3 | * | 3 | * |
4 | * Author: Rory Bolt <rorybolt@pacbell.net> | 4 | * Author: Rory Bolt <rorybolt@pacbell.net> |
5 | * Copyright: (C) 2002 Rory Bolt | 5 | * Copyright: (C) 2002 Rory Bolt |
@@ -7,44 +7,44 @@ | |||
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | * | ||
11 | */ | 10 | */ |
12 | #ifndef _IRQS_H_ | 11 | |
13 | #define _IRQS_H_ | 12 | #ifndef __IRQS_H |
13 | #define __IRQS_H | ||
14 | 14 | ||
15 | /* | 15 | /* |
16 | * IOP80321 chipset interrupts | 16 | * IOP80321 chipset interrupts |
17 | */ | 17 | */ |
18 | #define IRQ_IOP321_DMA0_EOT 0 | 18 | #define IRQ_IOP32X_DMA0_EOT 0 |
19 | #define IRQ_IOP321_DMA0_EOC 1 | 19 | #define IRQ_IOP32X_DMA0_EOC 1 |
20 | #define IRQ_IOP321_DMA1_EOT 2 | 20 | #define IRQ_IOP32X_DMA1_EOT 2 |
21 | #define IRQ_IOP321_DMA1_EOC 3 | 21 | #define IRQ_IOP32X_DMA1_EOC 3 |
22 | #define IRQ_IOP321_AA_EOT 6 | 22 | #define IRQ_IOP32X_AA_EOT 6 |
23 | #define IRQ_IOP321_AA_EOC 7 | 23 | #define IRQ_IOP32X_AA_EOC 7 |
24 | #define IRQ_IOP321_CORE_PMON 8 | 24 | #define IRQ_IOP32X_CORE_PMON 8 |
25 | #define IRQ_IOP321_TIMER0 9 | 25 | #define IRQ_IOP32X_TIMER0 9 |
26 | #define IRQ_IOP321_TIMER1 10 | 26 | #define IRQ_IOP32X_TIMER1 10 |
27 | #define IRQ_IOP321_I2C_0 11 | 27 | #define IRQ_IOP32X_I2C_0 11 |
28 | #define IRQ_IOP321_I2C_1 12 | 28 | #define IRQ_IOP32X_I2C_1 12 |
29 | #define IRQ_IOP321_MESSAGING 13 | 29 | #define IRQ_IOP32X_MESSAGING 13 |
30 | #define IRQ_IOP321_ATU_BIST 14 | 30 | #define IRQ_IOP32X_ATU_BIST 14 |
31 | #define IRQ_IOP321_PERFMON 15 | 31 | #define IRQ_IOP32X_PERFMON 15 |
32 | #define IRQ_IOP321_CORE_PMU 16 | 32 | #define IRQ_IOP32X_CORE_PMU 16 |
33 | #define IRQ_IOP321_BIU_ERR 17 | 33 | #define IRQ_IOP32X_BIU_ERR 17 |
34 | #define IRQ_IOP321_ATU_ERR 18 | 34 | #define IRQ_IOP32X_ATU_ERR 18 |
35 | #define IRQ_IOP321_MCU_ERR 19 | 35 | #define IRQ_IOP32X_MCU_ERR 19 |
36 | #define IRQ_IOP321_DMA0_ERR 20 | 36 | #define IRQ_IOP32X_DMA0_ERR 20 |
37 | #define IRQ_IOP321_DMA1_ERR 21 | 37 | #define IRQ_IOP32X_DMA1_ERR 21 |
38 | #define IRQ_IOP321_AA_ERR 23 | 38 | #define IRQ_IOP32X_AA_ERR 23 |
39 | #define IRQ_IOP321_MSG_ERR 24 | 39 | #define IRQ_IOP32X_MSG_ERR 24 |
40 | #define IRQ_IOP321_SSP 25 | 40 | #define IRQ_IOP32X_SSP 25 |
41 | #define IRQ_IOP321_XINT0 27 | 41 | #define IRQ_IOP32X_XINT0 27 |
42 | #define IRQ_IOP321_XINT1 28 | 42 | #define IRQ_IOP32X_XINT1 28 |
43 | #define IRQ_IOP321_XINT2 29 | 43 | #define IRQ_IOP32X_XINT2 29 |
44 | #define IRQ_IOP321_XINT3 30 | 44 | #define IRQ_IOP32X_XINT3 30 |
45 | #define IRQ_IOP321_HPI 31 | 45 | #define IRQ_IOP32X_HPI 31 |
46 | 46 | ||
47 | #define NR_IRQS 32 | 47 | #define NR_IRQS 32 |
48 | 48 | ||
49 | 49 | ||
50 | #endif // _IRQ_H_ | 50 | #endif |
diff --git a/include/asm-arm/arch-iop32x/memory.h b/include/asm-arm/arch-iop32x/memory.h index 4c64d9e7229b..764cd3f0d416 100644 --- a/include/asm-arm/arch-iop32x/memory.h +++ b/include/asm-arm/arch-iop32x/memory.h | |||
@@ -1,9 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm-arm/arch-iop32x/memory.h | 2 | * include/asm-arm/arch-iop32x/memory.h |
3 | */ | 3 | */ |
4 | 4 | ||
5 | #ifndef __ASM_ARCH_MEMORY_H | 5 | #ifndef __MEMORY_H |
6 | #define __ASM_ARCH_MEMORY_H | 6 | #define __MEMORY_H |
7 | 7 | ||
8 | #include <asm/hardware.h> | 8 | #include <asm/hardware.h> |
9 | 9 | ||
@@ -19,7 +19,6 @@ | |||
19 | * bus_to_virt: Used to convert an address for DMA operations | 19 | * bus_to_virt: Used to convert an address for DMA operations |
20 | * to an address that the kernel can use. | 20 | * to an address that the kernel can use. |
21 | */ | 21 | */ |
22 | |||
23 | #define __virt_to_bus(x) (((__virt_to_phys(x)) & ~(*IOP3XX_IATVR2)) | ((*IOP3XX_IABAR2) & 0xfffffff0)) | 22 | #define __virt_to_bus(x) (((__virt_to_phys(x)) & ~(*IOP3XX_IATVR2)) | ((*IOP3XX_IABAR2) & 0xfffffff0)) |
24 | #define __bus_to_virt(x) (__phys_to_virt(((x) & ~(*IOP3XX_IALR2)) | ( *IOP3XX_IATVR2))) | 23 | #define __bus_to_virt(x) (__phys_to_virt(((x) & ~(*IOP3XX_IALR2)) | ( *IOP3XX_IATVR2))) |
25 | 24 | ||
diff --git a/include/asm-arm/arch-iop32x/system.h b/include/asm-arm/arch-iop32x/system.h index 1ac207a0d52e..c65ede3e627a 100644 --- a/include/asm-arm/arch-iop32x/system.h +++ b/include/asm-arm/arch-iop32x/system.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm-arm/arch-iop32x/system.h | 2 | * include/asm-arm/arch-iop32x/system.h |
3 | * | 3 | * |
4 | * Copyright (C) 2001 MontaVista Software, Inc. | 4 | * Copyright (C) 2001 MontaVista Software, Inc. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License version 2 as | 7 | * it under the terms of the GNU General Public License version 2 as |
@@ -13,17 +13,10 @@ static inline void arch_idle(void) | |||
13 | cpu_do_idle(); | 13 | cpu_do_idle(); |
14 | } | 14 | } |
15 | 15 | ||
16 | |||
17 | static inline void arch_reset(char mode) | 16 | static inline void arch_reset(char mode) |
18 | { | 17 | { |
19 | *IOP3XX_PCSR = 0x30; | 18 | *IOP3XX_PCSR = 0x30; |
20 | 19 | ||
21 | if ( 1 && mode == 's') { | 20 | /* Jump into ROM at address 0 */ |
22 | /* Jump into ROM at address 0 */ | 21 | cpu_reset(0); |
23 | cpu_reset(0); | ||
24 | } else { | ||
25 | /* No on-chip reset capability */ | ||
26 | cpu_reset(0); | ||
27 | } | ||
28 | } | 22 | } |
29 | |||
diff --git a/include/asm-arm/arch-iop32x/timex.h b/include/asm-arm/arch-iop32x/timex.h index 328f37282c3e..9934b087311b 100644 --- a/include/asm-arm/arch-iop32x/timex.h +++ b/include/asm-arm/arch-iop32x/timex.h | |||
@@ -1,8 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm-arm/arch-iop32x/timex.h | 2 | * include/asm-arm/arch-iop32x/timex.h |
3 | * | 3 | * |
4 | * IOP3xx architecture timex specifications | 4 | * IOP32x architecture timex specifications |
5 | */ | 5 | */ |
6 | |||
6 | #include <asm/hardware.h> | 7 | #include <asm/hardware.h> |
7 | 8 | ||
8 | #define CLOCK_TICK_RATE (100 * HZ) | 9 | #define CLOCK_TICK_RATE (100 * HZ) |
diff --git a/include/asm-arm/arch-iop32x/uncompress.h b/include/asm-arm/arch-iop32x/uncompress.h index 4a85f20c796f..e64f52bf2bce 100644 --- a/include/asm-arm/arch-iop32x/uncompress.h +++ b/include/asm-arm/arch-iop32x/uncompress.h | |||
@@ -1,6 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm-arm/arch-iop32x/uncompress.h | 2 | * include/asm-arm/arch-iop32x/uncompress.h |
3 | */ | 3 | */ |
4 | |||
4 | #include <asm/types.h> | 5 | #include <asm/types.h> |
5 | #include <asm/mach-types.h> | 6 | #include <asm/mach-types.h> |
6 | #include <linux/serial_reg.h> | 7 | #include <linux/serial_reg.h> |
@@ -8,13 +9,13 @@ | |||
8 | 9 | ||
9 | static volatile u8 *uart_base; | 10 | static volatile u8 *uart_base; |
10 | 11 | ||
11 | #define TX_DONE (UART_LSR_TEMT|UART_LSR_THRE) | 12 | #define TX_DONE (UART_LSR_TEMT | UART_LSR_THRE) |
12 | 13 | ||
13 | static inline void putc(char c) | 14 | static inline void putc(char c) |
14 | { | 15 | { |
15 | while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE) | 16 | while ((uart_base[UART_LSR] & TX_DONE) != TX_DONE) |
16 | barrier(); | 17 | barrier(); |
17 | *uart_base = c; | 18 | uart_base[UART_TX] = c; |
18 | } | 19 | } |
19 | 20 | ||
20 | static inline void flush(void) | 21 | static inline void flush(void) |
diff --git a/include/asm-arm/arch-iop32x/vmalloc.h b/include/asm-arm/arch-iop32x/vmalloc.h index 8492e1708a63..0a70baa19517 100644 --- a/include/asm-arm/arch-iop32x/vmalloc.h +++ b/include/asm-arm/arch-iop32x/vmalloc.h | |||
@@ -1,16 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * linux/include/asm-arm/arch-iop32x/vmalloc.h | 2 | * include/asm-arm/arch-iop32x/vmalloc.h |
3 | */ | 3 | */ |
4 | 4 | ||
5 | /* | 5 | #define VMALLOC_END 0xfe000000 |
6 | * Just any arbitrary offset to the start of the vmalloc VM area: the | ||
7 | * current 8MB value just means that there will be a 8MB "hole" after the | ||
8 | * physical memory until the kernel virtual memory starts. That means that | ||
9 | * any out-of-bounds memory accesses will hopefully be caught. | ||
10 | * The vmalloc() routines leaves a hole of 4kB between each vmalloced | ||
11 | * area for the same reason. ;) | ||
12 | */ | ||
13 | //#define VMALLOC_END (0xe8000000) | ||
14 | /* increase usable physical RAM to ~992M per RMK */ | ||
15 | #define VMALLOC_END (0xfe000000) | ||
16 | |||