[ARM] 4187/1: iop: unify time implementation across iop32x, iop33x, and iop13xx

* architecture specific details are handled in asm/arch/time.h
* ARCH_IOP13XX now selects PLAT_IOP
* as suggested by Lennert use ifdef CONFIG_XSCALE to skip the cp_wait on
XSC3

Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

2 files changed, 51 insertions, 12 deletions

diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h
index e7430593d6fb..d26b755a9879 100644
--- a/include/asm-arm/arch-iop13xx/iop13xx.h
+++ b/include/asm-arm/arch-iop13xx/iop13xx.h
@@ -9,8 +9,6 @@ void iop13xx_init_irq(void);
 void iop13xx_map_io(void);
 void iop13xx_platform_init(void);
 void iop13xx_init_irq(void);
-void iop13xx_init_time(unsigned long tickrate);
-unsigned long iop13xx_gettimeoffset(void);
 
 /* CPUID CP6 R0 Page 0 */
 static inline int iop13xx_cpu_id(void)
@@ -453,14 +451,4 @@ static inline int iop13xx_cpu_id(void)
 #define IOP13XX_PBI_BAR1                IOP13XX_PBI_OFFSET(0x10)
 #define IOP13XX_PBI_LR1                 IOP13XX_PBI_OFFSET(0x14)
 
-#define IOP13XX_TMR_TC                  0x01
-#define IOP13XX_TMR_EN                  0x02
-#define IOP13XX_TMR_RELOAD              0x04
-#define IOP13XX_TMR_PRIVILEGED          0x08
-
-#define IOP13XX_TMR_RATIO_1_1           0x00
-#define IOP13XX_TMR_RATIO_4_1           0x10
-#define IOP13XX_TMR_RATIO_8_1           0x20
-#define IOP13XX_TMR_RATIO_16_1          0x30
-
 #endif /* _IOP13XX_HW_H_ */
diff --git a/include/asm-arm/arch-iop13xx/time.h b/include/asm-arm/arch-iop13xx/time.h
new file mode 100644
index 000000000000..77a837a02dec
--- /dev/null
+++ b/include/asm-arm/arch-iop13xx/time.h
@@ -0,0 +1,51 @@
+#ifndef _IOP13XX_TIME_H_
+#define _IOP13XX_TIME_H_
+#define IRQ_IOP_TIMER0 IRQ_IOP13XX_TIMER0
+
+#define IOP_TMR_EN          0x02
+#define IOP_TMR_RELOAD      0x04
+#define IOP_TMR_PRIVILEGED 0x08
+#define IOP_TMR_RATIO_1_1  0x00
+
+void iop_init_time(unsigned long tickrate);
+unsigned long iop_gettimeoffset(void);
+
+static inline void write_tmr0(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c0, c9, 0" : : "r" (val));
+}
+
+static inline void write_tmr1(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c1, c9, 0" : : "r" (val));
+}
+
+static inline u32 read_tcr0(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c2, c9, 0" : "=r" (val));
+        return val;
+}
+
+static inline u32 read_tcr1(void)
+{
+        u32 val;
+        asm volatile("mrc p6, 0, %0, c3, c9, 0" : "=r" (val));
+        return val;
+}
+
+static inline void write_trr0(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c4, c9, 0" : : "r" (val));
+}
+
+static inline void write_trr1(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (val));
+}
+
+static inline void write_tisr(u32 val)
+{
+        asm volatile("mcr p6, 0, %0, c6, c9, 0" : : "r" (val));
+}
+#endif