diff options
author | Dan Williams <dan.j.williams@intel.com> | 2007-02-13 11:13:04 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-02-17 10:04:53 -0500 |
commit | 4434c5c7fd61c6713de882a2272b66f32fe7cac3 (patch) | |
tree | f20c9c4eba18dd915f07185cee5ededf33e28c02 /include/asm-arm/arch-iop13xx/iop13xx.h | |
parent | f80dff9da07d81da16e3b842118d47b9febf9c01 (diff) |
[ARM] 4186/1: iop: remove cp6_enable/disable routines
This functionality is replaced by cp6_trap
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-iop13xx/iop13xx.h')
-rw-r--r-- | include/asm-arm/arch-iop13xx/iop13xx.h | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/include/asm-arm/arch-iop13xx/iop13xx.h b/include/asm-arm/arch-iop13xx/iop13xx.h index a88522a0ff8e..e7430593d6fb 100644 --- a/include/asm-arm/arch-iop13xx/iop13xx.h +++ b/include/asm-arm/arch-iop13xx/iop13xx.h | |||
@@ -12,32 +12,6 @@ void iop13xx_init_irq(void); | |||
12 | void iop13xx_init_time(unsigned long tickrate); | 12 | void iop13xx_init_time(unsigned long tickrate); |
13 | unsigned long iop13xx_gettimeoffset(void); | 13 | unsigned long iop13xx_gettimeoffset(void); |
14 | 14 | ||
15 | /* handle cp6 access | ||
16 | * to do: handle access in entry-armv5.S and unify with | ||
17 | * the iop3xx implementation | ||
18 | * note: use iop13xx_cp6_enable_irq_save and iop13xx_cp6_irq_restore (irq.h) | ||
19 | * when interrupts are enabled | ||
20 | */ | ||
21 | static inline unsigned long iop13xx_cp6_save(void) | ||
22 | { | ||
23 | u32 temp, cp_flags; | ||
24 | |||
25 | asm volatile ( | ||
26 | "mrc p15, 0, %1, c15, c1, 0\n\t" | ||
27 | "orr %0, %1, #(1 << 6)\n\t" | ||
28 | "mcr p15, 0, %0, c15, c1, 0\n\t" | ||
29 | : "=r" (temp), "=r"(cp_flags)); | ||
30 | |||
31 | return cp_flags; | ||
32 | } | ||
33 | |||
34 | static inline void iop13xx_cp6_restore(unsigned long cp_flags) | ||
35 | { | ||
36 | asm volatile ( | ||
37 | "mcr p15, 0, %0, c15, c1, 0\n\t" | ||
38 | : : "r" (cp_flags) ); | ||
39 | } | ||
40 | |||
41 | /* CPUID CP6 R0 Page 0 */ | 15 | /* CPUID CP6 R0 Page 0 */ |
42 | static inline int iop13xx_cpu_id(void) | 16 | static inline int iop13xx_cpu_id(void) |
43 | { | 17 | { |