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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-08-05 11:14:15 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-08-07 04:55:48 -0400
commita09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch)
tree69689f467179891b498bd7423fcf61925173db31 /include/asm-arm/arch-iop13xx/entry-macro.S
parenta1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff)
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-iop13xx/entry-macro.S')
-rw-r--r--include/asm-arm/arch-iop13xx/entry-macro.S45
1 files changed, 0 insertions, 45 deletions
diff --git a/include/asm-arm/arch-iop13xx/entry-macro.S b/include/asm-arm/arch-iop13xx/entry-macro.S
deleted file mode 100644
index a624a7870c64..000000000000
--- a/include/asm-arm/arch-iop13xx/entry-macro.S
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * iop13xx low level irq macros
3 * Copyright (c) 2005-2006, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 *
18 */
19 .macro disable_fiq
20 .endm
21
22 .macro get_irqnr_preamble, base, tmp
23 mrc p15, 0, \tmp, c15, c1, 0
24 orr \tmp, \tmp, #(1 << 6)
25 mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access
26 .endm
27
28 /*
29 * Note: a 1-cycle window exists where iintvec will return the value
30 * of iintbase, so we explicitly check for "bad zeros"
31 */
32 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
33 mrc p6, 0, \irqnr, c3, c2, 0 @ Read IINTVEC
34 cmp \irqnr, #0
35 mrceq p6, 0, \irqnr, c3, c2, 0 @ Re-read on potentially bad zero
36 adds \irqstat, \irqnr, #1 @ Check for 0xffffffff
37 movne \irqnr, \irqnr, lsr #2 @ Convert to irqnr
38 .endm
39
40 .macro arch_ret_to_user, tmp1, tmp2
41 mrc p15, 0, \tmp1, c15, c1, 0
42 ands \tmp2, \tmp1, #(1 << 6)
43 bicne \tmp1, \tmp1, #(1 << 6)
44 mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access
45 .endm