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authorAndrea Paterniani <a.paterniani@swapp-eng.it>2007-02-12 03:52:39 -0500
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-02-12 12:48:30 -0500
commit69c202afa8ad6d6c1c673d8f9d47b43a0a3604e5 (patch)
treea8f79c7911042c3cbc1b71e49e51f0c7ebf8055e /include/asm-arm/arch-imx
parentfdb3c18d639311287dc4675abe743847a1aa62a8 (diff)
[PATCH] SPI: Freescale iMX SPI controller driver (BIS+)
Add the SPI controller driver for Freescale i.MX(S/L/1). Main features summary: > Per chip setup via board specific code and/or protocol driver. > Per transfer setup. > PIO transfers. > DMA transfers. > Managing of NULL tx / rx buffer for rd only / wr only transfers. This patch replace patch-2.6.20-rc4-spi_imx with the following changes: > Few cosmetic changes. > Function map_dma_buffers now return 0 for success and -1 for failure. > Solved a bug inside spi_imx_probe function (wrong error path). > Solved a bug inside setup function (bad undo setup for max_speed_hz). > For read-only transfers, always write zero bytes. This is almost the same as the 'BIS' version sent by Andrea, except for updating the 'DUMMY' byte so that read-only transfers shift out zeroes. That part of the API changed recently, since some half duplex peripheral chips require that semantic. Signed-off-by: Andrea Paterniani <a.paterniani@swapp-eng.it> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-arm/arch-imx')
-rw-r--r--include/asm-arm/arch-imx/spi_imx.h72
1 files changed, 72 insertions, 0 deletions
diff --git a/include/asm-arm/arch-imx/spi_imx.h b/include/asm-arm/arch-imx/spi_imx.h
new file mode 100644
index 000000000000..2165449e976e
--- /dev/null
+++ b/include/asm-arm/arch-imx/spi_imx.h
@@ -0,0 +1,72 @@
1/*
2 * include/asm-arm/arch-imx/spi_imx.h
3 *
4 * Copyright (C) 2006 SWAPP
5 * Andrea Paterniani <a.paterniani@swapp-eng.it>
6 *
7 * Initial version inspired by:
8 * linux-2.6.17-rc3-mm1/include/asm-arm/arch-pxa/pxa2xx_spi.h
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#ifndef SPI_IMX_H_
26#define SPI_IMX_H_
27
28
29/*-------------------------------------------------------------------------*/
30/**
31 * struct spi_imx_master - device.platform_data for SPI controller devices.
32 * @num_chipselect: chipselects are used to distinguish individual
33 * SPI slaves, and are numbered from zero to num_chipselects - 1.
34 * each slave has a chipselect signal, but it's common that not
35 * every chipselect is connected to a slave.
36 * @enable_dma: if true enables DMA driven transfers.
37*/
38struct spi_imx_master {
39 u8 num_chipselect;
40 u8 enable_dma:1;
41};
42/*-------------------------------------------------------------------------*/
43
44
45/*-------------------------------------------------------------------------*/
46/**
47 * struct spi_imx_chip - spi_board_info.controller_data for SPI
48 * slave devices, copied to spi_device.controller_data.
49 * @enable_loopback : used for test purpouse to internally connect RX and TX
50 * sections.
51 * @enable_dma : enables dma transfer (provided that controller driver has
52 * dma enabled too).
53 * @ins_ss_pulse : enable /SS pulse insertion between SPI burst.
54 * @bclk_wait : number of bclk waits between each bits_per_word SPI burst.
55 * @cs_control : function pointer to board-specific function to assert/deassert
56 * I/O port to control HW generation of devices chip-select.
57*/
58struct spi_imx_chip {
59 u8 enable_loopback:1;
60 u8 enable_dma:1;
61 u8 ins_ss_pulse:1;
62 u16 bclk_wait:15;
63 void (*cs_control)(u32 control);
64};
65
66/* Chip-select state */
67#define SPI_CS_ASSERT (1 << 0)
68#define SPI_CS_DEASSERT (1 << 1)
69/*-------------------------------------------------------------------------*/
70
71
72#endif /* SPI_IMX_H_*/