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authorLennert Buytenhek <buytenh@wantstofly.org>2006-03-20 12:10:13 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-03-21 17:06:11 -0500
commite7736d47a11a771ba87314be563b2cb6b8d11d14 (patch)
tree21f27b7311a5298b9295b1e4b229eec190bfd23c /include/asm-arm/arch-ep93xx/entry-macro.S
parent73deb7dc05b4cf968e506e7b18345bc65bcbc0f3 (diff)
[ARM] 3369/1: ep93xx: add core cirrus ep93xx support
Patch from Lennert Buytenhek This patch adds support for the Cirrus ep93xx series of CPUs. The ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs, IrDA, MaverickCrunch floating point coprocessor, between 24 and 64 GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster engine, graphics accelerator, IDE controller and a bunch of other stuff. This patch adds the core ep93xx support code, and support for the Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ep93xx/entry-macro.S')
-rw-r--r--include/asm-arm/arch-ep93xx/entry-macro.S53
1 files changed, 53 insertions, 0 deletions
diff --git a/include/asm-arm/arch-ep93xx/entry-macro.S b/include/asm-arm/arch-ep93xx/entry-macro.S
new file mode 100644
index 000000000000..84140a28dfcf
--- /dev/null
+++ b/include/asm-arm/arch-ep93xx/entry-macro.S
@@ -0,0 +1,53 @@
1/*
2 * linux/include/asm-arm/arch-ep93xx/entry-macro.S
3 * IRQ demultiplexing for EP93xx
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12#include <asm/arch/ep93xx-regs.h>
13
14 .macro disable_fiq
15 .endm
16
17 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
18 ldr \base, =(EP93XX_AHB_VIRT_BASE)
19 orr \base, \base, #0x000b0000
20 mov \irqnr, #0
21 ldr \irqstat, [\base] @ lower 32 interrupts
22 cmp \irqstat, #0
23 bne 1001f
24
25 eor \base, \base, #0x00070000
26 ldr \irqstat, [\base] @ upper 32 interrupts
27 cmp \irqstat, #0
28 beq 1002f
29 mov \irqnr, #0x20
30
311001:
32 movs \tmp, \irqstat, lsl #16
33 movne \irqstat, \tmp
34 addeq \irqnr, \irqnr, #16
35
36 movs \tmp, \irqstat, lsl #8
37 movne \irqstat, \tmp
38 addeq \irqnr, \irqnr, #8
39
40 movs \tmp, \irqstat, lsl #4
41 movne \irqstat, \tmp
42 addeq \irqnr, \irqnr, #4
43
44 movs \tmp, \irqstat, lsl #2
45 movne \irqstat, \tmp
46 addeq \irqnr, \irqnr, #2
47
48 movs \tmp, \irqstat, lsl #1
49 addeq \irqnr, \irqnr, #1
50 orrs \base, \base, #1
51
521002:
53 .endm