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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2008-08-05 11:14:15 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-08-07 04:55:48 -0400
commita09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch)
tree69689f467179891b498bd7423fcf61925173db31 /include/asm-arm/arch-ebsa285
parenta1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff)
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-ebsa285')
-rw-r--r--include/asm-arm/arch-ebsa285/debug-macro.S57
-rw-r--r--include/asm-arm/arch-ebsa285/dma.h25
-rw-r--r--include/asm-arm/arch-ebsa285/entry-macro.S113
-rw-r--r--include/asm-arm/arch-ebsa285/hardware.h105
-rw-r--r--include/asm-arm/arch-ebsa285/io.h39
-rw-r--r--include/asm-arm/arch-ebsa285/irqs.h98
-rw-r--r--include/asm-arm/arch-ebsa285/memory.h67
-rw-r--r--include/asm-arm/arch-ebsa285/system.h69
-rw-r--r--include/asm-arm/arch-ebsa285/timex.h18
-rw-r--r--include/asm-arm/arch-ebsa285/uncompress.h38
-rw-r--r--include/asm-arm/arch-ebsa285/vmalloc.h10
11 files changed, 0 insertions, 639 deletions
diff --git a/include/asm-arm/arch-ebsa285/debug-macro.S b/include/asm-arm/arch-ebsa285/debug-macro.S
deleted file mode 100644
index b48cec4a0c45..000000000000
--- a/include/asm-arm/arch-ebsa285/debug-macro.S
+++ /dev/null
@@ -1,57 +0,0 @@
1/* linux/include/asm-arm/arch-ebsa285/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <asm/hardware/dec21285.h>
15
16#ifndef CONFIG_DEBUG_DC21285_PORT
17 /* For NetWinder debugging */
18 .macro addruart,rx
19 mrc p15, 0, \rx, c1, c0
20 tst \rx, #1 @ MMU enabled?
21 moveq \rx, #0x7c000000 @ physical
22 movne \rx, #0xff000000 @ virtual
23 orr \rx, \rx, #0x000003f8
24 .endm
25
26#define UART_SHIFT 0
27#define FLOW_CONTROL
28#include <asm/hardware/debug-8250.S>
29
30#else
31 /* For EBSA285 debugging */
32 .equ dc21285_high, ARMCSR_BASE & 0xff000000
33 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
34
35 .macro addruart,rx
36 mrc p15, 0, \rx, c1, c0
37 tst \rx, #1 @ MMU enabled?
38 moveq \rx, #0x42000000
39 movne \rx, #dc21285_high
40 .if dc21285_low
41 orrne \rx, \rx, #dc21285_low
42 .endif
43 .endm
44
45 .macro senduart,rd,rx
46 str \rd, [\rx, #0x160] @ UARTDR
47 .endm
48
49 .macro busyuart,rd,rx
501001: ldr \rd, [\rx, #0x178] @ UARTFLG
51 tst \rd, #1 << 3
52 bne 1001b
53 .endm
54
55 .macro waituart,rd,rx
56 .endm
57#endif
diff --git a/include/asm-arm/arch-ebsa285/dma.h b/include/asm-arm/arch-ebsa285/dma.h
deleted file mode 100644
index 0259ad45d33c..000000000000
--- a/include/asm-arm/arch-ebsa285/dma.h
+++ /dev/null
@@ -1,25 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/dma.h
3 *
4 * Architecture DMA routines
5 *
6 * Copyright (C) 1998,1999 Russell King
7 * Copyright (C) 1998,1999 Philip Blundell
8 */
9#ifndef __ASM_ARCH_DMA_H
10#define __ASM_ARCH_DMA_H
11
12/*
13 * The 21285 has two internal DMA channels; we call these 8 and 9.
14 * On CATS hardware we have an additional eight ISA dma channels
15 * numbered 0..7.
16 */
17#define _ISA_DMA(x) (0+(x))
18#define _DC21285_DMA(x) (8+(x))
19
20#define MAX_DMA_CHANNELS 10
21
22#define DMA_FLOPPY _ISA_DMA(2)
23#define DMA_ISA_CASCADE _ISA_DMA(4)
24
25#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-ebsa285/entry-macro.S b/include/asm-arm/arch-ebsa285/entry-macro.S
deleted file mode 100644
index e203c628d500..000000000000
--- a/include/asm-arm/arch-ebsa285/entry-macro.S
+++ /dev/null
@@ -1,113 +0,0 @@
1/*
2 * include/asm-arm/arch-ebsa285/entry-macro.S
3 *
4 * Low-level IRQ helper macros for footbridge-based platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10#include <asm/arch/hardware.h>
11#include <asm/arch/irqs.h>
12#include <asm/hardware/dec21285.h>
13
14 .equ dc21285_high, ARMCSR_BASE & 0xff000000
15 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff
16
17 .macro disable_fiq
18 .endm
19
20 .macro get_irqnr_preamble, base, tmp
21 mov \base, #dc21285_high
22 .if dc21285_low
23 orr \base, \base, #dc21285_low
24 .endif
25 .endm
26
27 .macro arch_ret_to_user, tmp1, tmp2
28 .endm
29
30 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
31 ldr \irqstat, [\base, #0x180] @ get interrupts
32
33 mov \irqnr, #IRQ_SDRAMPARITY
34 tst \irqstat, #IRQ_MASK_SDRAMPARITY
35 bne 1001f
36
37 tst \irqstat, #IRQ_MASK_UART_RX
38 movne \irqnr, #IRQ_CONRX
39 bne 1001f
40
41 tst \irqstat, #IRQ_MASK_DMA1
42 movne \irqnr, #IRQ_DMA1
43 bne 1001f
44
45 tst \irqstat, #IRQ_MASK_DMA2
46 movne \irqnr, #IRQ_DMA2
47 bne 1001f
48
49 tst \irqstat, #IRQ_MASK_IN0
50 movne \irqnr, #IRQ_IN0
51 bne 1001f
52
53 tst \irqstat, #IRQ_MASK_IN1
54 movne \irqnr, #IRQ_IN1
55 bne 1001f
56
57 tst \irqstat, #IRQ_MASK_IN2
58 movne \irqnr, #IRQ_IN2
59 bne 1001f
60
61 tst \irqstat, #IRQ_MASK_IN3
62 movne \irqnr, #IRQ_IN3
63 bne 1001f
64
65 tst \irqstat, #IRQ_MASK_PCI
66 movne \irqnr, #IRQ_PCI
67 bne 1001f
68
69 tst \irqstat, #IRQ_MASK_DOORBELLHOST
70 movne \irqnr, #IRQ_DOORBELLHOST
71 bne 1001f
72
73 tst \irqstat, #IRQ_MASK_I2OINPOST
74 movne \irqnr, #IRQ_I2OINPOST
75 bne 1001f
76
77 tst \irqstat, #IRQ_MASK_TIMER1
78 movne \irqnr, #IRQ_TIMER1
79 bne 1001f
80
81 tst \irqstat, #IRQ_MASK_TIMER2
82 movne \irqnr, #IRQ_TIMER2
83 bne 1001f
84
85 tst \irqstat, #IRQ_MASK_TIMER3
86 movne \irqnr, #IRQ_TIMER3
87 bne 1001f
88
89 tst \irqstat, #IRQ_MASK_UART_TX
90 movne \irqnr, #IRQ_CONTX
91 bne 1001f
92
93 tst \irqstat, #IRQ_MASK_PCI_ABORT
94 movne \irqnr, #IRQ_PCI_ABORT
95 bne 1001f
96
97 tst \irqstat, #IRQ_MASK_PCI_SERR
98 movne \irqnr, #IRQ_PCI_SERR
99 bne 1001f
100
101 tst \irqstat, #IRQ_MASK_DISCARD_TIMER
102 movne \irqnr, #IRQ_DISCARD_TIMER
103 bne 1001f
104
105 tst \irqstat, #IRQ_MASK_PCI_DPERR
106 movne \irqnr, #IRQ_PCI_DPERR
107 bne 1001f
108
109 tst \irqstat, #IRQ_MASK_PCI_PERR
110 movne \irqnr, #IRQ_PCI_PERR
1111001:
112 .endm
113
diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h
deleted file mode 100644
index 74610c2c63d4..000000000000
--- a/include/asm-arm/arch-ebsa285/hardware.h
+++ /dev/null
@@ -1,105 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/hardware.h
3 *
4 * Copyright (C) 1998-1999 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * This file contains the hardware definitions of the EBSA-285.
11 */
12#ifndef __ASM_ARCH_HARDWARE_H
13#define __ASM_ARCH_HARDWARE_H
14
15#include <asm/arch/memory.h>
16
17/* Virtual Physical Size
18 * 0xff800000 0x40000000 1MB X-Bus
19 * 0xff000000 0x7c000000 1MB PCI I/O space
20 * 0xfe000000 0x42000000 1MB CSR
21 * 0xfd000000 0x78000000 1MB Outbound write flush (not supported)
22 * 0xfc000000 0x79000000 1MB PCI IACK/special space
23 * 0xfb000000 0x7a000000 16MB PCI Config type 1
24 * 0xfa000000 0x7b000000 16MB PCI Config type 0
25 * 0xf9000000 0x50000000 1MB Cache flush
26 * 0xf0000000 0x80000000 16MB ISA memory
27 */
28#define XBUS_SIZE 0x00100000
29#define XBUS_BASE 0xff800000
30
31#define PCIO_SIZE 0x00100000
32#define PCIO_BASE 0xff000000
33
34#define ARMCSR_SIZE 0x00100000
35#define ARMCSR_BASE 0xfe000000
36
37#define WFLUSH_SIZE 0x00100000
38#define WFLUSH_BASE 0xfd000000
39
40#define PCIIACK_SIZE 0x00100000
41#define PCIIACK_BASE 0xfc000000
42
43#define PCICFG1_SIZE 0x01000000
44#define PCICFG1_BASE 0xfb000000
45
46#define PCICFG0_SIZE 0x01000000
47#define PCICFG0_BASE 0xfa000000
48
49#define PCIMEM_SIZE 0x01000000
50#define PCIMEM_BASE 0xf0000000
51
52#define XBUS_LEDS ((volatile unsigned char *)(XBUS_BASE + 0x12000))
53#define XBUS_LED_AMBER (1 << 0)
54#define XBUS_LED_GREEN (1 << 1)
55#define XBUS_LED_RED (1 << 2)
56#define XBUS_LED_TOGGLE (1 << 8)
57
58#define XBUS_SWITCH ((volatile unsigned char *)(XBUS_BASE + 0x12000))
59#define XBUS_SWITCH_SWITCH ((*XBUS_SWITCH) & 15)
60#define XBUS_SWITCH_J17_13 ((*XBUS_SWITCH) & (1 << 4))
61#define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5))
62#define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6))
63
64#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108)
65
66
67/* PIC irq control */
68#define PIC_LO 0x20
69#define PIC_MASK_LO 0x21
70#define PIC_HI 0xA0
71#define PIC_MASK_HI 0xA1
72
73/* GPIO pins */
74#define GPIO_CCLK 0x800
75#define GPIO_DSCLK 0x400
76#define GPIO_E2CLK 0x200
77#define GPIO_IOLOAD 0x100
78#define GPIO_RED_LED 0x080
79#define GPIO_WDTIMER 0x040
80#define GPIO_DATA 0x020
81#define GPIO_IOCLK 0x010
82#define GPIO_DONE 0x008
83#define GPIO_FAN 0x004
84#define GPIO_GREEN_LED 0x002
85#define GPIO_RESET 0x001
86
87/* CPLD pins */
88#define CPLD_DS_ENABLE 8
89#define CPLD_7111_DISABLE 4
90#define CPLD_UNMUTE 2
91#define CPLD_FLASH_WR_ENABLE 1
92
93#ifndef __ASSEMBLY__
94extern void gpio_modify_op(int mask, int set);
95extern void gpio_modify_io(int mask, int in);
96extern int gpio_read(void);
97extern void cpld_modify(int mask, int set);
98#endif
99
100#define pcibios_assign_all_busses() 1
101
102#define PCIBIOS_MIN_IO 0x1000
103#define PCIBIOS_MIN_MEM 0x81000000
104
105#endif
diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h
deleted file mode 100644
index e88c6e230387..000000000000
--- a/include/asm-arm/arch-ebsa285/io.h
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/io.h
3 *
4 * Copyright (C) 1997-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Modifications:
11 * 06-12-1997 RMK Created.
12 * 07-04-1999 RMK Major cleanup
13 */
14#ifndef __ASM_ARM_ARCH_IO_H
15#define __ASM_ARM_ARCH_IO_H
16
17#include <asm/arch/hardware.h>
18
19#define IO_SPACE_LIMIT 0xffff
20
21/*
22 * Translation of various region addresses to virtual addresses
23 */
24#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
25#if 1
26#define __mem_pci(a) (a)
27#else
28
29static inline void __iomem *___mem_pci(void __iomem *p)
30{
31 unsigned long a = (unsigned long)p;
32 BUG_ON(a <= 0xc0000000 || a >= 0xe0000000);
33 return p;
34}
35
36#define __mem_pci(a) ___mem_pci(a)
37#endif
38
39#endif
diff --git a/include/asm-arm/arch-ebsa285/irqs.h b/include/asm-arm/arch-ebsa285/irqs.h
deleted file mode 100644
index 3e766f1cecf1..000000000000
--- a/include/asm-arm/arch-ebsa285/irqs.h
+++ /dev/null
@@ -1,98 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/irqs.h
3 *
4 * Copyright (C) 1998 Russell King
5 * Copyright (C) 1998 Phil Blundell
6 *
7 * Changelog:
8 * 20-Jan-1998 RMK Started merge of EBSA286, CATS and NetWinder
9 * 01-Feb-1999 PJB ISA IRQs start at 0 not 16
10 */
11#include <asm/mach-types.h>
12
13#define NR_IRQS 36
14#define NR_DC21285_IRQS 16
15
16#define _ISA_IRQ(x) (0 + (x))
17#define _ISA_INR(x) ((x) - 0)
18#define _DC21285_IRQ(x) (16 + (x))
19#define _DC21285_INR(x) ((x) - 16)
20
21/*
22 * This is a list of all interrupts that the 21285
23 * can generate and we handle.
24 */
25#define IRQ_CONRX _DC21285_IRQ(0)
26#define IRQ_CONTX _DC21285_IRQ(1)
27#define IRQ_TIMER1 _DC21285_IRQ(2)
28#define IRQ_TIMER2 _DC21285_IRQ(3)
29#define IRQ_TIMER3 _DC21285_IRQ(4)
30#define IRQ_IN0 _DC21285_IRQ(5)
31#define IRQ_IN1 _DC21285_IRQ(6)
32#define IRQ_IN2 _DC21285_IRQ(7)
33#define IRQ_IN3 _DC21285_IRQ(8)
34#define IRQ_DOORBELLHOST _DC21285_IRQ(9)
35#define IRQ_DMA1 _DC21285_IRQ(10)
36#define IRQ_DMA2 _DC21285_IRQ(11)
37#define IRQ_PCI _DC21285_IRQ(12)
38#define IRQ_SDRAMPARITY _DC21285_IRQ(13)
39#define IRQ_I2OINPOST _DC21285_IRQ(14)
40#define IRQ_PCI_ABORT _DC21285_IRQ(15)
41#define IRQ_PCI_SERR _DC21285_IRQ(16)
42#define IRQ_DISCARD_TIMER _DC21285_IRQ(17)
43#define IRQ_PCI_DPERR _DC21285_IRQ(18)
44#define IRQ_PCI_PERR _DC21285_IRQ(19)
45
46#define IRQ_ISA_TIMER _ISA_IRQ(0)
47#define IRQ_ISA_KEYBOARD _ISA_IRQ(1)
48#define IRQ_ISA_CASCADE _ISA_IRQ(2)
49#define IRQ_ISA_UART2 _ISA_IRQ(3)
50#define IRQ_ISA_UART _ISA_IRQ(4)
51#define IRQ_ISA_FLOPPY _ISA_IRQ(6)
52#define IRQ_ISA_PRINTER _ISA_IRQ(7)
53#define IRQ_ISA_RTC_ALARM _ISA_IRQ(8)
54#define IRQ_ISA_2 _ISA_IRQ(9)
55#define IRQ_ISA_PS2MOUSE _ISA_IRQ(12)
56#define IRQ_ISA_HARDDISK1 _ISA_IRQ(14)
57#define IRQ_ISA_HARDDISK2 _ISA_IRQ(15)
58
59#define IRQ_MASK_UART_RX (1 << 2)
60#define IRQ_MASK_UART_TX (1 << 3)
61#define IRQ_MASK_TIMER1 (1 << 4)
62#define IRQ_MASK_TIMER2 (1 << 5)
63#define IRQ_MASK_TIMER3 (1 << 6)
64#define IRQ_MASK_IN0 (1 << 8)
65#define IRQ_MASK_IN1 (1 << 9)
66#define IRQ_MASK_IN2 (1 << 10)
67#define IRQ_MASK_IN3 (1 << 11)
68#define IRQ_MASK_DOORBELLHOST (1 << 15)
69#define IRQ_MASK_DMA1 (1 << 16)
70#define IRQ_MASK_DMA2 (1 << 17)
71#define IRQ_MASK_PCI (1 << 18)
72#define IRQ_MASK_SDRAMPARITY (1 << 24)
73#define IRQ_MASK_I2OINPOST (1 << 25)
74#define IRQ_MASK_PCI_ABORT ((1 << 29) | (1 << 30))
75#define IRQ_MASK_PCI_SERR (1 << 23)
76#define IRQ_MASK_DISCARD_TIMER (1 << 27)
77#define IRQ_MASK_PCI_DPERR (1 << 28)
78#define IRQ_MASK_PCI_PERR (1 << 31)
79
80/*
81 * Netwinder interrupt allocations
82 */
83#define IRQ_NETWINDER_ETHER10 IRQ_IN0
84#define IRQ_NETWINDER_ETHER100 IRQ_IN1
85#define IRQ_NETWINDER_VIDCOMP IRQ_IN2
86#define IRQ_NETWINDER_PS2MOUSE _ISA_IRQ(5)
87#define IRQ_NETWINDER_IR _ISA_IRQ(6)
88#define IRQ_NETWINDER_BUTTON _ISA_IRQ(10)
89#define IRQ_NETWINDER_VGA _ISA_IRQ(11)
90#define IRQ_NETWINDER_SOUND _ISA_IRQ(12)
91
92#undef RTC_IRQ
93#define RTC_IRQ IRQ_ISA_RTC_ALARM
94#define I8042_KBD_IRQ IRQ_ISA_KEYBOARD
95#define I8042_AUX_IRQ (machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE)
96#define IRQ_FLOPPYDISK IRQ_ISA_FLOPPY
97
98#define irq_canonicalize(_i) (((_i) == IRQ_ISA_CASCADE) ? IRQ_ISA_2 : _i)
diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h
deleted file mode 100644
index 9019a3bf5ab9..000000000000
--- a/include/asm-arm/arch-ebsa285/memory.h
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/memory.h
3 *
4 * Copyright (C) 1996-1999 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Changelog:
11 * 20-Oct-1996 RMK Created
12 * 31-Dec-1997 RMK Fixed definitions to reduce warnings.
13 * 17-May-1998 DAG Added __virt_to_bus and __bus_to_virt functions.
14 * 21-Nov-1998 RMK Changed __virt_to_bus and __bus_to_virt to macros.
15 * 21-Mar-1999 RMK Added PAGE_OFFSET for co285 architecture.
16 * Renamed to memory.h
17 * Moved PAGE_OFFSET and TASK_SIZE here
18 */
19#ifndef __ASM_ARCH_MEMORY_H
20#define __ASM_ARCH_MEMORY_H
21
22
23#if defined(CONFIG_FOOTBRIDGE_ADDIN)
24/*
25 * If we may be using add-in footbridge mode, then we must
26 * use the out-of-line translation that makes use of the
27 * PCI BAR
28 */
29#ifndef __ASSEMBLY__
30extern unsigned long __virt_to_bus(unsigned long);
31extern unsigned long __bus_to_virt(unsigned long);
32#endif
33
34#elif defined(CONFIG_FOOTBRIDGE_HOST)
35
36#define __virt_to_bus(x) ((x) - 0xe0000000)
37#define __bus_to_virt(x) ((x) + 0xe0000000)
38
39#else
40
41#error "Undefined footbridge mode"
42
43#endif
44
45/* Task size and page offset at 3GB */
46#define TASK_SIZE UL(0xbf000000)
47#define PAGE_OFFSET UL(0xc0000000)
48
49/*
50 * Cache flushing area.
51 */
52#define FLUSH_BASE 0xf9000000
53
54/*
55 * Physical DRAM offset.
56 */
57#define PHYS_OFFSET UL(0x00000000)
58
59/*
60 * This decides where the kernel will search for a free chunk of vm
61 * space during mmap's.
62 */
63#define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
64
65#define FLUSH_BASE_PHYS 0x50000000
66
67#endif
diff --git a/include/asm-arm/arch-ebsa285/system.h b/include/asm-arm/arch-ebsa285/system.h
deleted file mode 100644
index a720bf7ca123..000000000000
--- a/include/asm-arm/arch-ebsa285/system.h
+++ /dev/null
@@ -1,69 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/system.h
3 *
4 * Copyright (C) 1996-1999 Russell King.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <asm/hardware/dec21285.h>
11#include <asm/io.h>
12#include <asm/arch/hardware.h>
13#include <asm/leds.h>
14#include <asm/mach-types.h>
15
16static inline void arch_idle(void)
17{
18 cpu_do_idle();
19}
20
21static inline void arch_reset(char mode)
22{
23 if (mode == 's') {
24 /*
25 * Jump into the ROM
26 */
27 cpu_reset(0x41000000);
28 } else {
29 if (machine_is_netwinder()) {
30 /* open up the SuperIO chip
31 */
32 outb(0x87, 0x370);
33 outb(0x87, 0x370);
34
35 /* aux function group 1 (logical device 7)
36 */
37 outb(0x07, 0x370);
38 outb(0x07, 0x371);
39
40 /* set GP16 for WD-TIMER output
41 */
42 outb(0xe6, 0x370);
43 outb(0x00, 0x371);
44
45 /* set a RED LED and toggle WD_TIMER for rebooting
46 */
47 outb(0xc4, 0x338);
48 } else {
49 /*
50 * Force the watchdog to do a CPU reset.
51 *
52 * After making sure that the watchdog is disabled
53 * (so we can change the timer registers) we first
54 * enable the timer to autoreload itself. Next, the
55 * timer interval is set really short and any
56 * current interrupt request is cleared (so we can
57 * see an edge transition). Finally, TIMER4 is
58 * enabled as the watchdog.
59 */
60 *CSR_SA110_CNTL &= ~(1 << 13);
61 *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
62 TIMER_CNTL_AUTORELOAD |
63 TIMER_CNTL_DIV16;
64 *CSR_TIMER4_LOAD = 0x2;
65 *CSR_TIMER4_CLR = 0;
66 *CSR_SA110_CNTL |= (1 << 13);
67 }
68 }
69}
diff --git a/include/asm-arm/arch-ebsa285/timex.h b/include/asm-arm/arch-ebsa285/timex.h
deleted file mode 100644
index df60b3812d96..000000000000
--- a/include/asm-arm/arch-ebsa285/timex.h
+++ /dev/null
@@ -1,18 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/timex.h
3 *
4 * Copyright (C) 1998 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * EBSA285 architecture timex specifications
11 */
12
13/*
14 * We assume a constant here; this satisfies the maths in linux/timex.h
15 * and linux/time.h. CLOCK_TICK_RATE is actually system dependent, but
16 * this must be a constant.
17 */
18#define CLOCK_TICK_RATE (50000000/16)
diff --git a/include/asm-arm/arch-ebsa285/uncompress.h b/include/asm-arm/arch-ebsa285/uncompress.h
deleted file mode 100644
index 86142c882b3a..000000000000
--- a/include/asm-arm/arch-ebsa285/uncompress.h
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/uncompress.h
3 *
4 * Copyright (C) 1996-1999 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <asm/mach-types.h>
11
12/*
13 * Note! This could cause problems on the NetWinder
14 */
15#define DC21285_BASE ((volatile unsigned int *)0x42000160)
16#define SER0_BASE ((volatile unsigned char *)0x7c0003f8)
17
18static inline void putc(char c)
19{
20 if (machine_is_netwinder()) {
21 while ((SER0_BASE[5] & 0x60) != 0x60)
22 barrier();
23 SER0_BASE[0] = c;
24 } else {
25 while (DC21285_BASE[6] & 8);
26 DC21285_BASE[0] = c;
27 }
28}
29
30static inline void flush(void)
31{
32}
33
34/*
35 * nothing to do
36 */
37#define arch_decomp_setup()
38#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-ebsa285/vmalloc.h b/include/asm-arm/arch-ebsa285/vmalloc.h
deleted file mode 100644
index e487d7e8c8a6..000000000000
--- a/include/asm-arm/arch-ebsa285/vmalloc.h
+++ /dev/null
@@ -1,10 +0,0 @@
1/*
2 * linux/include/asm-arm/arch-ebsa285/vmalloc.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9
10#define VMALLOC_END (PAGE_OFFSET + 0x30000000)