[ARM] Move FLUSH_BASE macros to asm/arch/memory.h

FLUSH_BASE must be visible to arch/arm/mm/init.c in order for the
memory region to be setup.  Move these definitions from
asm-arm/arch-*/hardware.h into asm-arm/arch-*/memory.h where mm
stuff can see them.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

2 files changed, 12 insertions, 7 deletions

diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h
index 2ef2200f108c..ec51fe92483b 100644
--- a/include/asm-arm/arch-ebsa285/hardware.h
+++ b/include/asm-arm/arch-ebsa285/hardware.h
@@ -48,9 +48,6 @@
 #define PCICFG0_SIZE            0x01000000
 #define PCICFG0_BASE            0xfa000000
 
-#define FLUSH_SIZE              0x00100000
-#define FLUSH_BASE              0xf9000000
-
 #define PCIMEM_SIZE             0x01000000
 #define PCIMEM_BASE             0xf0000000
 
@@ -61,9 +58,6 @@
 #define PCIMEM_SIZE             0x80000000
 #define PCIMEM_BASE             0x80000000
 
-#define FLUSH_SIZE              0x00100000
-#define FLUSH_BASE              0x7e000000
-
 #define WFLUSH_SIZE             0x01000000
 #define WFLUSH_BASE             0x7d000000
 
@@ -94,7 +88,6 @@
 #define XBUS_SWITCH_J17_11      ((*XBUS_SWITCH) & (1 << 5))
 #define XBUS_SWITCH_J17_9       ((*XBUS_SWITCH) & (1 << 6))
 
-#define FLUSH_BASE_PHYS         0x50000000
 #define UNCACHEABLE_ADDR        (ARMCSR_BASE + 0x108)
 
 
diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h
index 09e335cd687d..99181ffc7e27 100644
--- a/include/asm-arm/arch-ebsa285/memory.h
+++ b/include/asm-arm/arch-ebsa285/memory.h
@@ -49,12 +49,22 @@ extern unsigned long __bus_to_virt(unsigned long);
 #define TASK_SIZE               UL(0xbf000000)
 #define PAGE_OFFSET             UL(0xc0000000)
 
+/*
+ * Cache flushing area.
+ */
+#define FLUSH_BASE              0xf9000000
+
 #elif defined(CONFIG_ARCH_CO285)
 
 /* Task size and page offset at 1.5GB */
 #define TASK_SIZE               UL(0x5f000000)
 #define PAGE_OFFSET             UL(0x60000000)
 
+/*
+ * Cache flushing area.
+ */
+#define FLUSH_BASE              0x7e000000
+
 #else
 
 #error "Undefined footbridge architecture"
@@ -72,4 +82,6 @@ extern unsigned long __bus_to_virt(unsigned long);
  */
 #define TASK_UNMAPPED_BASE ((TASK_SIZE + 0x01000000) / 3)
 
+#define FLUSH_BASE_PHYS         0x50000000
+
 #endif