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authorLinus Torvalds <torvalds@g5.osdl.org>2006-04-10 19:45:24 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-04-10 19:45:24 -0400
commit30d41bfbfb40bc6615e62eaa17fead79e3083c32 (patch)
treeb570a428b88e5cde113236c9cb208cdc1045ffb3 /include/asm-arm/arch-ebsa285/hardware.h
parente38d557896c4213dd0919770feac0f4a8f60151b (diff)
parent1356c1948da967bc1d4c663762bfe21dfcec4b2f (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 3473/1: Use numbers 0-15 for the VFP double registers [ARM] 3472/1: Use the D variants of FLDMIA/FSTMIA on ARMv6 [ARM] 3471/1: FTOSI functions should return 0 for NaN [ARM] 3470/1: Clear the HWCAP bits for the disabled kernel features [ARM] 3469/1: S3C24XX: clkout missing hclk selector [ARM] 3468/1: S3C2410: SMDK common include fix [ARM] 3461/1: ARM: OMAP: Fix clk_get() when using id and name [ARM] 3460/1: ARM: OMAP: Remove unnecessary nop_release() [ARM] 3459/1: ixp23xx: fix debug serial macros for big-endian operation [ARM] Allow decompressor to be built with -ffunction-sections [ARM] Fix SA110/SA1100 cache flushing [ARM] ebsa110: Fix incorrect serial port address [ARM] Fix ebsa110 debug macros [ARM] Move FLUSH_BASE macros to asm/arch/memory.h [ARM] Remove unnecessary extra parens in include/asm-arm/memory.h [ARM] arm's arch_local_page_offset() fix against 2.6.17-rc1
Diffstat (limited to 'include/asm-arm/arch-ebsa285/hardware.h')
-rw-r--r--include/asm-arm/arch-ebsa285/hardware.h7
1 files changed, 0 insertions, 7 deletions
diff --git a/include/asm-arm/arch-ebsa285/hardware.h b/include/asm-arm/arch-ebsa285/hardware.h
index 2ef2200f108c..ec51fe92483b 100644
--- a/include/asm-arm/arch-ebsa285/hardware.h
+++ b/include/asm-arm/arch-ebsa285/hardware.h
@@ -48,9 +48,6 @@
48#define PCICFG0_SIZE 0x01000000 48#define PCICFG0_SIZE 0x01000000
49#define PCICFG0_BASE 0xfa000000 49#define PCICFG0_BASE 0xfa000000
50 50
51#define FLUSH_SIZE 0x00100000
52#define FLUSH_BASE 0xf9000000
53
54#define PCIMEM_SIZE 0x01000000 51#define PCIMEM_SIZE 0x01000000
55#define PCIMEM_BASE 0xf0000000 52#define PCIMEM_BASE 0xf0000000
56 53
@@ -61,9 +58,6 @@
61#define PCIMEM_SIZE 0x80000000 58#define PCIMEM_SIZE 0x80000000
62#define PCIMEM_BASE 0x80000000 59#define PCIMEM_BASE 0x80000000
63 60
64#define FLUSH_SIZE 0x00100000
65#define FLUSH_BASE 0x7e000000
66
67#define WFLUSH_SIZE 0x01000000 61#define WFLUSH_SIZE 0x01000000
68#define WFLUSH_BASE 0x7d000000 62#define WFLUSH_BASE 0x7d000000
69 63
@@ -94,7 +88,6 @@
94#define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5)) 88#define XBUS_SWITCH_J17_11 ((*XBUS_SWITCH) & (1 << 5))
95#define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6)) 89#define XBUS_SWITCH_J17_9 ((*XBUS_SWITCH) & (1 << 6))
96 90
97#define FLUSH_BASE_PHYS 0x50000000
98#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108) 91#define UNCACHEABLE_ADDR (ARMCSR_BASE + 0x108)
99 92
100 93