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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-12 17:17:12 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-12 17:17:12 -0400
commit4aabab2181f20560948c2045ce1faaa9ac1507a8 (patch)
tree6556e126687c9cbb4b4a35a8ad8c327df30ac256 /include/asm-arm/arch-davinci/gpio.h
parentbb50cbbd4beacd5ceda76c32fcb116c67fe8c66c (diff)
parentca9ced7f6798868f9d2c81a59b49f8c2136685d8 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (50 commits) [ARM] sa1100: remove boot time RTC initialisation [ARM] sa1100: stop doing our own rtc management over suspend [ARM] 4474/1: Do not check the PSR_F_BIT in valid_user_regs [ARM] 4473/2: Take the HWCAP definitions out of the elf.h file [ARM] pxa: move platform devices to separate header file [ARM] pxa: move device registration into CPU-specific file [ARM] pxa: remove boot time RTC initialisation [ARM] pxa: stop doing our own rtc management over suspend [ARM] 4451/1: pxa: make dma.c generic and remove cpu specific dma code [ARM] 4450/1: pxa: add pxa25x_init_irq() and pxa27x_init_irq() [ARM] 4440/1: PXA: enable the checking of ICIP2 for IRQs [ARM] 4438/1: PXA: remove #ifdef .. #endif from pxa_gpio_demux_handler() [ARM] 4437/1: PXA: move the GPIO IRQ initialization code to pxa_init_irq_gpio() [ARM] 4436/1: PXA: move low IRQ initialization code to pxa_init_irq_low() [ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQS [ARM] 4434/1: PXA: remove PXA_IRQ_SKIP [ARM] pxa: Fix PXA27x suspend type validation, remove pxa_pm_prepare() [ARM] pxa: move pm_ops structure into CPU specific files [ARM] pxa: introduce cpu_is_pxaXXX macros [ARM] pxa: remove MMC register defines from pxa-regs.h ...
Diffstat (limited to 'include/asm-arm/arch-davinci/gpio.h')
-rw-r--r--include/asm-arm/arch-davinci/gpio.h156
1 files changed, 156 insertions, 0 deletions
diff --git a/include/asm-arm/arch-davinci/gpio.h b/include/asm-arm/arch-davinci/gpio.h
new file mode 100644
index 000000000000..ea24a0e0bfd6
--- /dev/null
+++ b/include/asm-arm/arch-davinci/gpio.h
@@ -0,0 +1,156 @@
1/*
2 * TI DaVinci GPIO Support
3 *
4 * Copyright (c) 2006 David Brownell
5 * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#ifndef __DAVINCI_GPIO_H
14#define __DAVINCI_GPIO_H
15
16/*
17 * basic gpio routines
18 *
19 * board-specific init should be done by arch/.../.../board-XXX.c (maybe
20 * initializing banks together) rather than boot loaders; kexec() won't
21 * go through boot loaders.
22 *
23 * the gpio clock will be turned on when gpios are used, and you may also
24 * need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are
25 * used as gpios, not with other peripherals.
26 *
27 * GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, and maybe
28 * for later updates, code should write GPIO(N) or:
29 * - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53)
30 * - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70)
31 *
32 * For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc
33 * for now, that's != GPIO(N)
34 */
35#define GPIO(X) (X) /* 0 <= X <= 70 */
36#define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */
37#define GPIOV33(X) ((X)+54) /* 3.3V i/o; 0 <= X <= 17 */
38
39struct gpio_controller {
40 u32 dir;
41 u32 out_data;
42 u32 set_data;
43 u32 clr_data;
44 u32 in_data;
45 u32 set_rising;
46 u32 clr_rising;
47 u32 set_falling;
48 u32 clr_falling;
49 u32 intstat;
50};
51
52/* The __gpio_to_controller() and __gpio_mask() functions inline to constants
53 * with constant parameters; or in outlined code they execute at runtime.
54 *
55 * You'd access the controller directly when reading or writing more than
56 * one gpio value at a time, and to support wired logic where the value
57 * being driven by the cpu need not match the value read back.
58 *
59 * These are NOT part of the cross-platform GPIO interface
60 */
61static inline struct gpio_controller *__iomem
62__gpio_to_controller(unsigned gpio)
63{
64 void *__iomem ptr;
65
66 if (gpio < 32)
67 ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10);
68 else if (gpio < 64)
69 ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38);
70 else if (gpio < DAVINCI_N_GPIO)
71 ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60);
72 else
73 ptr = NULL;
74 return ptr;
75}
76
77static inline u32 __gpio_mask(unsigned gpio)
78{
79 return 1 << (gpio % 32);
80}
81
82/* The get/set/clear functions will inline when called with constant
83 * parameters, for low-overhead bitbanging. Illegal constant parameters
84 * cause link-time errors.
85 *
86 * Otherwise, calls with variable parameters use outlined functions.
87 */
88extern int __error_inval_gpio(void);
89
90extern void __gpio_set(unsigned gpio, int value);
91extern int __gpio_get(unsigned gpio);
92
93static inline void gpio_set_value(unsigned gpio, int value)
94{
95 if (__builtin_constant_p(value)) {
96 struct gpio_controller *__iomem g;
97 u32 mask;
98
99 if (gpio >= DAVINCI_N_GPIO)
100 __error_inval_gpio();
101
102 g = __gpio_to_controller(gpio);
103 mask = __gpio_mask(gpio);
104 if (value)
105 __raw_writel(mask, &g->set_data);
106 else
107 __raw_writel(mask, &g->clr_data);
108 return;
109 }
110
111 __gpio_set(gpio, value);
112}
113
114/* Returns zero or nonzero; works for gpios configured as inputs OR
115 * as outputs.
116 *
117 * NOTE: changes in reported values are synchronized to the GPIO clock.
118 * This is most easily seen after calling gpio_set_value() and then immediatly
119 * gpio_get_value(), where the gpio_get_value() would return the old value
120 * until the GPIO clock ticks and the new value gets latched.
121 */
122
123static inline int gpio_get_value(unsigned gpio)
124{
125 struct gpio_controller *__iomem g;
126
127 if (!__builtin_constant_p(gpio))
128 return __gpio_get(gpio);
129
130 if (gpio >= DAVINCI_N_GPIO)
131 return __error_inval_gpio();
132
133 g = __gpio_to_controller(gpio);
134 return !!(__gpio_mask(gpio) & __raw_readl(&g->in_data));
135}
136
137/* powerup default direction is IN */
138extern int gpio_direction_input(unsigned gpio);
139extern int gpio_direction_output(unsigned gpio, int value);
140
141#include <asm-generic/gpio.h> /* cansleep wrappers */
142
143extern int gpio_request(unsigned gpio, const char *tag);
144extern void gpio_free(unsigned gpio);
145
146static inline int gpio_to_irq(unsigned gpio)
147{
148 return DAVINCI_N_AINTC_IRQ + gpio;
149}
150
151static inline int irq_to_gpio(unsigned irq)
152{
153 return irq - DAVINCI_N_AINTC_IRQ;
154}
155
156#endif /* __DAVINCI_GPIO_H */