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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-arm/arch-clps711x
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-arm/arch-clps711x')
-rw-r--r--include/asm-arm/arch-clps711x/autcpu12.h78
-rw-r--r--include/asm-arm/arch-clps711x/debug-macro.S46
-rw-r--r--include/asm-arm/arch-clps711x/dma.h28
-rw-r--r--include/asm-arm/arch-clps711x/entry-macro.S51
-rw-r--r--include/asm-arm/arch-clps711x/hardware.h238
-rw-r--r--include/asm-arm/arch-clps711x/io.h37
-rw-r--r--include/asm-arm/arch-clps711x/irqs.h53
-rw-r--r--include/asm-arm/arch-clps711x/memory.h128
-rw-r--r--include/asm-arm/arch-clps711x/param.h19
-rw-r--r--include/asm-arm/arch-clps711x/syspld.h121
-rw-r--r--include/asm-arm/arch-clps711x/system.h38
-rw-r--r--include/asm-arm/arch-clps711x/time.h48
-rw-r--r--include/asm-arm/arch-clps711x/timex.h23
-rw-r--r--include/asm-arm/arch-clps711x/uncompress.h67
-rw-r--r--include/asm-arm/arch-clps711x/vmalloc.h31
15 files changed, 1006 insertions, 0 deletions
diff --git a/include/asm-arm/arch-clps711x/autcpu12.h b/include/asm-arm/arch-clps711x/autcpu12.h
new file mode 100644
index 000000000000..1588a365f610
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/autcpu12.h
@@ -0,0 +1,78 @@
1/*
2 * AUTCPU12 specific defines
3 *
4 * (c) 2001 Thomas Gleixner, autronix automation <gleixner@autronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_AUTCPU12_H
21#define __ASM_ARCH_AUTCPU12_H
22
23/*
24 * The CS8900A ethernet chip has its I/O registers wired to chip select 2
25 * (nCS2). This is the mapping for it.
26 */
27#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE /* physical */
28#define AUTCPU12_VIRT_CS8900A (0xfe000000) /* virtual */
29
30/*
31 * The flash bank is wired to chip select 0
32 */
33#define AUTCPU12_PHYS_FLASH CS0_PHYS_BASE /* physical */
34
35/* offset for device specific information structure */
36#define AUTCPU12_LCDINFO_OFFS (0x00010000)
37/*
38* Videomemory is the internal SRAM (CS 6)
39*/
40#define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE
41#define AUTCPU12_VIRT_VIDEO (0xfd000000)
42
43/*
44* All special IO's are tied to CS1
45*/
46#define AUTCPU12_PHYS_CHAR_LCD CS1_PHYS_BASE +0x00000000 /* physical */
47
48#define AUTCPU12_PHYS_NVRAM CS1_PHYS_BASE +0x02000000 /* physical */
49
50#define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */
51
52#define AUTCPU12_PHYS_SMC CS1_PHYS_BASE +0x06000000 /* physical */
53
54#define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */
55
56#define AUTCPU12_PHYS_TOUCH CS1_PHYS_BASE +0x0A000000 /* physical */
57
58#define AUTCPU12_PHYS_IO CS1_PHYS_BASE +0x0C000000 /* physical */
59
60#define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */
61
62/*
63* defines for smartmedia card access
64*/
65#define AUTCPU12_SMC_RDY (1<<2)
66#define AUTCPU12_SMC_ALE (1<<3)
67#define AUTCPU12_SMC_CLE (1<<4)
68#define AUTCPU12_SMC_PORT_OFFSET PBDR
69#define AUTCPU12_SMC_SELECT_OFFSET 0x10
70/*
71* defines for lcd contrast
72*/
73#define AUTCPU12_DPOT_PORT_OFFSET PEDR
74#define AUTCPU12_DPOT_CS (1<<0)
75#define AUTCPU12_DPOT_CLK (1<<1)
76#define AUTCPU12_DPOT_UD (1<<2)
77
78#endif
diff --git a/include/asm-arm/arch-clps711x/debug-macro.S b/include/asm-arm/arch-clps711x/debug-macro.S
new file mode 100644
index 000000000000..bc0a5760722b
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/debug-macro.S
@@ -0,0 +1,46 @@
1/* linux/include/asm-arm/arch-clps711x/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14#include <asm/hardware/clps7111.h>
15
16 .macro addruart,rx
17 mrc p15, 0, \rx, c1, c0
18 tst \rx, #1 @ MMU enabled?
19 moveq \rx, #CLPS7111_PHYS_BASE
20 movne \rx, #CLPS7111_VIRT_BASE
21#ifndef CONFIG_DEBUG_CLPS711X_UART2
22 add \rx, \rx, #0x0000 @ UART1
23#else
24 add \rx, \rx, #0x1000 @ UART2
25#endif
26 .endm
27
28 .macro senduart,rd,rx
29 str \rd, [\rx, #0x0480] @ UARTDR
30 .endm
31
32 .macro waituart,rd,rx
331001: ldr \rd, [\rx, #0x0140] @ SYSFLGx
34 tst \rd, #1 << 11 @ UBUSYx
35 bne 1001b
36 .endm
37
38 .macro busyuart,rd,rx
39 tst \rx, #0x1000 @ UART2 does not have CTS here
40 bne 1002f
411001: ldr \rd, [\rx, #0x0140] @ SYSFLGx
42 tst \rd, #1 << 8 @ CTS
43 bne 1001b
441002:
45 .endm
46
diff --git a/include/asm-arm/arch-clps711x/dma.h b/include/asm-arm/arch-clps711x/dma.h
new file mode 100644
index 000000000000..3c4c5c843252
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/dma.h
@@ -0,0 +1,28 @@
1/*
2 * linux/include/asm-arm/arch-clps711x/dma.h
3 *
4 * Copyright (C) 1997,1998 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_DMA_H
21#define __ASM_ARCH_DMA_H
22
23#define MAX_DMA_ADDRESS 0xffffffff
24
25#define MAX_DMA_CHANNELS 0
26
27#endif /* _ASM_ARCH_DMA_H */
28
diff --git a/include/asm-arm/arch-clps711x/entry-macro.S b/include/asm-arm/arch-clps711x/entry-macro.S
new file mode 100644
index 000000000000..b31079a1d4a9
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/entry-macro.S
@@ -0,0 +1,51 @@
1/*
2 * include/asm-arm/arch-CLPS711x/entry-macro.S
3 *
4 * Low-level IRQ helper macros for CLPS711X-based platforms
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10#include <asm/hardware/clps7111.h>
11
12 .macro disable_fiq
13 .endm
14
15#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1)
16#error INTSR stride != INTMR stride
17#endif
18
19 .macro get_irqnr_and_base, irqnr, stat, base, mask
20 mov \base, #CLPS7111_BASE
21 ldr \stat, [\base, #INTSR1]
22 ldr \mask, [\base, #INTMR1]
23 mov \irqnr, #4
24 mov \mask, \mask, lsl #16
25 and \stat, \stat, \mask, lsr #16
26 movs \stat, \stat, lsr #4
27 bne 1001f
28
29 add \base, \base, #INTSR2 - INTSR1
30 ldr \stat, [\base, #INTSR1]
31 ldr \mask, [\base, #INTMR1]
32 mov \irqnr, #16
33 mov \mask, \mask, lsl #16
34 and \stat, \stat, \mask, lsr #16
35
361001: tst \stat, #255
37 addeq \irqnr, \irqnr, #8
38 moveq \stat, \stat, lsr #8
39 tst \stat, #15
40 addeq \irqnr, \irqnr, #4
41 moveq \stat, \stat, lsr #4
42 tst \stat, #3
43 addeq \irqnr, \irqnr, #2
44 moveq \stat, \stat, lsr #2
45 tst \stat, #1
46 addeq \irqnr, \irqnr, #1
47 moveq \stat, \stat, lsr #1
48 tst \stat, #1 @ bit 0 should be set
49 .endm
50
51
diff --git a/include/asm-arm/arch-clps711x/hardware.h b/include/asm-arm/arch-clps711x/hardware.h
new file mode 100644
index 000000000000..1386871e1a5a
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/hardware.h
@@ -0,0 +1,238 @@
1/*
2 * linux/include/asm-arm/arch-clps711x/hardware.h
3 *
4 * This file contains the hardware definitions of the Prospector P720T.
5 *
6 * Copyright (C) 2000 Deep Blue Solutions Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#ifndef __ASM_ARCH_HARDWARE_H
23#define __ASM_ARCH_HARDWARE_H
24
25#include <linux/config.h>
26
27#define CLPS7111_VIRT_BASE 0xff000000
28#define CLPS7111_BASE CLPS7111_VIRT_BASE
29
30/*
31 * The physical addresses that the external chip select signals map to is
32 * dependent on the setting of the nMEDCHG signal on EP7211 and EP7212
33 * processors. CONFIG_EP72XX_BOOT_ROM is only available if these
34 * processors are in use.
35 */
36#ifndef CONFIG_EP72XX_ROM_BOOT
37#define CS0_PHYS_BASE (0x00000000)
38#define CS1_PHYS_BASE (0x10000000)
39#define CS2_PHYS_BASE (0x20000000)
40#define CS3_PHYS_BASE (0x30000000)
41#define CS4_PHYS_BASE (0x40000000)
42#define CS5_PHYS_BASE (0x50000000)
43#define CS6_PHYS_BASE (0x60000000)
44#define CS7_PHYS_BASE (0x70000000)
45#else
46#define CS0_PHYS_BASE (0x70000000)
47#define CS1_PHYS_BASE (0x60000000)
48#define CS2_PHYS_BASE (0x50000000)
49#define CS3_PHYS_BASE (0x40000000)
50#define CS4_PHYS_BASE (0x30000000)
51#define CS5_PHYS_BASE (0x20000000)
52#define CS6_PHYS_BASE (0x10000000)
53#define CS7_PHYS_BASE (0x00000000)
54#endif
55
56#if defined (CONFIG_ARCH_EP7211)
57
58#define EP7211_VIRT_BASE CLPS7111_VIRT_BASE
59#define EP7211_BASE CLPS7111_VIRT_BASE
60#include <asm/hardware/ep7211.h>
61
62#elif defined (CONFIG_ARCH_EP7212)
63
64#define EP7212_VIRT_BASE CLPS7111_VIRT_BASE
65#define EP7212_BASE CLPS7111_VIRT_BASE
66#include <asm/hardware/ep7212.h>
67
68#endif
69
70#define SYSPLD_VIRT_BASE 0xfe000000
71#define SYSPLD_BASE SYSPLD_VIRT_BASE
72
73#ifndef __ASSEMBLER__
74
75#define PCIO_BASE IO_BASE
76
77#endif
78
79
80#if defined (CONFIG_ARCH_AUTCPU12)
81
82#define CS89712_VIRT_BASE CLPS7111_VIRT_BASE
83#define CS89712_BASE CLPS7111_VIRT_BASE
84
85#include <asm/hardware/clps7111.h>
86#include <asm/hardware/ep7212.h>
87#include <asm/hardware/cs89712.h>
88
89#endif
90
91
92#if defined (CONFIG_ARCH_CDB89712)
93
94#include <asm/hardware/clps7111.h>
95#include <asm/hardware/ep7212.h>
96#include <asm/hardware/cs89712.h>
97
98/* dynamic ioremap() areas */
99#define FLASH_START 0x00000000
100#define FLASH_SIZE 0x800000
101#define FLASH_WIDTH 4
102
103#define SRAM_START 0x60000000
104#define SRAM_SIZE 0xc000
105#define SRAM_WIDTH 4
106
107#define BOOTROM_START 0x70000000
108#define BOOTROM_SIZE 0x80
109#define BOOTROM_WIDTH 4
110
111
112/* static cdb89712_map_io() areas */
113#define REGISTER_START 0x80000000
114#define REGISTER_SIZE 0x4000
115#define REGISTER_BASE 0xff000000
116
117#define ETHER_START 0x20000000
118#define ETHER_SIZE 0x1000
119#define ETHER_BASE 0xfe000000
120
121#endif
122
123
124#if defined (CONFIG_ARCH_EDB7211)
125
126/*
127 * The extra 8 lines of the keyboard matrix are wired to chip select 3 (nCS3)
128 * and repeat across it. This is the mapping for it.
129 *
130 * In jumpered boot mode, nCS3 is mapped to 0x4000000, not 0x3000000. This
131 * was cause for much consternation and headscratching. This should probably
132 * be made a compile/run time kernel option.
133 */
134#define EP7211_PHYS_EXTKBD CS3_PHYS_BASE /* physical */
135
136#define EP7211_VIRT_EXTKBD (0xfd000000) /* virtual */
137
138
139/*
140 * The CS8900A ethernet chip has its I/O registers wired to chip select 2
141 * (nCS2). This is the mapping for it.
142 *
143 * In jumpered boot mode, nCS2 is mapped to 0x5000000, not 0x2000000. This
144 * was cause for much consternation and headscratching. This should probably
145 * be made a compile/run time kernel option.
146 */
147#define EP7211_PHYS_CS8900A CS2_PHYS_BASE /* physical */
148
149#define EP7211_VIRT_CS8900A (0xfc000000) /* virtual */
150
151
152/*
153 * The two flash banks are wired to chip selects 0 and 1. This is the mapping
154 * for them.
155 *
156 * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running
157 * in jumpered boot mode.
158 */
159#define EP7211_PHYS_FLASH1 CS0_PHYS_BASE /* physical */
160#define EP7211_PHYS_FLASH2 CS1_PHYS_BASE /* physical */
161
162#define EP7211_VIRT_FLASH1 (0xfa000000) /* virtual */
163#define EP7211_VIRT_FLASH2 (0xfb000000) /* virtual */
164
165#endif /* CONFIG_ARCH_EDB7211 */
166
167
168/*
169 * Relevant bits in port D, which controls power to the various parts of
170 * the LCD on the EDB7211.
171 */
172#define EDB_PD1_LCD_DC_DC_EN (1<<1)
173#define EDB_PD2_LCDEN (1<<2)
174#define EDB_PD3_LCDBL (1<<3)
175
176
177#if defined (CONFIG_ARCH_CEIVA)
178
179#define CEIVA_VIRT_BASE CLPS7111_VIRT_BASE
180#define CEIVA_BASE CLPS7111_VIRT_BASE
181
182#include <asm/hardware/clps7111.h>
183#include <asm/hardware/ep7212.h>
184
185
186/*
187 * The two flash banks are wired to chip selects 0 and 1. This is the mapping
188 * for them.
189 *
190 * nCS0 and nCS1 are at 0x70000000 and 0x60000000, respectively, when running
191 * in jumpered boot mode.
192 */
193#define CEIVA_PHYS_FLASH1 CS0_PHYS_BASE /* physical */
194#define CEIVA_PHYS_FLASH2 CS1_PHYS_BASE /* physical */
195
196#define CEIVA_VIRT_FLASH1 (0xfa000000) /* virtual */
197#define CEIVA_VIRT_FLASH2 (0xfb000000) /* virtual */
198
199#define CEIVA_FLASH_SIZE 0x100000
200#define CEIVA_FLASH_WIDTH 2
201
202#define SRAM_START 0x60000000
203#define SRAM_SIZE 0xc000
204#define SRAM_WIDTH 4
205
206#define BOOTROM_START 0x70000000
207#define BOOTROM_SIZE 0x80
208#define BOOTROM_WIDTH 4
209
210/*
211 * SED1355 LCD controller
212 */
213#define CEIVA_PHYS_SED1355 CS2_PHYS_BASE
214#define CEIVA_VIRT_SED1355 (0xfc000000)
215
216/*
217 * Relevant bits in port D, which controls power to the various parts of
218 * the LCD on the Ceiva Photo Max, and reset to the LCD controller.
219 */
220
221// Reset line to SED1355 (must be high to operate)
222#define CEIVA_PD1_LCDRST (1<<1)
223// LCD panel enable (set to one, to enable LCD)
224#define CEIVA_PD4_LCDEN (1<<4)
225// Backlight (set to one, to turn on backlight
226#define CEIVA_PD5_LCDBL (1<<5)
227
228/*
229 * Relevant bits in port B, which report the status of the buttons.
230 */
231
232// White button
233#define CEIVA_PB4_WHT_BTN (1<<4)
234// Black button
235#define CEIVA_PB0_BLK_BTN (1<<0)
236#endif // #if defined (CONFIG_ARCH_CEIVA)
237
238#endif
diff --git a/include/asm-arm/arch-clps711x/io.h b/include/asm-arm/arch-clps711x/io.h
new file mode 100644
index 000000000000..14d7e8da5453
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/io.h
@@ -0,0 +1,37 @@
1/*
2 * linux/include/asm-arm/arch-clps711x/io.h
3 *
4 * Copyright (C) 1999 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARM_ARCH_IO_H
21#define __ASM_ARM_ARCH_IO_H
22
23#define IO_SPACE_LIMIT 0xffffffff
24
25#define __io(a) ((void __iomem *)(a))
26#define __mem_pci(a) (a)
27#define __mem_isa(a) (a)
28
29/*
30 * We don't support ins[lb]/outs[lb]. Make them fault.
31 */
32#define __raw_readsb(p,d,l) do { *(int *)0 = 0; } while (0)
33#define __raw_readsl(p,d,l) do { *(int *)0 = 0; } while (0)
34#define __raw_writesb(p,d,l) do { *(int *)0 = 0; } while (0)
35#define __raw_writesl(p,d,l) do { *(int *)0 = 0; } while (0)
36
37#endif
diff --git a/include/asm-arm/arch-clps711x/irqs.h b/include/asm-arm/arch-clps711x/irqs.h
new file mode 100644
index 000000000000..76025dc87637
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/irqs.h
@@ -0,0 +1,53 @@
1/*
2 * linux/include/asm-arm/arch-clps711x/irqs.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21/*
22 * Interrupts from INTSR1
23 */
24#define IRQ_CSINT 4
25#define IRQ_EINT1 5
26#define IRQ_EINT2 6
27#define IRQ_EINT3 7
28#define IRQ_TC1OI 8
29#define IRQ_TC2OI 9
30#define IRQ_RTCMI 10
31#define IRQ_TINT 11
32#define IRQ_UTXINT1 12
33#define IRQ_URXINT1 13
34#define IRQ_UMSINT 14
35#define IRQ_SSEOTI 15
36
37#define INT1_IRQS (0x0000fff0)
38#define INT1_ACK_IRQS (0x00004f10)
39
40/*
41 * Interrupts from INTSR2
42 */
43#define IRQ_KBDINT (16+0) /* bit 0 */
44#define IRQ_SS2RX (16+1) /* bit 1 */
45#define IRQ_SS2TX (16+2) /* bit 2 */
46#define IRQ_UTXINT2 (16+12) /* bit 12 */
47#define IRQ_URXINT2 (16+13) /* bit 13 */
48
49#define INT2_IRQS (0x30070000)
50#define INT2_ACK_IRQS (0x00010000)
51
52#define NR_IRQS 30
53
diff --git a/include/asm-arm/arch-clps711x/memory.h b/include/asm-arm/arch-clps711x/memory.h
new file mode 100644
index 000000000000..bd978947db42
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/memory.h
@@ -0,0 +1,128 @@
1/*
2 * linux/include/asm-arm/arch-clps711x/memory.h
3 *
4 * Copyright (C) 1999 ARM Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_MEMORY_H
21#define __ASM_ARCH_MEMORY_H
22
23#include <linux/config.h>
24
25/*
26 * Physical DRAM offset.
27 */
28#define PHYS_OFFSET (0xc0000000UL)
29
30/*
31 * Virtual view <-> DMA view memory address translations
32 * virt_to_bus: Used to translate the virtual address to an
33 * address suitable to be passed to set_dma_addr
34 * bus_to_virt: Used to convert an address for DMA operations
35 * to an address that the kernel can use.
36 */
37
38#if defined(CONFIG_ARCH_CDB89712)
39
40#define __virt_to_bus(x) (x)
41#define __bus_to_virt(x) (x)
42
43#elif defined (CONFIG_ARCH_AUTCPU12)
44
45#define __virt_to_bus(x) (x)
46#define __bus_to_virt(x) (x)
47
48#else
49
50#define __virt_to_bus(x) ((x) - PAGE_OFFSET)
51#define __bus_to_virt(x) ((x) + PAGE_OFFSET)
52
53#endif
54
55
56/*
57 * Like the SA1100, the EDB7211 has a large gap between physical RAM
58 * banks. In 2.2, the Psion (CL-PS7110) port added custom support for
59 * discontiguous physical memory. In 2.4, we can use the standard
60 * Linux NUMA support.
61 *
62 * This is not necessary for EP7211 implementations with only one used
63 * memory bank. For those systems, simply undefine CONFIG_DISCONTIGMEM.
64 */
65
66#ifdef CONFIG_DISCONTIGMEM
67/*
68 * Because of the wide memory address space between physical RAM banks on the
69 * SA1100, it's much more convenient to use Linux's NUMA support to implement
70 * our memory map representation. Assuming all memory nodes have equal access
71 * characteristics, we then have generic discontiguous memory support.
72 *
73 * Of course, all this isn't mandatory for SA1100 implementations with only
74 * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM.
75 *
76 * The nodes are matched with the physical memory bank addresses which are
77 * incidentally the same as virtual addresses.
78 *
79 * node 0: 0xc0000000 - 0xc7ffffff
80 * node 1: 0xc8000000 - 0xcfffffff
81 * node 2: 0xd0000000 - 0xd7ffffff
82 * node 3: 0xd8000000 - 0xdfffffff
83 */
84
85/*
86 * Given a kernel address, find the home node of the underlying memory.
87 */
88#define KVADDR_TO_NID(addr) \
89 (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MAX_MEM_SHIFT)
90
91/*
92 * Given a page frame number, convert it to a node id.
93 */
94#define PFN_TO_NID(pfn) \
95 (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MAX_MEM_SHIFT - PAGE_SHIFT))
96
97/*
98 * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
99 * and returns the mem_map of that node.
100 */
101#define ADDR_TO_MAPBASE(kaddr) \
102 NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr)))
103
104#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn))
105
106/*
107 * Given a kaddr, LOCAL_MAR_NR finds the owning node of the memory
108 * and returns the index corresponding to the appropriate page in the
109 * node's mem_map.
110 */
111#define LOCAL_MAP_NR(addr) \
112 (((unsigned long)(addr) & (NODE_MAX_MEM_SIZE - 1)) >> PAGE_SHIFT)
113
114/*
115 * The PS7211 allows up to 256MB max per DRAM bank, but the EDB7211
116 * uses only one of the two banks (bank #1). However, even within
117 * bank #1, memory is discontiguous.
118 *
119 * The EDB7211 has two 8MB DRAM areas with 8MB of empty space between
120 * them, so we use 24 for the node max shift to get 16MB node sizes.
121 */
122#define NODE_MAX_MEM_SHIFT 24
123#define NODE_MAX_MEM_SIZE (1<<NODE_MAX_MEM_SHIFT)
124
125#endif /* CONFIG_DISCONTIGMEM */
126
127#endif
128
diff --git a/include/asm-arm/arch-clps711x/param.h b/include/asm-arm/arch-clps711x/param.h
new file mode 100644
index 000000000000..86f6bd29623d
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/param.h
@@ -0,0 +1,19 @@
1/*
2 * linux/include/asm-arm/arch-clps711x/param.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
diff --git a/include/asm-arm/arch-clps711x/syspld.h b/include/asm-arm/arch-clps711x/syspld.h
new file mode 100644
index 000000000000..960578a22a8e
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/syspld.h
@@ -0,0 +1,121 @@
1/*
2 * linux/include/asm-arm/arch-clps711x/syspld.h
3 *
4 * System Control PLD register definitions.
5 *
6 * Copyright (C) 2000 Deep Blue Solutions Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22#ifndef __ASM_ARCH_SYSPLD_H
23#define __ASM_ARCH_SYSPLD_H
24
25#define SYSPLD_PHYS_BASE (0x10000000)
26
27#ifndef __ASSEMBLY__
28#include <asm/types.h>
29
30#define SYSPLD_REG(type,off) (*(volatile type *)(SYSPLD_BASE + off))
31#else
32#define SYSPLD_REG(type,off) (off)
33#endif
34
35#define PLD_INT SYSPLD_REG(u32, 0x000000)
36#define PLD_INT_PENIRQ (1 << 5)
37#define PLD_INT_UCB_IRQ (1 << 1)
38#define PLD_INT_KBD_ATN (1 << 0) /* EINT1 */
39
40#define PLD_PWR SYSPLD_REG(u32, 0x000004)
41#define PLD_PWR_EXT (1 << 5)
42#define PLD_PWR_MODE (1 << 4) /* 1 = PWM, 0 = PFM */
43#define PLD_S4_ON (1 << 3) /* LCD bias voltage enable */
44#define PLD_S3_ON (1 << 2) /* LCD backlight enable */
45#define PLD_S2_ON (1 << 1) /* LCD 3V3 supply enable */
46#define PLD_S1_ON (1 << 0) /* LCD 3V supply enable */
47
48#define PLD_KBD SYSPLD_REG(u32, 0x000008)
49#define PLD_KBD_WAKE (1 << 1)
50#define PLD_KBD_EN (1 << 0)
51
52#define PLD_SPI SYSPLD_REG(u32, 0x00000c)
53#define PLD_SPI_EN (1 << 0)
54
55#define PLD_IO SYSPLD_REG(u32, 0x000010)
56#define PLD_IO_BOOTSEL (1 << 6) /* boot sel switch */
57#define PLD_IO_USER (1 << 5) /* user defined switch */
58#define PLD_IO_LED3 (1 << 4)
59#define PLD_IO_LED2 (1 << 3)
60#define PLD_IO_LED1 (1 << 2)
61#define PLD_IO_LED0 (1 << 1)
62#define PLD_IO_LEDEN (1 << 0)
63
64#define PLD_IRDA SYSPLD_REG(u32, 0x000014)
65#define PLD_IRDA_EN (1 << 0)
66
67#define PLD_COM2 SYSPLD_REG(u32, 0x000018)
68#define PLD_COM2_EN (1 << 0)
69
70#define PLD_COM1 SYSPLD_REG(u32, 0x00001c)
71#define PLD_COM1_EN (1 << 0)
72
73#define PLD_AUD SYSPLD_REG(u32, 0x000020)
74#define PLD_AUD_DIV1 (1 << 6)
75#define PLD_AUD_DIV0 (1 << 5)
76#define PLD_AUD_CLK_SEL1 (1 << 4)
77#define PLD_AUD_CLK_SEL0 (1 << 3)
78#define PLD_AUD_MIC_PWR (1 << 2)
79#define PLD_AUD_MIC_GAIN (1 << 1)
80#define PLD_AUD_CODEC_EN (1 << 0)
81
82#define PLD_CF SYSPLD_REG(u32, 0x000024)
83#define PLD_CF2_SLEEP (1 << 5)
84#define PLD_CF1_SLEEP (1 << 4)
85#define PLD_CF2_nPDREQ (1 << 3)
86#define PLD_CF1_nPDREQ (1 << 2)
87#define PLD_CF2_nIRQ (1 << 1)
88#define PLD_CF1_nIRQ (1 << 0)
89
90#define PLD_SDC SYSPLD_REG(u32, 0x000028)
91#define PLD_SDC_INT_EN (1 << 2)
92#define PLD_SDC_WP (1 << 1)
93#define PLD_SDC_CD (1 << 0)
94
95#define PLD_FPGA SYSPLD_REG(u32, 0x00002c)
96
97#define PLD_CODEC SYSPLD_REG(u32, 0x400000)
98#define PLD_CODEC_IRQ3 (1 << 4)
99#define PLD_CODEC_IRQ2 (1 << 3)
100#define PLD_CODEC_IRQ1 (1 << 2)
101#define PLD_CODEC_EN (1 << 0)
102
103#define PLD_BRITE SYSPLD_REG(u32, 0x400004)
104#define PLD_BRITE_UP (1 << 1)
105#define PLD_BRITE_DN (1 << 0)
106
107#define PLD_LCDEN SYSPLD_REG(u32, 0x400008)
108#define PLD_LCDEN_EN (1 << 0)
109
110#define PLD_ID SYSPLD_REG(u32, 0x40000c)
111
112#define PLD_TCH SYSPLD_REG(u32, 0x400010)
113#define PLD_TCH_PENIRQ (1 << 1)
114#define PLD_TCH_EN (1 << 0)
115
116#define PLD_GPIO SYSPLD_REG(u32, 0x400014)
117#define PLD_GPIO2 (1 << 2)
118#define PLD_GPIO1 (1 << 1)
119#define PLD_GPIO0 (1 << 0)
120
121#endif
diff --git a/include/asm-arm/arch-clps711x/system.h b/include/asm-arm/arch-clps711x/system.h
new file mode 100644
index 000000000000..2ab981fee37f
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/system.h
@@ -0,0 +1,38 @@
1/*
2 * linux/include/asm-arm/arch-clps711x/system.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_SYSTEM_H
21#define __ASM_ARCH_SYSTEM_H
22
23#include <asm/hardware/clps7111.h>
24
25static inline void arch_idle(void)
26{
27 clps_writel(1, HALT);
28 __asm__ __volatile__(
29 "mov r0, r0\n\
30 mov r0, r0");
31}
32
33static inline void arch_reset(char mode)
34{
35 cpu_reset(0);
36}
37
38#endif
diff --git a/include/asm-arm/arch-clps711x/time.h b/include/asm-arm/arch-clps711x/time.h
new file mode 100644
index 000000000000..9cb27cd4e6ae
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/time.h
@@ -0,0 +1,48 @@
1/*
2 * linux/include/asm-arm/arch-clps711x/time.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <asm/leds.h>
21#include <asm/hardware/clps7111.h>
22
23extern void clps711x_setup_timer(void);
24
25/*
26 * IRQ handler for the timer
27 */
28static irqreturn_t
29p720t_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
30{
31 do_leds();
32 do_timer(regs);
33#ifndef CONFIG_SMP
34 update_process_times(user_mode(regs));
35#endif
36 do_profile(regs);
37 return IRQ_HANDLED;
38}
39
40/*
41 * Set up timer interrupt, and return the current time in seconds.
42 */
43void __init time_init(void)
44{
45 clps711x_setup_timer();
46 timer_irq.handler = p720t_timer_interrupt;
47 setup_irq(IRQ_TC2OI, &timer_irq);
48}
diff --git a/include/asm-arm/arch-clps711x/timex.h b/include/asm-arm/arch-clps711x/timex.h
new file mode 100644
index 000000000000..dcbb381da3dd
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/timex.h
@@ -0,0 +1,23 @@
1/*
2 * linux/include/asm-arm/arch-clps711x/timex.h
3 *
4 * Prospector 720T architecture timex specifications
5 *
6 * Copyright (C) 2000 Deep Blue Solutions Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#define CLOCK_TICK_RATE 512000
diff --git a/include/asm-arm/arch-clps711x/uncompress.h b/include/asm-arm/arch-clps711x/uncompress.h
new file mode 100644
index 000000000000..7d0ab791b16c
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/uncompress.h
@@ -0,0 +1,67 @@
1/*
2 * linux/include/asm-arm/arch-clps711x/uncompress.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <linux/config.h>
21#include <asm/arch/io.h>
22#include <asm/arch/hardware.h>
23#include <asm/hardware/clps7111.h>
24
25#undef CLPS7111_BASE
26#define CLPS7111_BASE CLPS7111_PHYS_BASE
27
28#define barrier() __asm__ __volatile__("": : :"memory")
29#define __raw_readl(p) (*(unsigned long *)(p))
30#define __raw_writel(v,p) (*(unsigned long *)(p) = (v))
31
32#ifdef CONFIG_DEBUG_CLPS711X_UART2
33#define SYSFLGx SYSFLG2
34#define UARTDRx UARTDR2
35#else
36#define SYSFLGx SYSFLG1
37#define UARTDRx UARTDR1
38#endif
39
40/*
41 * This does not append a newline
42 */
43static void putstr(const char *s)
44{
45 char c;
46
47 while ((c = *s++) != '\0') {
48 while (clps_readl(SYSFLGx) & SYSFLG_UTXFF)
49 barrier();
50 clps_writel(c, UARTDRx);
51
52 if (c == '\n') {
53 while (clps_readl(SYSFLGx) & SYSFLG_UTXFF)
54 barrier();
55 clps_writel('\r', UARTDRx);
56 }
57 }
58 while (clps_readl(SYSFLGx) & SYSFLG_UBUSY)
59 barrier();
60}
61
62/*
63 * nothing to do
64 */
65#define arch_decomp_setup()
66
67#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-clps711x/vmalloc.h b/include/asm-arm/arch-clps711x/vmalloc.h
new file mode 100644
index 000000000000..42571ed5e493
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/vmalloc.h
@@ -0,0 +1,31 @@
1/*
2 * linux/include/asm-arm/arch-clps711x/vmalloc.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21/*
22 * Just any arbitrary offset to the start of the vmalloc VM area: the
23 * current 8MB value just means that there will be a 8MB "hole" after the
24 * physical memory until the kernel virtual memory starts. That means that
25 * any out-of-bounds memory accesses will hopefully be caught.
26 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
27 * area for the same reason. ;)
28 */
29#define VMALLOC_OFFSET (8*1024*1024)
30#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
31#define VMALLOC_END (PAGE_OFFSET + 0x10000000)
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-24 15:16:16 -0400