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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-03-28 04:24:33 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-03-28 04:24:33 -0500
commita081568d7016061ed848696984e3acf1ba0b3054 (patch)
tree5a6cd28d51e3c0b694499f4d0795b22a3d020eba /include/asm-arm/arch-clps711x/uncompress.h
parent3747b36eeab93d8969e86987bbc1d44971229b26 (diff)
[ARM] Fix decompressor serial IO to give CRLF not LFCR
As per the corresponding change to the serial drivers, arrange for ARM decompressors to give CRLF. Move the common putstr code into misc.c such that machines only need to supply "putc" and "flush" functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-clps711x/uncompress.h')
-rw-r--r--include/asm-arm/arch-clps711x/uncompress.h21
1 files changed, 7 insertions, 14 deletions
diff --git a/include/asm-arm/arch-clps711x/uncompress.h b/include/asm-arm/arch-clps711x/uncompress.h
index 9fc4bcfa1681..07157b7e4b20 100644
--- a/include/asm-arm/arch-clps711x/uncompress.h
+++ b/include/asm-arm/arch-clps711x/uncompress.h
@@ -25,7 +25,6 @@
25#undef CLPS7111_BASE 25#undef CLPS7111_BASE
26#define CLPS7111_BASE CLPS7111_PHYS_BASE 26#define CLPS7111_BASE CLPS7111_PHYS_BASE
27 27
28#define barrier() __asm__ __volatile__("": : :"memory")
29#define __raw_readl(p) (*(unsigned long *)(p)) 28#define __raw_readl(p) (*(unsigned long *)(p))
30#define __raw_writel(v,p) (*(unsigned long *)(p) = (v)) 29#define __raw_writel(v,p) (*(unsigned long *)(p) = (v))
31 30
@@ -40,21 +39,15 @@
40/* 39/*
41 * This does not append a newline 40 * This does not append a newline
42 */ 41 */
43static void putstr(const char *s) 42static inline void putc(int c)
44{ 43{
45 char c; 44 while (clps_readl(SYSFLGx) & SYSFLG_UTXFF)
46 45 barrier();
47 while ((c = *s++) != '\0') { 46 clps_writel(c, UARTDRx);
48 while (clps_readl(SYSFLGx) & SYSFLG_UTXFF) 47}
49 barrier();
50 clps_writel(c, UARTDRx);
51 48
52 if (c == '\n') { 49static inline void flush(void)
53 while (clps_readl(SYSFLGx) & SYSFLG_UTXFF) 50{
54 barrier();
55 clps_writel('\r', UARTDRx);
56 }
57 }
58 while (clps_readl(SYSFLGx) & SYSFLG_UBUSY) 51 while (clps_readl(SYSFLGx) & SYSFLG_UBUSY)
59 barrier(); 52 barrier();
60} 53}