diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-11-04 12:28:34 -0500 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2005-11-04 12:28:34 -0500 |
commit | d56c524afaa87ae224b5821ef101891ce076c321 (patch) | |
tree | a35ad97919e7559443509a0e0c8ae72f41be7d9e /include/asm-arm/arch-clps711x/hardware.h | |
parent | 866237eafc60637a2c9875167486f61d86892c6b (diff) |
[PATCH] ARM: Reverted 2918/1: [update] Base port of Comdial MP1000 platfrom
No longer maintained
Diffstat (limited to 'include/asm-arm/arch-clps711x/hardware.h')
-rw-r--r-- | include/asm-arm/arch-clps711x/hardware.h | 117 |
1 files changed, 0 insertions, 117 deletions
diff --git a/include/asm-arm/arch-clps711x/hardware.h b/include/asm-arm/arch-clps711x/hardware.h index f864c367c934..1386871e1a5a 100644 --- a/include/asm-arm/arch-clps711x/hardware.h +++ b/include/asm-arm/arch-clps711x/hardware.h | |||
@@ -235,121 +235,4 @@ | |||
235 | #define CEIVA_PB0_BLK_BTN (1<<0) | 235 | #define CEIVA_PB0_BLK_BTN (1<<0) |
236 | #endif // #if defined (CONFIG_ARCH_CEIVA) | 236 | #endif // #if defined (CONFIG_ARCH_CEIVA) |
237 | 237 | ||
238 | #if defined (CONFIG_MACH_MP1000) | ||
239 | /* NOR FLASH */ | ||
240 | #define MP1000_NIO_BASE 0xf9000000 /* virtual */ | ||
241 | #define MP1000_NIO_START CS0_PHYS_BASE /* physical */ | ||
242 | #define MP1000_NIO_SIZE 0x00400000 | ||
243 | |||
244 | /* DSP Interface */ | ||
245 | #define MP1000_DSP_BASE 0xfa000000 /* virtual */ | ||
246 | #define MP1000_DSP_START CS1_PHYS_BASE /* physical */ | ||
247 | #define MP1000_DSP_SIZE 0x00100000 | ||
248 | |||
249 | /* LCD, DAA/DSP, RTC, DAA RW Reg all in CS2 */ | ||
250 | #define MP1000_LIO_BASE 0xfb000000 /* virtual */ | ||
251 | #define MP1000_LIO_START CS2_PHYS_BASE /* physical */ | ||
252 | #define MP1000_LIO_SIZE 0x00100000 | ||
253 | |||
254 | /* NAND FLASH */ | ||
255 | #define MP1000_FIO_BASE 0xfc000000 /* virtual */ | ||
256 | #define MP1000_FIO_START CS3_PHYS_BASE /* physical */ | ||
257 | #define MP1000_FIO_SIZE 0x00800000 | ||
258 | |||
259 | /* Ethernet */ | ||
260 | #define MP1000_EIO_BASE 0xfd000000 /* virtual */ | ||
261 | #define MP1000_EIO_START CS4_PHYS_BASE /* physical */ | ||
262 | #define MP1000_EIO_SIZE 0x00100000 | ||
263 | |||
264 | #define MP1000_LCD_OFFSET 0x00000000 /* LCD offset in CS2 */ | ||
265 | #define MP1000_DDD_OFFSET 0x00001000 /* DAA/DAI/DSP sft reset offst*/ | ||
266 | #define MP1000_RTC_OFFSET 0x00002000 /* RTC offset in CS2 */ | ||
267 | #define MP1000_DAA_OFFSET 0x00003000 /* DAA RW reg offset in CS2 */ | ||
268 | |||
269 | /* IDE */ | ||
270 | #define MP1000_IDE_BASE 0xfe000000 /* virtual */ | ||
271 | #define MP1000_IDE_START CS5_PHYS_BASE /* physical */ | ||
272 | #define MP1000_IDE_SIZE 0x00100000 /* actually it's only 0x1000 */ | ||
273 | |||
274 | #define IRQ_HARDDISK IRQ_EINT2 | ||
275 | |||
276 | /* | ||
277 | * IDE registers definition | ||
278 | */ | ||
279 | |||
280 | #define IDE_CONTROL_BASE (MP1000_IDE_BASE + 0x1000) | ||
281 | #define IDE_BASE_OFF (MP1000_IDE_BASE) | ||
282 | |||
283 | #define IDE_WRITE_DEVICE_DATA (IDE_BASE_OFF + 0x0) | ||
284 | #define IDE_FEATURES_REGISTER (IDE_BASE_OFF + 0x2) | ||
285 | #define IDE_SECTOR_COUNT_REGISTER (IDE_BASE_OFF + 0x4) | ||
286 | #define IDE_SECTOR_NUMBER_REGISTER (IDE_BASE_OFF + 0x6) | ||
287 | #define IDE_CYLINDER_LOW_REGISTER (IDE_BASE_OFF + 0x8) | ||
288 | #define IDE_CYLINDER_HIGH_REGISTER (IDE_BASE_OFF + 0xa) | ||
289 | #define IDE_DEVICE_HEAD_REGISTER (IDE_BASE_OFF + 0xc) | ||
290 | #define IDE_COMMAND_DATA_REGISTER (IDE_BASE_OFF + 0xe) | ||
291 | #define IDE_DEVICE_CONTROL_REGISTER (IDE_CONTROL_BASE + 0xc) | ||
292 | |||
293 | #define IDE_IRQ IRQ_EINT2 | ||
294 | |||
295 | |||
296 | #define RTC_PORT(x) (MP1000_LIO_BASE+0x2000 + (x*2)) | ||
297 | #define RTC_ALWAYS_BCD 0 | ||
298 | |||
299 | /* | ||
300 | // Definitions of the bit fields in the HwPortA register for the | ||
301 | // MP1000 board. | ||
302 | */ | ||
303 | #define HwPortAKeyboardRow1 0x00000001 | ||
304 | #define HwPortAKeyboardRow2 0x00000002 | ||
305 | #define HwPortAKeyboardRow3 0x00000004 | ||
306 | #define HwPortAKeyboardRow4 0x00000008 | ||
307 | #define HwPortAKeyboardRow5 0x00000010 | ||
308 | #define HwPortAKeyboardRow6 0x00000020 | ||
309 | #define HwPortALCDEnable 0x00000040 | ||
310 | #define HwPortAOffhook 0x00000080 | ||
311 | |||
312 | /* | ||
313 | // Definitions of the bit fields in the HwPortB register for the | ||
314 | // MP1000 board. | ||
315 | */ | ||
316 | #define HwPortBL3Mode 0x00000001 | ||
317 | #define HwPortBL3Clk 0x00000002 | ||
318 | #define HwPortBSClk 0x00000001 | ||
319 | #define HwPortBSData 0x00000002 | ||
320 | #define HwPortBL3Data 0x00000004 | ||
321 | #define HwPortBMute 0x00000008 | ||
322 | #define HwPortBQD0 0x00000010 | ||
323 | #define HwPortBQD1 0x00000020 | ||
324 | #define HwPortBQD2 0x00000040 | ||
325 | #define HwPortBQD3 0x00000080 | ||
326 | |||
327 | /* | ||
328 | // Definitions of the bit fields in the HwPortD register for the | ||
329 | // MP1000 board. | ||
330 | */ | ||
331 | #define HwPortDLED1 0x00000001 | ||
332 | #define HwPortDLED2 0x00000002 | ||
333 | #define HwPortDLED3 0x00000004 | ||
334 | #define HwPortDLED4 0x00000008 | ||
335 | #define HwPortDLED5 0x00000010 | ||
336 | #define HwPortDEECS 0x00000020 | ||
337 | #define HwPortBRTS 0x00000040 | ||
338 | #define HwPortBRI 0x00000080 | ||
339 | |||
340 | |||
341 | /* | ||
342 | // Definitions of the bit fields in the HwPortE register for the | ||
343 | // MP1000 board. | ||
344 | */ | ||
345 | |||
346 | #define HwPortECLE 0x00000001 | ||
347 | #define HwPortESepromDOut 0x00000001 | ||
348 | #define HwPortEALE 0x00000002 | ||
349 | #define HwPortESepromDIn 0x00000002 | ||
350 | #define HwPortENANDCS 0x00000004 | ||
351 | #define HwPortESepromCLK 0x00000004 | ||
352 | |||
353 | #endif // #if defined (CONFIG_MACH_MP1000) | ||
354 | |||
355 | #endif | 238 | #endif |