diff options
author | Andrew Victor <andrew@sanpeople.com> | 2006-06-20 14:27:34 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-06-20 14:27:34 -0400 |
commit | d6bdbb8ef3e4a9cafc747e1444b4908f9f2f548d (patch) | |
tree | 04945fd4a850b68b8c110ed4a5b5c2aa4a1a64c1 /include/asm-arm/arch-at91rm9200 | |
parent | afefc4158f3c8529e4bb99c1dc119fd792bac220 (diff) |
[ARM] 3603/1: AT91RM9200 remove old files
Patch from Andrew Victor
This patch removes the now unnecessary
include/asm-arm/arch-at91rm9200/pio.h file. The pin configuration is
now handled in the platform-device setup code
(arch/arm/mach-at91rm9200/devices.c).
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91rm9200')
-rw-r--r-- | include/asm-arm/arch-at91rm9200/pio.h | 115 |
1 files changed, 0 insertions, 115 deletions
diff --git a/include/asm-arm/arch-at91rm9200/pio.h b/include/asm-arm/arch-at91rm9200/pio.h deleted file mode 100644 index a89501b4a703..000000000000 --- a/include/asm-arm/arch-at91rm9200/pio.h +++ /dev/null | |||
@@ -1,115 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-arm/arch-at91rm9200/pio.h | ||
3 | * | ||
4 | * Copyright (C) 2003 SAN People | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_PIO_H | ||
14 | #define __ASM_ARCH_PIO_H | ||
15 | |||
16 | #include <asm/arch/hardware.h> | ||
17 | |||
18 | static inline void AT91_CfgPIO_USART0(void) { | ||
19 | at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA17_TXD0 | AT91_PA18_RXD0 | AT91_PA20_CTS0); | ||
20 | |||
21 | /* | ||
22 | * Errata #39 - RTS0 is not internally connected to PA21. We need to drive | ||
23 | * the pin manually. Default is off (RTS is active low). | ||
24 | */ | ||
25 | at91_sys_write(AT91_PIOA + PIO_PER, AT91_PA21_RTS0); | ||
26 | at91_sys_write(AT91_PIOA + PIO_OER, AT91_PA21_RTS0); | ||
27 | at91_sys_write(AT91_PIOA + PIO_SODR, AT91_PA21_RTS0); | ||
28 | } | ||
29 | |||
30 | static inline void AT91_CfgPIO_USART1(void) { | ||
31 | at91_sys_write(AT91_PIOB + PIO_PDR, AT91_PB18_RI1 | AT91_PB19_DTR1 | ||
32 | | AT91_PB20_TXD1 | AT91_PB21_RXD1 | AT91_PB23_DCD1 | ||
33 | | AT91_PB24_CTS1 | AT91_PB25_DSR1 | AT91_PB26_RTS1); | ||
34 | } | ||
35 | |||
36 | static inline void AT91_CfgPIO_USART2(void) { | ||
37 | at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA22_RXD2 | AT91_PA23_TXD2); | ||
38 | } | ||
39 | |||
40 | static inline void AT91_CfgPIO_USART3(void) { | ||
41 | at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA5_TXD3 | AT91_PA6_RXD3); | ||
42 | at91_sys_write(AT91_PIOA + PIO_BSR, AT91_PA5_TXD3 | AT91_PA6_RXD3); | ||
43 | } | ||
44 | |||
45 | static inline void AT91_CfgPIO_DBGU(void) { | ||
46 | at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA31_DTXD | AT91_PA30_DRXD); | ||
47 | } | ||
48 | |||
49 | /* | ||
50 | * Enable the Two-Wire interface. | ||
51 | */ | ||
52 | static inline void AT91_CfgPIO_TWI(void) { | ||
53 | at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA25_TWD | AT91_PA26_TWCK); | ||
54 | at91_sys_write(AT91_PIOA + PIO_ASR, AT91_PA25_TWD | AT91_PA26_TWCK); | ||
55 | at91_sys_write(AT91_PIOA + PIO_MDER, AT91_PA25_TWD | AT91_PA26_TWCK); /* open drain */ | ||
56 | } | ||
57 | |||
58 | /* | ||
59 | * Enable the Serial Peripheral Interface. | ||
60 | */ | ||
61 | static inline void AT91_CfgPIO_SPI(void) { | ||
62 | at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA0_MISO | AT91_PA1_MOSI | AT91_PA2_SPCK); | ||
63 | } | ||
64 | |||
65 | static inline void AT91_CfgPIO_SPI_CS0(void) { | ||
66 | at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA3_NPCS0); | ||
67 | } | ||
68 | |||
69 | static inline void AT91_CfgPIO_SPI_CS1(void) { | ||
70 | at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA4_NPCS1); | ||
71 | } | ||
72 | |||
73 | static inline void AT91_CfgPIO_SPI_CS2(void) { | ||
74 | at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA5_NPCS2); | ||
75 | } | ||
76 | |||
77 | static inline void AT91_CfgPIO_SPI_CS3(void) { | ||
78 | at91_sys_write(AT91_PIOA + PIO_PDR, AT91_PA6_NPCS3); | ||
79 | } | ||
80 | |||
81 | /* | ||
82 | * Select the DataFlash card. | ||
83 | */ | ||
84 | static inline void AT91_CfgPIO_DataFlashCard(void) { | ||
85 | at91_sys_write(AT91_PIOB + PIO_PER, AT91_PIO_P(7)); | ||
86 | at91_sys_write(AT91_PIOB + PIO_OER, AT91_PIO_P(7)); | ||
87 | at91_sys_write(AT91_PIOB + PIO_CODR, AT91_PIO_P(7)); | ||
88 | } | ||
89 | |||
90 | /* | ||
91 | * Enable NAND Flash (SmartMedia) interface. | ||
92 | */ | ||
93 | static inline void AT91_CfgPIO_SmartMedia(void) { | ||
94 | /* enable PC0=SMCE, PC1=SMOE, PC3=SMWE, A21=CLE, A22=ALE */ | ||
95 | at91_sys_write(AT91_PIOC + PIO_ASR, AT91_PC0_BFCK | AT91_PC1_BFRDY_SMOE | AT91_PC3_BFBAA_SMWE); | ||
96 | at91_sys_write(AT91_PIOC + PIO_PDR, AT91_PC0_BFCK | AT91_PC1_BFRDY_SMOE | AT91_PC3_BFBAA_SMWE); | ||
97 | |||
98 | /* Configure PC2 as input (signal READY of the SmartMedia) */ | ||
99 | at91_sys_write(AT91_PIOC + PIO_PER, AT91_PC2_BFAVD); /* enable direct output enable */ | ||
100 | at91_sys_write(AT91_PIOC + PIO_ODR, AT91_PC2_BFAVD); /* disable output */ | ||
101 | |||
102 | /* Configure PB1 as input (signal Card Detect of the SmartMedia) */ | ||
103 | at91_sys_write(AT91_PIOB + PIO_PER, AT91_PIO_P(1)); /* enable direct output enable */ | ||
104 | at91_sys_write(AT91_PIOB + PIO_ODR, AT91_PIO_P(1)); /* disable output */ | ||
105 | } | ||
106 | |||
107 | static inline int AT91_PIO_SmartMedia_RDY(void) { | ||
108 | return (at91_sys_read(AT91_PIOC + PIO_PDSR) & AT91_PIO_P(2)) ? 1 : 0; | ||
109 | } | ||
110 | |||
111 | static inline int AT91_PIO_SmartMedia_CardDetect(void) { | ||
112 | return (at91_sys_read(AT91_PIOB + PIO_PDSR) & AT91_PIO_P(1)) ? 1 : 0; | ||
113 | } | ||
114 | |||
115 | #endif | ||