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authorLinus Torvalds <torvalds@g5.osdl.org>2006-03-28 16:53:03 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-03-28 16:53:03 -0500
commitca9ba4471c1203bb6e759b76e83167fec54fe590 (patch)
tree8aeb359631742f77f635cb5ff785bea9132502f9 /include/asm-arm/arch-at91rm9200/uncompress.h
parentd4965b3e2ff94d0c7b7e6e7e9794b54950a2f4b9 (diff)
parentc4713074375c61f939310b04e92090afe29810dc (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 3388/1: ixp23xx: add core ixp23xx support [ARM] 3417/1: add support for logicpd pxa270 card engine [ARM] 3387/1: ixp23xx: add defconfig [ARM] 3377/2: add support for intel xsc3 core [ARM] Move ice-dcc code into misc.c [ARM] Fix decompressor serial IO to give CRLF not LFCR [ARM] proc-v6: mark page table walks outer-cacheable, shared. Enable NX. [ARM] nommu: trivial patch for arch/arm/lib/Makefile [ARM] 3416/1: Update LART site URL [ARM] 3415/1: Akita: Add missing EXPORT_SYMBOL [ARM] 3414/1: ep93xx: reset ethernet controller before uncompressing
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/uncompress.h')
-rw-r--r--include/asm-arm/arch-at91rm9200/uncompress.h23
1 files changed, 12 insertions, 11 deletions
diff --git a/include/asm-arm/arch-at91rm9200/uncompress.h b/include/asm-arm/arch-at91rm9200/uncompress.h
index b30dd5520713..7b38497c24b5 100644
--- a/include/asm-arm/arch-at91rm9200/uncompress.h
+++ b/include/asm-arm/arch-at91rm9200/uncompress.h
@@ -31,21 +31,22 @@
31 * 31 *
32 * This does not append a newline 32 * This does not append a newline
33 */ 33 */
34static void putstr(const char *s) 34static void putc(int c)
35{
36 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
37
38 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY))
39 barrier();
40 __raw_writel(c, sys + AT91_DBGU_THR);
41}
42
43static inline void flush(void)
35{ 44{
36 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */ 45 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
37 46
38 while (*s) {
39 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) { barrier(); }
40 __raw_writel(*s, sys + AT91_DBGU_THR);
41 if (*s == '\n') {
42 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) { barrier(); }
43 __raw_writel('\r', sys + AT91_DBGU_THR);
44 }
45 s++;
46 }
47 /* wait for transmission to complete */ 47 /* wait for transmission to complete */
48 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY)) { barrier(); } 48 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY))
49 barrier();
49} 50}
50 51
51#define arch_decomp_setup() 52#define arch_decomp_setup()