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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-03-28 04:24:33 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-03-28 04:24:33 -0500
commita081568d7016061ed848696984e3acf1ba0b3054 (patch)
tree5a6cd28d51e3c0b694499f4d0795b22a3d020eba /include/asm-arm/arch-at91rm9200/uncompress.h
parent3747b36eeab93d8969e86987bbc1d44971229b26 (diff)
[ARM] Fix decompressor serial IO to give CRLF not LFCR
As per the corresponding change to the serial drivers, arrange for ARM decompressors to give CRLF. Move the common putstr code into misc.c such that machines only need to supply "putc" and "flush" functions. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/uncompress.h')
-rw-r--r--include/asm-arm/arch-at91rm9200/uncompress.h23
1 files changed, 12 insertions, 11 deletions
diff --git a/include/asm-arm/arch-at91rm9200/uncompress.h b/include/asm-arm/arch-at91rm9200/uncompress.h
index b30dd5520713..7b38497c24b5 100644
--- a/include/asm-arm/arch-at91rm9200/uncompress.h
+++ b/include/asm-arm/arch-at91rm9200/uncompress.h
@@ -31,21 +31,22 @@
31 * 31 *
32 * This does not append a newline 32 * This does not append a newline
33 */ 33 */
34static void putstr(const char *s) 34static void putc(int c)
35{
36 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
37
38 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY))
39 barrier();
40 __raw_writel(c, sys + AT91_DBGU_THR);
41}
42
43static inline void flush(void)
35{ 44{
36 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */ 45 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */
37 46
38 while (*s) {
39 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) { barrier(); }
40 __raw_writel(*s, sys + AT91_DBGU_THR);
41 if (*s == '\n') {
42 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) { barrier(); }
43 __raw_writel('\r', sys + AT91_DBGU_THR);
44 }
45 s++;
46 }
47 /* wait for transmission to complete */ 47 /* wait for transmission to complete */
48 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY)) { barrier(); } 48 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY))
49 barrier();
49} 50}
50 51
51#define arch_decomp_setup() 52#define arch_decomp_setup()