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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-28 17:40:39 -0400 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-09-28 17:40:39 -0400 |
commit | ebdea46fecae40c4d7effcd33f40918a37a1df4b (patch) | |
tree | e4312bf7f1f3d184738963a0ec300aa9fdfd55c1 /include/asm-arm/arch-at91rm9200/hardware.h | |
parent | fecf3404f4aba6d0edeba31eeb018cbb6326dff2 (diff) | |
parent | 250d375d1da45a5e08ab8baf5eaa7eb258afd82b (diff) |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (130 commits)
[ARM] 3856/1: Add clocksource for Intel IXP4xx platforms
[ARM] 3855/1: Add generic time support
[ARM] 3873/1: S3C24XX: Add irq_chip names
[ARM] 3872/1: S3C24XX: Apply consistant tabbing to irq_chips
[ARM] 3871/1: S3C24XX: Fix ordering of EINT4..23
[ARM] nommu: confirms the CR_V bit in nommu mode
[ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores.
[ARM] 3870/1: AT91: Start removing static memory mappings
[ARM] 3869/1: AT91: NAND support for DK and KB9202 boards
[ARM] 3868/1: AT91 hardware header update
[ARM] 3867/1: AT91 GPIO update
[ARM] 3866/1: AT91 clock update
[ARM] 3865/1: AT91RM9200 header updates
[ARM] 3862/2: S3C2410 - add basic power management support for AML M5900 series
[ARM] kthread: switch arch/arm/kernel/apm.c
[ARM] Off-by-one in arch/arm/common/icst*
[ARM] 3864/1: Refactore sharpsl_pm
[ARM] 3863/1: Add Locomo SPI Device
[ARM] 3847/2: Convert LOMOMO to use struct device for GPIOs
[ARM] Use CPU_CACHE_* where possible in asm/cacheflush.h
...
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/hardware.h')
-rw-r--r-- | include/asm-arm/arch-at91rm9200/hardware.h | 28 |
1 files changed, 6 insertions, 22 deletions
diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h index 235d39d91107..6551b4d1ff7b 100644 --- a/include/asm-arm/arch-at91rm9200/hardware.h +++ b/include/asm-arm/arch-at91rm9200/hardware.h | |||
@@ -34,27 +34,14 @@ | |||
34 | * Virtual to Physical Address mapping for IO devices. | 34 | * Virtual to Physical Address mapping for IO devices. |
35 | */ | 35 | */ |
36 | #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) | 36 | #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) |
37 | #define AT91_VA_BASE_SPI AT91_IO_P2V(AT91_BASE_SPI) | 37 | #define AT91_VA_BASE_SPI AT91_IO_P2V(AT91RM9200_BASE_SPI) |
38 | #define AT91_VA_BASE_SSC2 AT91_IO_P2V(AT91_BASE_SSC2) | 38 | #define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC) |
39 | #define AT91_VA_BASE_SSC1 AT91_IO_P2V(AT91_BASE_SSC1) | 39 | #define AT91_VA_BASE_TWI AT91_IO_P2V(AT91RM9200_BASE_TWI) |
40 | #define AT91_VA_BASE_SSC0 AT91_IO_P2V(AT91_BASE_SSC0) | 40 | #define AT91_VA_BASE_MCI AT91_IO_P2V(AT91RM9200_BASE_MCI) |
41 | #define AT91_VA_BASE_US3 AT91_IO_P2V(AT91_BASE_US3) | 41 | #define AT91_VA_BASE_UDP AT91_IO_P2V(AT91RM9200_BASE_UDP) |
42 | #define AT91_VA_BASE_US2 AT91_IO_P2V(AT91_BASE_US2) | ||
43 | #define AT91_VA_BASE_US1 AT91_IO_P2V(AT91_BASE_US1) | ||
44 | #define AT91_VA_BASE_US0 AT91_IO_P2V(AT91_BASE_US0) | ||
45 | #define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91_BASE_EMAC) | ||
46 | #define AT91_VA_BASE_TWI AT91_IO_P2V(AT91_BASE_TWI) | ||
47 | #define AT91_VA_BASE_MCI AT91_IO_P2V(AT91_BASE_MCI) | ||
48 | #define AT91_VA_BASE_UDP AT91_IO_P2V(AT91_BASE_UDP) | ||
49 | #define AT91_VA_BASE_TCB1 AT91_IO_P2V(AT91_BASE_TCB1) | ||
50 | #define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91_BASE_TCB0) | ||
51 | |||
52 | /* Internal SRAM */ | ||
53 | #define AT91_SRAM_BASE 0x00200000 /* Internal SRAM base address */ | ||
54 | #define AT91_SRAM_SIZE 0x00004000 /* Internal SRAM SIZE (16Kb) */ | ||
55 | 42 | ||
56 | /* Internal SRAM is mapped below the IO devices */ | 43 | /* Internal SRAM is mapped below the IO devices */ |
57 | #define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE) | 44 | #define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE) |
58 | 45 | ||
59 | /* Serial ports */ | 46 | /* Serial ports */ |
60 | #define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */ | 47 | #define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */ |
@@ -71,9 +58,6 @@ | |||
71 | /* Compact Flash */ | 58 | /* Compact Flash */ |
72 | #define AT91_CF_BASE 0x50000000 /* NCS4-NCS6: Compact Flash physical base address */ | 59 | #define AT91_CF_BASE 0x50000000 /* NCS4-NCS6: Compact Flash physical base address */ |
73 | 60 | ||
74 | /* Multi-Master Memory controller */ | ||
75 | #define AT91_UHP_BASE 0x00300000 /* USB Host controller */ | ||
76 | |||
77 | /* Clocks */ | 61 | /* Clocks */ |
78 | #define AT91_SLOW_CLOCK 32768 /* slow clock */ | 62 | #define AT91_SLOW_CLOCK 32768 /* slow clock */ |
79 | 63 | ||