diff options
author | Andrew Victor <andrew@sanpeople.com> | 2007-01-09 03:03:42 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-01-24 06:59:55 -0500 |
commit | a14d527306dc7dbc38e4607c3cc3a50a600fc98b (patch) | |
tree | 5d845f5b16957c8c4474a9c951e21c6625782ce1 /include/asm-arm/arch-at91rm9200/at91sam926x_mc.h | |
parent | 410f4eae4b33631ace70d84470218f3db302afac (diff) |
[ARM] 4086/1: AT91: Whitespace cleanup
A couple of whitespace cleanups, mainly in the AT91 header files.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/at91sam926x_mc.h')
-rw-r--r-- | include/asm-arm/arch-at91rm9200/at91sam926x_mc.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h index 8ac797e39a14..972e7531c7f4 100644 --- a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h +++ b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h | |||
@@ -33,14 +33,14 @@ | |||
33 | #define AT91_SDRAMC_NC_9 (1 << 0) | 33 | #define AT91_SDRAMC_NC_9 (1 << 0) |
34 | #define AT91_SDRAMC_NC_10 (2 << 0) | 34 | #define AT91_SDRAMC_NC_10 (2 << 0) |
35 | #define AT91_SDRAMC_NC_11 (3 << 0) | 35 | #define AT91_SDRAMC_NC_11 (3 << 0) |
36 | #define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ | 36 | #define AT91_SDRAMC_NR (3 << 2) /* Number of Row Bits */ |
37 | #define AT91_SDRAMC_NR_11 (0 << 2) | 37 | #define AT91_SDRAMC_NR_11 (0 << 2) |
38 | #define AT91_SDRAMC_NR_12 (1 << 2) | 38 | #define AT91_SDRAMC_NR_12 (1 << 2) |
39 | #define AT91_SDRAMC_NR_13 (2 << 2) | 39 | #define AT91_SDRAMC_NR_13 (2 << 2) |
40 | #define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ | 40 | #define AT91_SDRAMC_NB (1 << 4) /* Number of Banks */ |
41 | #define AT91_SDRAMC_NB_2 (0 << 4) | 41 | #define AT91_SDRAMC_NB_2 (0 << 4) |
42 | #define AT91_SDRAMC_NB_4 (1 << 4) | 42 | #define AT91_SDRAMC_NB_4 (1 << 4) |
43 | #define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ | 43 | #define AT91_SDRAMC_CAS (3 << 5) /* CAS Latency */ |
44 | #define AT91_SDRAMC_CAS_1 (1 << 5) | 44 | #define AT91_SDRAMC_CAS_1 (1 << 5) |
45 | #define AT91_SDRAMC_CAS_2 (2 << 5) | 45 | #define AT91_SDRAMC_CAS_2 (2 << 5) |
46 | #define AT91_SDRAMC_CAS_3 (3 << 5) | 46 | #define AT91_SDRAMC_CAS_3 (3 << 5) |