diff options
author | Andrew Victor <andrew@sanpeople.com> | 2007-01-09 02:51:43 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2007-01-24 06:59:54 -0500 |
commit | 410f4eae4b33631ace70d84470218f3db302afac (patch) | |
tree | 610ff8b95dc37fe8f961f0daaec97462cba73ee7 /include/asm-arm/arch-at91rm9200/at91sam926x_mc.h | |
parent | fb1d50418ef09a6a43b3928ff78d433914ea954d (diff) |
[ARM] 4085/1: AT91: Header fixes.
Fix two typo's where AT01_* was used instead of AT91_*.
[Patch from Wojtek Kaniewski]
Fix definition of AT91_SMC_EXNWMODE for the SAM9 processors.
[Patch from Wu Xuan]
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/at91sam926x_mc.h')
-rw-r--r-- | include/asm-arm/arch-at91rm9200/at91sam926x_mc.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h index 7d94968b5d57..8ac797e39a14 100644 --- a/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h +++ b/include/asm-arm/arch-at91rm9200/at91sam926x_mc.h | |||
@@ -110,10 +110,10 @@ | |||
110 | #define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ | 110 | #define AT91_SMC_MODE(n) (AT91_SMC + 0x0c + ((n)*0x10)) /* Mode Register for CS n */ |
111 | #define AT91_SMC_READMODE (1 << 0) /* Read Mode */ | 111 | #define AT91_SMC_READMODE (1 << 0) /* Read Mode */ |
112 | #define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ | 112 | #define AT91_SMC_WRITEMODE (1 << 1) /* Write Mode */ |
113 | #define AT91_SMC_EXNWMODE (3 << 5) /* NWAIT Mode */ | 113 | #define AT91_SMC_EXNWMODE (3 << 4) /* NWAIT Mode */ |
114 | #define AT91_SMC_EXNWMODE_DISABLE (0 << 5) | 114 | #define AT91_SMC_EXNWMODE_DISABLE (0 << 4) |
115 | #define AT91_SMC_EXNWMODE_FROZEN (2 << 5) | 115 | #define AT91_SMC_EXNWMODE_FROZEN (2 << 4) |
116 | #define AT91_SMC_EXNWMODE_READY (3 << 5) | 116 | #define AT91_SMC_EXNWMODE_READY (3 << 4) |
117 | #define AT91_SMC_BAT (1 << 8) /* Byte Access Type */ | 117 | #define AT91_SMC_BAT (1 << 8) /* Byte Access Type */ |
118 | #define AT91_SMC_BAT_SELECT (0 << 8) | 118 | #define AT91_SMC_BAT_SELECT (0 << 8) |
119 | #define AT91_SMC_BAT_WRITE (1 << 8) | 119 | #define AT91_SMC_BAT_WRITE (1 << 8) |