diff options
author | Andrew Victor <andrew@sanpeople.com> | 2006-11-30 10:08:49 -0500 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-11-30 17:51:39 -0500 |
commit | a5c474580b8b7cc8b7b2cca9a2bd27ff5c065e70 (patch) | |
tree | 974b871f006a7082ab50148b3d44a117bee32c1a /include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h | |
parent | 6171de8f57e80873436345a9c7ba8bae800e577b (diff) |
[ARM] 3951/1: AT91: Rename user peripheral header files
Most of the AT91RM9200 user peripherals are also integrated into the
Atmel SAM9 range of processors. This patch renames the headers from
at91rm9200_xx.h to at91_xx.h to indicate they're not
at91rm9200-specific.
The new SAM9-specific registers and register bits have also been
defined.
Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h')
-rw-r--r-- | include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h | 36 |
1 files changed, 0 insertions, 36 deletions
diff --git a/include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h b/include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h deleted file mode 100644 index ce1150d4438d..000000000000 --- a/include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-arm/arch-at91rm9200/at91rm9200_pdc.h | ||
3 | * | ||
4 | * Copyright (C) 2005 Ivan Kokshaysky | ||
5 | * Copyright (C) SAN People | ||
6 | * | ||
7 | * Peripheral Data Controller (PDC) registers. | ||
8 | * Based on AT91RM9200 datasheet revision E. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | */ | ||
15 | |||
16 | #ifndef AT91RM9200_PDC_H | ||
17 | #define AT91RM9200_PDC_H | ||
18 | |||
19 | #define AT91_PDC_RPR 0x100 /* Receive Pointer Register */ | ||
20 | #define AT91_PDC_RCR 0x104 /* Receive Counter Register */ | ||
21 | #define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */ | ||
22 | #define AT91_PDC_TCR 0x10c /* Transmit Counter Register */ | ||
23 | #define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */ | ||
24 | #define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */ | ||
25 | #define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ | ||
26 | #define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */ | ||
27 | |||
28 | #define AT91_PDC_PTCR 0x120 /* Transfer Control Register */ | ||
29 | #define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ | ||
30 | #define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */ | ||
31 | #define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */ | ||
32 | #define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */ | ||
33 | |||
34 | #define AT91_PDC_PTSR 0x124 /* Transfer Status Register */ | ||
35 | |||
36 | #endif | ||