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authorJan Altenberg <jan@linutronix.de>2007-02-16 04:37:10 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-16 08:06:01 -0500
commitdd1d2f4439af3bc80c047a13a8a2be60df1953cd (patch)
tree565d2855c75e745f648615b8ff3236f358dd7c4f /include/asm-arm/arch-at91
parentf1e1398654eb97269590a5a76f0aedb607fe5d0f (diff)
[ARM] at91: correct value for AT91_RSTC_KEY
- Remove a duplicated define for AT91_RSTC_KEY - Set AT91_RSTC_KEY to the correct value - Replace the hardcoded keys in at91sam9620.c and at91sam9261.c by AT91_RSTC_KEY Signed-off-by: Jan Altenberg <jan@linutronix.de> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91')
-rw-r--r--include/asm-arm/arch-at91/at91_rstc.h3
1 files changed, 1 insertions, 2 deletions
diff --git a/include/asm-arm/arch-at91/at91_rstc.h b/include/asm-arm/arch-at91/at91_rstc.h
index 0b7afbc015a2..fb8d1618a231 100644
--- a/include/asm-arm/arch-at91/at91_rstc.h
+++ b/include/asm-arm/arch-at91/at91_rstc.h
@@ -17,7 +17,7 @@
17#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */ 17#define AT91_RSTC_PROCRST (1 << 0) /* Processor Reset */
18#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */ 18#define AT91_RSTC_PERRST (1 << 2) /* Peripheral Reset */
19#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */ 19#define AT91_RSTC_EXTRST (1 << 3) /* External Reset */
20#define AT91_RSTC_KEY (0xff << 24) /* KEY Password */ 20#define AT91_RSTC_KEY (0xa5 << 24) /* KEY Password */
21 21
22#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */ 22#define AT91_RSTC_SR (AT91_RSTC + 0x04) /* Reset Controller Status Register */
23#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */ 23#define AT91_RSTC_URSTS (1 << 0) /* User Reset Status */
@@ -34,6 +34,5 @@
34#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */ 34#define AT91_RSTC_URSTEN (1 << 0) /* User Reset Enable */
35#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */ 35#define AT91_RSTC_URSTIEN (1 << 4) /* User Reset Interrupt Enable */
36#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */ 36#define AT91_RSTC_ERSTL (0xf << 8) /* External Reset Length */
37#define AT91_RSTC_KEY (0xff << 24) /* KEY Password */
38 37
39#endif 38#endif