diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-05 11:14:15 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-08-07 04:55:48 -0400 |
commit | a09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch) | |
tree | 69689f467179891b498bd7423fcf61925173db31 /include/asm-arm/arch-at91/gpio.h | |
parent | a1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff) |
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91/gpio.h')
-rw-r--r-- | include/asm-arm/arch-at91/gpio.h | 252 |
1 files changed, 0 insertions, 252 deletions
diff --git a/include/asm-arm/arch-at91/gpio.h b/include/asm-arm/arch-at91/gpio.h deleted file mode 100644 index 0a241e2fb672..000000000000 --- a/include/asm-arm/arch-at91/gpio.h +++ /dev/null | |||
@@ -1,252 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-arm/arch-at91/gpio.h | ||
3 | * | ||
4 | * Copyright (C) 2005 HP Labs | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_AT91RM9200_GPIO_H | ||
14 | #define __ASM_ARCH_AT91RM9200_GPIO_H | ||
15 | |||
16 | #include <asm/irq.h> | ||
17 | |||
18 | #define PIN_BASE NR_AIC_IRQS | ||
19 | |||
20 | #define MAX_GPIO_BANKS 5 | ||
21 | |||
22 | /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ | ||
23 | |||
24 | #define AT91_PIN_PA0 (PIN_BASE + 0x00 + 0) | ||
25 | #define AT91_PIN_PA1 (PIN_BASE + 0x00 + 1) | ||
26 | #define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) | ||
27 | #define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) | ||
28 | #define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) | ||
29 | #define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) | ||
30 | #define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) | ||
31 | #define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) | ||
32 | #define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) | ||
33 | #define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) | ||
34 | #define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) | ||
35 | #define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) | ||
36 | #define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) | ||
37 | #define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) | ||
38 | #define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) | ||
39 | #define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) | ||
40 | #define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) | ||
41 | #define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) | ||
42 | #define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) | ||
43 | #define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) | ||
44 | #define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) | ||
45 | #define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) | ||
46 | #define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) | ||
47 | #define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) | ||
48 | #define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) | ||
49 | #define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) | ||
50 | #define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) | ||
51 | #define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) | ||
52 | #define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) | ||
53 | #define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) | ||
54 | #define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) | ||
55 | #define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) | ||
56 | |||
57 | #define AT91_PIN_PB0 (PIN_BASE + 0x20 + 0) | ||
58 | #define AT91_PIN_PB1 (PIN_BASE + 0x20 + 1) | ||
59 | #define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) | ||
60 | #define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) | ||
61 | #define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) | ||
62 | #define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) | ||
63 | #define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) | ||
64 | #define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) | ||
65 | #define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) | ||
66 | #define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) | ||
67 | #define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) | ||
68 | #define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) | ||
69 | #define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) | ||
70 | #define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) | ||
71 | #define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) | ||
72 | #define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) | ||
73 | #define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) | ||
74 | #define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) | ||
75 | #define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) | ||
76 | #define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) | ||
77 | #define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) | ||
78 | #define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) | ||
79 | #define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) | ||
80 | #define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) | ||
81 | #define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) | ||
82 | #define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) | ||
83 | #define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) | ||
84 | #define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) | ||
85 | #define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) | ||
86 | #define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) | ||
87 | #define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) | ||
88 | #define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) | ||
89 | |||
90 | #define AT91_PIN_PC0 (PIN_BASE + 0x40 + 0) | ||
91 | #define AT91_PIN_PC1 (PIN_BASE + 0x40 + 1) | ||
92 | #define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) | ||
93 | #define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) | ||
94 | #define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) | ||
95 | #define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) | ||
96 | #define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) | ||
97 | #define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) | ||
98 | #define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) | ||
99 | #define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) | ||
100 | #define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) | ||
101 | #define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) | ||
102 | #define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) | ||
103 | #define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) | ||
104 | #define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) | ||
105 | #define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) | ||
106 | #define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) | ||
107 | #define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) | ||
108 | #define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) | ||
109 | #define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) | ||
110 | #define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) | ||
111 | #define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) | ||
112 | #define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) | ||
113 | #define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) | ||
114 | #define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) | ||
115 | #define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) | ||
116 | #define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) | ||
117 | #define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) | ||
118 | #define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) | ||
119 | #define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) | ||
120 | #define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) | ||
121 | #define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) | ||
122 | |||
123 | #define AT91_PIN_PD0 (PIN_BASE + 0x60 + 0) | ||
124 | #define AT91_PIN_PD1 (PIN_BASE + 0x60 + 1) | ||
125 | #define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) | ||
126 | #define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) | ||
127 | #define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) | ||
128 | #define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) | ||
129 | #define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) | ||
130 | #define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) | ||
131 | #define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) | ||
132 | #define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) | ||
133 | #define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) | ||
134 | #define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) | ||
135 | #define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) | ||
136 | #define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) | ||
137 | #define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) | ||
138 | #define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) | ||
139 | #define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) | ||
140 | #define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) | ||
141 | #define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) | ||
142 | #define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) | ||
143 | #define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) | ||
144 | #define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) | ||
145 | #define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) | ||
146 | #define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) | ||
147 | #define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) | ||
148 | #define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) | ||
149 | #define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) | ||
150 | #define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) | ||
151 | #define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) | ||
152 | #define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) | ||
153 | #define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) | ||
154 | #define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) | ||
155 | |||
156 | #define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) | ||
157 | #define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) | ||
158 | #define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) | ||
159 | #define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) | ||
160 | #define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) | ||
161 | #define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) | ||
162 | #define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) | ||
163 | #define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) | ||
164 | #define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) | ||
165 | #define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) | ||
166 | #define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) | ||
167 | #define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) | ||
168 | #define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) | ||
169 | #define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) | ||
170 | #define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) | ||
171 | #define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) | ||
172 | #define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) | ||
173 | #define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) | ||
174 | #define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) | ||
175 | #define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) | ||
176 | #define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) | ||
177 | #define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) | ||
178 | #define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) | ||
179 | #define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) | ||
180 | #define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) | ||
181 | #define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) | ||
182 | #define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) | ||
183 | #define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) | ||
184 | #define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) | ||
185 | #define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) | ||
186 | #define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) | ||
187 | #define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) | ||
188 | |||
189 | #ifndef __ASSEMBLY__ | ||
190 | /* setup setup routines, called from board init or driver probe() */ | ||
191 | extern int __init_or_module at91_set_GPIO_periph(unsigned pin, int use_pullup); | ||
192 | extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup); | ||
193 | extern int __init_or_module at91_set_B_periph(unsigned pin, int use_pullup); | ||
194 | extern int __init_or_module at91_set_gpio_input(unsigned pin, int use_pullup); | ||
195 | extern int __init_or_module at91_set_gpio_output(unsigned pin, int value); | ||
196 | extern int __init_or_module at91_set_deglitch(unsigned pin, int is_on); | ||
197 | extern int __init_or_module at91_set_multi_drive(unsigned pin, int is_on); | ||
198 | |||
199 | /* callable at any time */ | ||
200 | extern int at91_set_gpio_value(unsigned pin, int value); | ||
201 | extern int at91_get_gpio_value(unsigned pin); | ||
202 | |||
203 | /* callable only from core power-management code */ | ||
204 | extern void at91_gpio_suspend(void); | ||
205 | extern void at91_gpio_resume(void); | ||
206 | |||
207 | /*-------------------------------------------------------------------------*/ | ||
208 | |||
209 | /* wrappers for "new style" GPIO calls. the old AT91-specfic ones should | ||
210 | * eventually be removed (along with this errno.h inclusion), and the | ||
211 | * gpio request/free calls should probably be implemented. | ||
212 | */ | ||
213 | |||
214 | #include <asm/errno.h> | ||
215 | |||
216 | static inline int gpio_request(unsigned gpio, const char *label) | ||
217 | { | ||
218 | return 0; | ||
219 | } | ||
220 | |||
221 | static inline void gpio_free(unsigned gpio) | ||
222 | { | ||
223 | } | ||
224 | |||
225 | extern int gpio_direction_input(unsigned gpio); | ||
226 | extern int gpio_direction_output(unsigned gpio, int value); | ||
227 | |||
228 | static inline int gpio_get_value(unsigned gpio) | ||
229 | { | ||
230 | return at91_get_gpio_value(gpio); | ||
231 | } | ||
232 | |||
233 | static inline void gpio_set_value(unsigned gpio, int value) | ||
234 | { | ||
235 | at91_set_gpio_value(gpio, value); | ||
236 | } | ||
237 | |||
238 | #include <asm-generic/gpio.h> /* cansleep wrappers */ | ||
239 | |||
240 | static inline int gpio_to_irq(unsigned gpio) | ||
241 | { | ||
242 | return gpio; | ||
243 | } | ||
244 | |||
245 | static inline int irq_to_gpio(unsigned irq) | ||
246 | { | ||
247 | return irq; | ||
248 | } | ||
249 | |||
250 | #endif /* __ASSEMBLY__ */ | ||
251 | |||
252 | #endif | ||