diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-05 11:14:15 -0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-08-07 04:55:48 -0400 |
commit | a09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch) | |
tree | 69689f467179891b498bd7423fcf61925173db31 /include/asm-arm/arch-at91/debug-macro.S | |
parent | a1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff) |
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91/debug-macro.S')
-rw-r--r-- | include/asm-arm/arch-at91/debug-macro.S | 39 |
1 files changed, 0 insertions, 39 deletions
diff --git a/include/asm-arm/arch-at91/debug-macro.S b/include/asm-arm/arch-at91/debug-macro.S deleted file mode 100644 index ff28696b6d90..000000000000 --- a/include/asm-arm/arch-at91/debug-macro.S +++ /dev/null | |||
@@ -1,39 +0,0 @@ | |||
1 | /* | ||
2 | * include/asm-arm/arch-at91/debug-macro.S | ||
3 | * | ||
4 | * Copyright (C) 2003-2005 SAN People | ||
5 | * | ||
6 | * Debugging macro include header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <asm/arch/hardware.h> | ||
15 | #include <asm/arch/at91_dbgu.h> | ||
16 | |||
17 | .macro addruart,rx | ||
18 | mrc p15, 0, \rx, c1, c0 | ||
19 | tst \rx, #1 @ MMU enabled? | ||
20 | ldreq \rx, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) | ||
21 | ldrne \rx, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) | ||
22 | .endm | ||
23 | |||
24 | .macro senduart,rd,rx | ||
25 | strb \rd, [\rx, #(AT91_DBGU_THR - AT91_DBGU)] @ Write to Transmitter Holding Register | ||
26 | .endm | ||
27 | |||
28 | .macro waituart,rd,rx | ||
29 | 1001: ldr \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)] @ Read Status Register | ||
30 | tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit | ||
31 | beq 1001b | ||
32 | .endm | ||
33 | |||
34 | .macro busyuart,rd,rx | ||
35 | 1001: ldr \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)] @ Read Status Register | ||
36 | tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete | ||
37 | beq 1001b | ||
38 | .endm | ||
39 | |||