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authorAndrew Victor <andrew@sanpeople.com>2007-11-20 07:34:56 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-01-26 10:00:30 -0500
commit9ebbec27da6d7f4762b73985ac4929acf061d48b (patch)
tree55dd7f9c5d8e9a06a974f1799a55784566472ade /include/asm-arm/arch-at91/at91_pmc.h
parent7cbed2b507efd1bb19a574b8db14d5aad5936d6d (diff)
[ARM] 4657/1: AT91: Header definition update
Add definitions of registers / bits found on some AT91SAM9 processors Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91/at91_pmc.h')
-rw-r--r--include/asm-arm/arch-at91/at91_pmc.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/asm-arm/arch-at91/at91_pmc.h b/include/asm-arm/arch-at91/at91_pmc.h
index 33ff5b6798ee..34804eaab4f2 100644
--- a/include/asm-arm/arch-at91/at91_pmc.h
+++ b/include/asm-arm/arch-at91/at91_pmc.h
@@ -37,7 +37,9 @@
37#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */ 37#define AT91_PMC_PCDR (AT91_PMC + 0x14) /* Peripheral Clock Disable Register */
38#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */ 38#define AT91_PMC_PCSR (AT91_PMC + 0x18) /* Peripheral Clock Status Register */
39 39
40#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register */ 40#define AT91_CKGR_UCKR (AT91_PMC + 0x1C) /* UTMI Clock Register [SAM9RL only] */
41
42#define AT91_CKGR_MOR (AT91_PMC + 0x20) /* Main Oscillator Register [not on SAM9RL] */
41#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ 43#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */
42#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */ 44#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass [AT91SAM926x only] */
43#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ 45#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */