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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-02-19 16:18:39 -0500 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-02-19 16:18:39 -0500 |
commit | 59b8175c771040afcd4ad67022b0cc80c216b866 (patch) | |
tree | 4ef5935bee1e342716d49b9d4b99e3fa835526e6 /include/asm-arm/arch-at91/at91_pio.h | |
parent | 920841d8d1d61bc12b43f95a579a5374f6d98f81 (diff) | |
parent | 3b0eb4a195a124567cd0dd6f700f8388def542c6 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (117 commits)
[ARM] 4058/2: iop32x: set ->broken_parity_status on n2100 onboard r8169 ports
[ARM] 4140/1: AACI stability add ac97 timeout and retries
[ARM] 4139/1: AACI record support
[ARM] 4138/1: AACI: multiple channel support for IRQ handling
[ARM] 4211/1: Provide a defconfig for ns9xxx
[ARM] 4210/1: base for new machine type "NetSilicon NS9360"
[ARM] 4222/1: S3C2443: Remove reference to missing S3C2443_PM
[ARM] 4221/1: S3C2443: DMA support
[ARM] 4220/1: S3C24XX: DMA system initialised from sysdev
[ARM] 4219/1: S3C2443: DMA source definitions
[ARM] 4218/1: S3C2412: fix CONFIG_CPU_S3C2412_ONLY wrt to S3C2443
[ARM] 4217/1: S3C24XX: remove the dma channel show at startup
[ARM] 4090/2: avoid clash between PXA and SA1111 defines
[ARM] 4216/1: add .gitignore entries for ARM specific files
[ARM] 4214/2: S3C2410: Add Armzone QT2410
[ARM] 4215/1: s3c2410 usb device: per-platform vbus_draw
[ARM] 4213/1: S3C2410 - Update definition of ADCTSC_XY_PST
[ARM] 4098/1: ARM: rtc_lock only used with rtc_cmos
[ARM] 4137/1: Add kexec support
[ARM] 4201/1: SMP barriers pair needed for the secondary boot process
...
Fix up conflict due to typedef removal in sound/arm/aaci.h
Diffstat (limited to 'include/asm-arm/arch-at91/at91_pio.h')
-rw-r--r-- | include/asm-arm/arch-at91/at91_pio.h | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/include/asm-arm/arch-at91/at91_pio.h b/include/asm-arm/arch-at91/at91_pio.h new file mode 100644 index 000000000000..84c3866d309f --- /dev/null +++ b/include/asm-arm/arch-at91/at91_pio.h | |||
@@ -0,0 +1,49 @@ | |||
1 | /* | ||
2 | * include/asm-arm/arch-at91/at91_pio.h | ||
3 | * | ||
4 | * Copyright (C) 2005 Ivan Kokshaysky | ||
5 | * Copyright (C) SAN People | ||
6 | * | ||
7 | * Parallel I/O Controller (PIO) - System peripherals registers. | ||
8 | * Based on AT91RM9200 datasheet revision E. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | */ | ||
15 | |||
16 | #ifndef AT91_PIO_H | ||
17 | #define AT91_PIO_H | ||
18 | |||
19 | #define PIO_PER 0x00 /* Enable Register */ | ||
20 | #define PIO_PDR 0x04 /* Disable Register */ | ||
21 | #define PIO_PSR 0x08 /* Status Register */ | ||
22 | #define PIO_OER 0x10 /* Output Enable Register */ | ||
23 | #define PIO_ODR 0x14 /* Output Disable Register */ | ||
24 | #define PIO_OSR 0x18 /* Output Status Register */ | ||
25 | #define PIO_IFER 0x20 /* Glitch Input Filter Enable */ | ||
26 | #define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ | ||
27 | #define PIO_IFSR 0x28 /* Glitch Input Filter Status */ | ||
28 | #define PIO_SODR 0x30 /* Set Output Data Register */ | ||
29 | #define PIO_CODR 0x34 /* Clear Output Data Register */ | ||
30 | #define PIO_ODSR 0x38 /* Output Data Status Register */ | ||
31 | #define PIO_PDSR 0x3c /* Pin Data Status Register */ | ||
32 | #define PIO_IER 0x40 /* Interrupt Enable Register */ | ||
33 | #define PIO_IDR 0x44 /* Interrupt Disable Register */ | ||
34 | #define PIO_IMR 0x48 /* Interrupt Mask Register */ | ||
35 | #define PIO_ISR 0x4c /* Interrupt Status Register */ | ||
36 | #define PIO_MDER 0x50 /* Multi-driver Enable Register */ | ||
37 | #define PIO_MDDR 0x54 /* Multi-driver Disable Register */ | ||
38 | #define PIO_MDSR 0x58 /* Multi-driver Status Register */ | ||
39 | #define PIO_PUDR 0x60 /* Pull-up Disable Register */ | ||
40 | #define PIO_PUER 0x64 /* Pull-up Enable Register */ | ||
41 | #define PIO_PUSR 0x68 /* Pull-up Status Register */ | ||
42 | #define PIO_ASR 0x70 /* Peripheral A Select Register */ | ||
43 | #define PIO_BSR 0x74 /* Peripheral B Select Register */ | ||
44 | #define PIO_ABSR 0x78 /* AB Status Register */ | ||
45 | #define PIO_OWER 0xa0 /* Output Write Enable Register */ | ||
46 | #define PIO_OWDR 0xa4 /* Output Write Disable Register */ | ||
47 | #define PIO_OWSR 0xa8 /* Output Write Status Register */ | ||
48 | |||
49 | #endif | ||