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authorGreg Ungerer <gerg@snapgear.com>2007-05-18 01:28:01 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-07-12 06:11:21 -0400
commitb54942f8203689014f80ec89c55ccb1f48ab1166 (patch)
tree9a1021750b70e4b67ffb049eb44ae78bf25097df /include/asm-arm/arch-at91/at91_dbgu.h
parentd0f9b55ece0ec1ffc9e2e57fd7a79200994aead4 (diff)
[ARM] 4391/1: make at91 debug unit support optional
The AT91x40 family doesn't have the debug unit like its bigger brothers. But it does have the ID and extension registers (with the bit meanings the same). Reorganize at91_dbgu.h to cater for this. This also affects the load uncompressor, since it outputs to the debug port. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'include/asm-arm/arch-at91/at91_dbgu.h')
-rw-r--r--include/asm-arm/arch-at91/at91_dbgu.h13
1 files changed, 10 insertions, 3 deletions
diff --git a/include/asm-arm/arch-at91/at91_dbgu.h b/include/asm-arm/arch-at91/at91_dbgu.h
index b0369e176f7b..8019ffd0ad3b 100644
--- a/include/asm-arm/arch-at91/at91_dbgu.h
+++ b/include/asm-arm/arch-at91/at91_dbgu.h
@@ -16,6 +16,7 @@
16#ifndef AT91_DBGU_H 16#ifndef AT91_DBGU_H
17#define AT91_DBGU_H 17#define AT91_DBGU_H
18 18
19#ifdef AT91_DBGU
19#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */ 20#define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */
20#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */ 21#define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */
21#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */ 22#define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */
@@ -30,6 +31,15 @@
30 31
31#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */ 32#define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */
32#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */ 33#define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */
34#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */
35#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */
36
37#endif /* AT91_DBGU */
38
39/*
40 * Some AT91 parts that don't have full DEBUG units still support the ID
41 * and extensions register.
42 */
33#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */ 43#define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */
34#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */ 44#define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */
35#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */ 45#define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */
@@ -53,7 +63,4 @@
53#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */ 63#define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */
54#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */ 64#define AT91_CIDR_EXT (1 << 31) /* Extension Flag */
55 65
56#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */
57#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */
58
59#endif 66#endif