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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-alpha/io.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-alpha/io.h')
-rw-r--r--include/asm-alpha/io.h682
1 files changed, 682 insertions, 0 deletions
diff --git a/include/asm-alpha/io.h b/include/asm-alpha/io.h
new file mode 100644
index 000000000000..871dd7ad909d
--- /dev/null
+++ b/include/asm-alpha/io.h
@@ -0,0 +1,682 @@
1#ifndef __ALPHA_IO_H
2#define __ALPHA_IO_H
3
4#ifdef __KERNEL__
5
6#include <linux/config.h>
7#include <linux/kernel.h>
8#include <asm/compiler.h>
9#include <asm/system.h>
10#include <asm/pgtable.h>
11#include <asm/machvec.h>
12#include <asm/hwrpb.h>
13
14/* The generic header contains only prototypes. Including it ensures that
15 the implementation we have here matches that interface. */
16#include <asm-generic/iomap.h>
17
18/* We don't use IO slowdowns on the Alpha, but.. */
19#define __SLOW_DOWN_IO do { } while (0)
20#define SLOW_DOWN_IO do { } while (0)
21
22/*
23 * Virtual -> physical identity mapping starts at this offset
24 */
25#ifdef USE_48_BIT_KSEG
26#define IDENT_ADDR 0xffff800000000000UL
27#else
28#define IDENT_ADDR 0xfffffc0000000000UL
29#endif
30
31/*
32 * We try to avoid hae updates (thus the cache), but when we
33 * do need to update the hae, we need to do it atomically, so
34 * that any interrupts wouldn't get confused with the hae
35 * register not being up-to-date with respect to the hardware
36 * value.
37 */
38static inline void __set_hae(unsigned long new_hae)
39{
40 unsigned long flags;
41 local_irq_save(flags);
42
43 alpha_mv.hae_cache = new_hae;
44 *alpha_mv.hae_register = new_hae;
45 mb();
46 /* Re-read to make sure it was written. */
47 new_hae = *alpha_mv.hae_register;
48
49 local_irq_restore(flags);
50}
51
52static inline void set_hae(unsigned long new_hae)
53{
54 if (new_hae != alpha_mv.hae_cache)
55 __set_hae(new_hae);
56}
57
58/*
59 * Change virtual addresses to physical addresses and vv.
60 */
61#ifdef USE_48_BIT_KSEG
62static inline unsigned long virt_to_phys(void *address)
63{
64 return (unsigned long)address - IDENT_ADDR;
65}
66
67static inline void * phys_to_virt(unsigned long address)
68{
69 return (void *) (address + IDENT_ADDR);
70}
71#else
72static inline unsigned long virt_to_phys(void *address)
73{
74 unsigned long phys = (unsigned long)address;
75
76 /* Sign-extend from bit 41. */
77 phys <<= (64 - 41);
78 phys = (long)phys >> (64 - 41);
79
80 /* Crop to the physical address width of the processor. */
81 phys &= (1ul << hwrpb->pa_bits) - 1;
82
83 return phys;
84}
85
86static inline void * phys_to_virt(unsigned long address)
87{
88 return (void *)(IDENT_ADDR + (address & ((1ul << 41) - 1)));
89}
90#endif
91
92#define page_to_phys(page) page_to_pa(page)
93
94/* This depends on working iommu. */
95#define BIO_VMERGE_BOUNDARY (alpha_mv.mv_pci_tbi ? PAGE_SIZE : 0)
96
97/* Maximum PIO space address supported? */
98#define IO_SPACE_LIMIT 0xffff
99
100/*
101 * Change addresses as seen by the kernel (virtual) to addresses as
102 * seen by a device (bus), and vice versa.
103 *
104 * Note that this only works for a limited range of kernel addresses,
105 * and very well may not span all memory. Consider this interface
106 * deprecated in favour of the mapping functions in <asm/pci.h>.
107 */
108extern unsigned long __direct_map_base;
109extern unsigned long __direct_map_size;
110
111static inline unsigned long virt_to_bus(void *address)
112{
113 unsigned long phys = virt_to_phys(address);
114 unsigned long bus = phys + __direct_map_base;
115 return phys <= __direct_map_size ? bus : 0;
116}
117
118static inline void *bus_to_virt(unsigned long address)
119{
120 void *virt;
121
122 /* This check is a sanity check but also ensures that bus address 0
123 maps to virtual address 0 which is useful to detect null pointers
124 (the NCR driver is much simpler if NULL pointers are preserved). */
125 address -= __direct_map_base;
126 virt = phys_to_virt(address);
127 return (long)address <= 0 ? NULL : virt;
128}
129
130/*
131 * There are different chipsets to interface the Alpha CPUs to the world.
132 */
133
134#define IO_CONCAT(a,b) _IO_CONCAT(a,b)
135#define _IO_CONCAT(a,b) a ## _ ## b
136
137#ifdef CONFIG_ALPHA_GENERIC
138
139/* In a generic kernel, we always go through the machine vector. */
140
141#define REMAP1(TYPE, NAME, QUAL) \
142static inline TYPE generic_##NAME(QUAL void __iomem *addr) \
143{ \
144 return alpha_mv.mv_##NAME(addr); \
145}
146
147#define REMAP2(TYPE, NAME, QUAL) \
148static inline void generic_##NAME(TYPE b, QUAL void __iomem *addr) \
149{ \
150 alpha_mv.mv_##NAME(b, addr); \
151}
152
153REMAP1(unsigned int, ioread8, /**/)
154REMAP1(unsigned int, ioread16, /**/)
155REMAP1(unsigned int, ioread32, /**/)
156REMAP1(u8, readb, const volatile)
157REMAP1(u16, readw, const volatile)
158REMAP1(u32, readl, const volatile)
159REMAP1(u64, readq, const volatile)
160
161REMAP2(u8, iowrite8, /**/)
162REMAP2(u16, iowrite16, /**/)
163REMAP2(u32, iowrite32, /**/)
164REMAP2(u8, writeb, volatile)
165REMAP2(u16, writew, volatile)
166REMAP2(u32, writel, volatile)
167REMAP2(u64, writeq, volatile)
168
169#undef REMAP1
170#undef REMAP2
171
172static inline void __iomem *generic_ioportmap(unsigned long a)
173{
174 return alpha_mv.mv_ioportmap(a);
175}
176
177static inline void __iomem *generic_ioremap(unsigned long a, unsigned long s)
178{
179 return alpha_mv.mv_ioremap(a, s);
180}
181
182static inline void generic_iounmap(volatile void __iomem *a)
183{
184 return alpha_mv.mv_iounmap(a);
185}
186
187static inline int generic_is_ioaddr(unsigned long a)
188{
189 return alpha_mv.mv_is_ioaddr(a);
190}
191
192static inline int generic_is_mmio(const volatile void __iomem *a)
193{
194 return alpha_mv.mv_is_mmio(a);
195}
196
197#define __IO_PREFIX generic
198#define generic_trivial_rw_bw 0
199#define generic_trivial_rw_lq 0
200#define generic_trivial_io_bw 0
201#define generic_trivial_io_lq 0
202#define generic_trivial_iounmap 0
203
204#else
205
206#if defined(CONFIG_ALPHA_APECS)
207# include <asm/core_apecs.h>
208#elif defined(CONFIG_ALPHA_CIA)
209# include <asm/core_cia.h>
210#elif defined(CONFIG_ALPHA_IRONGATE)
211# include <asm/core_irongate.h>
212#elif defined(CONFIG_ALPHA_JENSEN)
213# include <asm/jensen.h>
214#elif defined(CONFIG_ALPHA_LCA)
215# include <asm/core_lca.h>
216#elif defined(CONFIG_ALPHA_MARVEL)
217# include <asm/core_marvel.h>
218#elif defined(CONFIG_ALPHA_MCPCIA)
219# include <asm/core_mcpcia.h>
220#elif defined(CONFIG_ALPHA_POLARIS)
221# include <asm/core_polaris.h>
222#elif defined(CONFIG_ALPHA_T2)
223# include <asm/core_t2.h>
224#elif defined(CONFIG_ALPHA_TSUNAMI)
225# include <asm/core_tsunami.h>
226#elif defined(CONFIG_ALPHA_TITAN)
227# include <asm/core_titan.h>
228#elif defined(CONFIG_ALPHA_WILDFIRE)
229# include <asm/core_wildfire.h>
230#else
231#error "What system is this?"
232#endif
233
234#endif /* GENERIC */
235
236/*
237 * We always have external versions of these routines.
238 */
239extern u8 inb(unsigned long port);
240extern u16 inw(unsigned long port);
241extern u32 inl(unsigned long port);
242extern void outb(u8 b, unsigned long port);
243extern void outw(u16 b, unsigned long port);
244extern void outl(u32 b, unsigned long port);
245
246extern u8 readb(const volatile void __iomem *addr);
247extern u16 readw(const volatile void __iomem *addr);
248extern u32 readl(const volatile void __iomem *addr);
249extern u64 readq(const volatile void __iomem *addr);
250extern void writeb(u8 b, volatile void __iomem *addr);
251extern void writew(u16 b, volatile void __iomem *addr);
252extern void writel(u32 b, volatile void __iomem *addr);
253extern void writeq(u64 b, volatile void __iomem *addr);
254
255extern u8 __raw_readb(const volatile void __iomem *addr);
256extern u16 __raw_readw(const volatile void __iomem *addr);
257extern u32 __raw_readl(const volatile void __iomem *addr);
258extern u64 __raw_readq(const volatile void __iomem *addr);
259extern void __raw_writeb(u8 b, volatile void __iomem *addr);
260extern void __raw_writew(u16 b, volatile void __iomem *addr);
261extern void __raw_writel(u32 b, volatile void __iomem *addr);
262extern void __raw_writeq(u64 b, volatile void __iomem *addr);
263
264/*
265 * Mapping from port numbers to __iomem space is pretty easy.
266 */
267
268/* These two have to be extern inline because of the extern prototype from
269 <asm-generic/iomap.h>. It is not legal to mix "extern" and "static" for
270 the same declaration. */
271extern inline void __iomem *ioport_map(unsigned long port, unsigned int size)
272{
273 return IO_CONCAT(__IO_PREFIX,ioportmap) (port);
274}
275
276extern inline void ioport_unmap(void __iomem *addr)
277{
278}
279
280static inline void __iomem *ioremap(unsigned long port, unsigned long size)
281{
282 return IO_CONCAT(__IO_PREFIX,ioremap) (port, size);
283}
284
285static inline void __iomem *__ioremap(unsigned long port, unsigned long size,
286 unsigned long flags)
287{
288 return ioremap(port, size);
289}
290
291static inline void __iomem * ioremap_nocache(unsigned long offset,
292 unsigned long size)
293{
294 return ioremap(offset, size);
295}
296
297static inline void iounmap(volatile void __iomem *addr)
298{
299 IO_CONCAT(__IO_PREFIX,iounmap)(addr);
300}
301
302static inline int __is_ioaddr(unsigned long addr)
303{
304 return IO_CONCAT(__IO_PREFIX,is_ioaddr)(addr);
305}
306#define __is_ioaddr(a) __is_ioaddr((unsigned long)(a))
307
308static inline int __is_mmio(const volatile void __iomem *addr)
309{
310 return IO_CONCAT(__IO_PREFIX,is_mmio)(addr);
311}
312
313
314/*
315 * If the actual I/O bits are sufficiently trivial, then expand inline.
316 */
317
318#if IO_CONCAT(__IO_PREFIX,trivial_io_bw)
319extern inline unsigned int ioread8(void __iomem *addr)
320{
321 unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread8)(addr);
322 mb();
323 return ret;
324}
325
326extern inline unsigned int ioread16(void __iomem *addr)
327{
328 unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread16)(addr);
329 mb();
330 return ret;
331}
332
333extern inline void iowrite8(u8 b, void __iomem *addr)
334{
335 IO_CONCAT(__IO_PREFIX,iowrite8)(b, addr);
336 mb();
337}
338
339extern inline void iowrite16(u16 b, void __iomem *addr)
340{
341 IO_CONCAT(__IO_PREFIX,iowrite16)(b, addr);
342 mb();
343}
344
345extern inline u8 inb(unsigned long port)
346{
347 return ioread8(ioport_map(port, 1));
348}
349
350extern inline u16 inw(unsigned long port)
351{
352 return ioread16(ioport_map(port, 2));
353}
354
355extern inline void outb(u8 b, unsigned long port)
356{
357 iowrite8(b, ioport_map(port, 1));
358}
359
360extern inline void outw(u16 b, unsigned long port)
361{
362 iowrite16(b, ioport_map(port, 2));
363}
364#endif
365
366#if IO_CONCAT(__IO_PREFIX,trivial_io_lq)
367extern inline unsigned int ioread32(void __iomem *addr)
368{
369 unsigned int ret = IO_CONCAT(__IO_PREFIX,ioread32)(addr);
370 mb();
371 return ret;
372}
373
374extern inline void iowrite32(u32 b, void __iomem *addr)
375{
376 IO_CONCAT(__IO_PREFIX,iowrite32)(b, addr);
377 mb();
378}
379
380extern inline u32 inl(unsigned long port)
381{
382 return ioread32(ioport_map(port, 4));
383}
384
385extern inline void outl(u32 b, unsigned long port)
386{
387 iowrite32(b, ioport_map(port, 4));
388}
389#endif
390
391#if IO_CONCAT(__IO_PREFIX,trivial_rw_bw) == 1
392extern inline u8 __raw_readb(const volatile void __iomem *addr)
393{
394 return IO_CONCAT(__IO_PREFIX,readb)(addr);
395}
396
397extern inline u16 __raw_readw(const volatile void __iomem *addr)
398{
399 return IO_CONCAT(__IO_PREFIX,readw)(addr);
400}
401
402extern inline void __raw_writeb(u8 b, volatile void __iomem *addr)
403{
404 IO_CONCAT(__IO_PREFIX,writeb)(b, addr);
405}
406
407extern inline void __raw_writew(u16 b, volatile void __iomem *addr)
408{
409 IO_CONCAT(__IO_PREFIX,writew)(b, addr);
410}
411
412extern inline u8 readb(const volatile void __iomem *addr)
413{
414 u8 ret = __raw_readb(addr);
415 mb();
416 return ret;
417}
418
419extern inline u16 readw(const volatile void __iomem *addr)
420{
421 u16 ret = __raw_readw(addr);
422 mb();
423 return ret;
424}
425
426extern inline void writeb(u8 b, volatile void __iomem *addr)
427{
428 __raw_writeb(b, addr);
429 mb();
430}
431
432extern inline void writew(u16 b, volatile void __iomem *addr)
433{
434 __raw_writew(b, addr);
435 mb();
436}
437#endif
438
439#if IO_CONCAT(__IO_PREFIX,trivial_rw_lq) == 1
440extern inline u32 __raw_readl(const volatile void __iomem *addr)
441{
442 return IO_CONCAT(__IO_PREFIX,readl)(addr);
443}
444
445extern inline u64 __raw_readq(const volatile void __iomem *addr)
446{
447 return IO_CONCAT(__IO_PREFIX,readq)(addr);
448}
449
450extern inline void __raw_writel(u32 b, volatile void __iomem *addr)
451{
452 IO_CONCAT(__IO_PREFIX,writel)(b, addr);
453}
454
455extern inline void __raw_writeq(u64 b, volatile void __iomem *addr)
456{
457 IO_CONCAT(__IO_PREFIX,writeq)(b, addr);
458}
459
460extern inline u32 readl(const volatile void __iomem *addr)
461{
462 u32 ret = __raw_readl(addr);
463 mb();
464 return ret;
465}
466
467extern inline u64 readq(const volatile void __iomem *addr)
468{
469 u64 ret = __raw_readq(addr);
470 mb();
471 return ret;
472}
473
474extern inline void writel(u32 b, volatile void __iomem *addr)
475{
476 __raw_writel(b, addr);
477 mb();
478}
479
480extern inline void writeq(u64 b, volatile void __iomem *addr)
481{
482 __raw_writeq(b, addr);
483 mb();
484}
485#endif
486
487#define inb_p inb
488#define inw_p inw
489#define inl_p inl
490#define outb_p outb
491#define outw_p outw
492#define outl_p outl
493#define readb_relaxed(addr) __raw_readb(addr)
494#define readw_relaxed(addr) __raw_readw(addr)
495#define readl_relaxed(addr) __raw_readl(addr)
496#define readq_relaxed(addr) __raw_readq(addr)
497
498#define mmiowb()
499
500/*
501 * String version of IO memory access ops:
502 */
503extern void memcpy_fromio(void *, const volatile void __iomem *, long);
504extern void memcpy_toio(volatile void __iomem *, const void *, long);
505extern void _memset_c_io(volatile void __iomem *, unsigned long, long);
506
507static inline void memset_io(volatile void __iomem *addr, u8 c, long len)
508{
509 _memset_c_io(addr, 0x0101010101010101UL * c, len);
510}
511
512#define __HAVE_ARCH_MEMSETW_IO
513static inline void memsetw_io(volatile void __iomem *addr, u16 c, long len)
514{
515 _memset_c_io(addr, 0x0001000100010001UL * c, len);
516}
517
518/*
519 * String versions of in/out ops:
520 */
521extern void insb (unsigned long port, void *dst, unsigned long count);
522extern void insw (unsigned long port, void *dst, unsigned long count);
523extern void insl (unsigned long port, void *dst, unsigned long count);
524extern void outsb (unsigned long port, const void *src, unsigned long count);
525extern void outsw (unsigned long port, const void *src, unsigned long count);
526extern void outsl (unsigned long port, const void *src, unsigned long count);
527
528/*
529 * XXX - We don't have csum_partial_copy_fromio() yet, so we cheat here and
530 * just copy it. The net code will then do the checksum later. Presently
531 * only used by some shared memory 8390 Ethernet cards anyway.
532 */
533
534#define eth_io_copy_and_sum(skb,src,len,unused) \
535 memcpy_fromio((skb)->data,src,len)
536
537#define isa_eth_io_copy_and_sum(skb,src,len,unused) \
538 isa_memcpy_fromio((skb)->data,src,len)
539
540static inline int
541check_signature(const volatile void __iomem *io_addr,
542 const unsigned char *signature, int length)
543{
544 do {
545 if (readb(io_addr) != *signature)
546 return 0;
547 io_addr++;
548 signature++;
549 } while (--length);
550 return 1;
551}
552
553
554/*
555 * ISA space is mapped to some machine-specific location on Alpha.
556 * Call into the existing hooks to get the address translated.
557 */
558
559static inline u8
560isa_readb(unsigned long offset)
561{
562 void __iomem *addr = ioremap(offset, 1);
563 u8 ret = readb(addr);
564 iounmap(addr);
565 return ret;
566}
567
568static inline u16
569isa_readw(unsigned long offset)
570{
571 void __iomem *addr = ioremap(offset, 2);
572 u16 ret = readw(addr);
573 iounmap(addr);
574 return ret;
575}
576
577static inline u32
578isa_readl(unsigned long offset)
579{
580 void __iomem *addr = ioremap(offset, 2);
581 u32 ret = readl(addr);
582 iounmap(addr);
583 return ret;
584}
585
586static inline void
587isa_writeb(u8 b, unsigned long offset)
588{
589 void __iomem *addr = ioremap(offset, 2);
590 writeb(b, addr);
591 iounmap(addr);
592}
593
594static inline void
595isa_writew(u16 w, unsigned long offset)
596{
597 void __iomem *addr = ioremap(offset, 2);
598 writew(w, addr);
599 iounmap(addr);
600}
601
602static inline void
603isa_writel(u32 l, unsigned long offset)
604{
605 void __iomem *addr = ioremap(offset, 2);
606 writel(l, addr);
607 iounmap(addr);
608}
609
610static inline void
611isa_memset_io(unsigned long offset, u8 val, long n)
612{
613 void __iomem *addr = ioremap(offset, n);
614 memset_io(addr, val, n);
615 iounmap(addr);
616}
617
618static inline void
619isa_memcpy_fromio(void *dest, unsigned long offset, long n)
620{
621 void __iomem *addr = ioremap(offset, n);
622 memcpy_fromio(dest, addr, n);
623 iounmap(addr);
624}
625
626static inline void
627isa_memcpy_toio(unsigned long offset, const void *src, long n)
628{
629 void __iomem *addr = ioremap(offset, n);
630 memcpy_toio(addr, src, n);
631 iounmap(addr);
632}
633
634/*
635 * The Alpha Jensen hardware for some rather strange reason puts
636 * the RTC clock at 0x170 instead of 0x70. Probably due to some
637 * misguided idea about using 0x70 for NMI stuff.
638 *
639 * These defines will override the defaults when doing RTC queries
640 */
641
642#ifdef CONFIG_ALPHA_GENERIC
643# define RTC_PORT(x) ((x) + alpha_mv.rtc_port)
644#else
645# ifdef CONFIG_ALPHA_JENSEN
646# define RTC_PORT(x) (0x170+(x))
647# else
648# define RTC_PORT(x) (0x70 + (x))
649# endif
650#endif
651#define RTC_ALWAYS_BCD 0
652
653/* Nothing to do */
654
655#define dma_cache_inv(_start,_size) do { } while (0)
656#define dma_cache_wback(_start,_size) do { } while (0)
657#define dma_cache_wback_inv(_start,_size) do { } while (0)
658
659/*
660 * Some mucking forons use if[n]def writeq to check if platform has it.
661 * It's a bloody bad idea and we probably want ARCH_HAS_WRITEQ for them
662 * to play with; for now just use cpp anti-recursion logics and make sure
663 * that damn thing is defined and expands to itself.
664 */
665
666#define writeq writeq
667#define readq readq
668
669/*
670 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
671 * access
672 */
673#define xlate_dev_mem_ptr(p) __va(p)
674
675/*
676 * Convert a virtual cached pointer to an uncached pointer
677 */
678#define xlate_dev_kmem_ptr(p) p
679
680#endif /* __KERNEL__ */
681
682#endif /* __ALPHA_IO_H */