diff options
author | Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> | 2006-09-25 19:28:13 -0400 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2006-10-14 00:35:39 -0400 |
commit | 991528d7348667924176f3e29addea0675298944 (patch) | |
tree | ed8552bd4c696700a95ae37b26c4197923207ae7 /include/acpi/processor.h | |
parent | b4bd8c66435a8cdf8c90334fb3b517a23ff2ab95 (diff) |
ACPI: Processor native C-states using MWAIT
Intel processors starting with the Core Duo support
support processor native C-state using the MWAIT instruction.
Refer: Intel Architecture Software Developer's Manual
http://www.intel.com/design/Pentium4/manuals/253668.htm
Platform firmware exports the support for Native C-state to OS using
ACPI _PDC and _CST methods.
Refer: Intel Processor Vendor-Specific ACPI: Interface Specification
http://www.intel.com/technology/iapc/acpi/downloads/302223.htm
With Processor Native C-state, we use 'MWAIT' instruction on the processor
to enter different C-states (C1, C2, C3). We won't use the special IO
ports to enter C-state and no SMM mode etc required to enter C-state.
Overall this will mean better C-state support.
One major advantage of using MWAIT for all C-states is, with this and
"treat interrupt as break event" feature of MWAIT, we can now get accurate
timing for the time spent in C1, C2, .. states.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'include/acpi/processor.h')
-rw-r--r-- | include/acpi/processor.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/include/acpi/processor.h b/include/acpi/processor.h index 9dd5b75961f8..7798d2a9f793 100644 --- a/include/acpi/processor.h +++ b/include/acpi/processor.h | |||
@@ -29,6 +29,9 @@ | |||
29 | #define DOMAIN_COORD_TYPE_SW_ANY 0xfd | 29 | #define DOMAIN_COORD_TYPE_SW_ANY 0xfd |
30 | #define DOMAIN_COORD_TYPE_HW_ALL 0xfe | 30 | #define DOMAIN_COORD_TYPE_HW_ALL 0xfe |
31 | 31 | ||
32 | #define ACPI_CSTATE_SYSTEMIO (0) | ||
33 | #define ACPI_CSTATE_FFH (1) | ||
34 | |||
32 | /* Power Management */ | 35 | /* Power Management */ |
33 | 36 | ||
34 | struct acpi_processor_cx; | 37 | struct acpi_processor_cx; |
@@ -58,6 +61,8 @@ struct acpi_processor_cx { | |||
58 | u8 valid; | 61 | u8 valid; |
59 | u8 type; | 62 | u8 type; |
60 | u32 address; | 63 | u32 address; |
64 | u8 space_id; | ||
65 | u8 index; | ||
61 | u32 latency; | 66 | u32 latency; |
62 | u32 latency_ticks; | 67 | u32 latency_ticks; |
63 | u32 power; | 68 | u32 power; |
@@ -206,6 +211,9 @@ void arch_acpi_processor_init_pdc(struct acpi_processor *pr); | |||
206 | #ifdef ARCH_HAS_POWER_INIT | 211 | #ifdef ARCH_HAS_POWER_INIT |
207 | void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags, | 212 | void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags, |
208 | unsigned int cpu); | 213 | unsigned int cpu); |
214 | int acpi_processor_ffh_cstate_probe(unsigned int cpu, | ||
215 | struct acpi_processor_cx *cx, struct acpi_power_register *reg); | ||
216 | void acpi_processor_ffh_cstate_enter(struct acpi_processor_cx *cstate); | ||
209 | #else | 217 | #else |
210 | static inline void acpi_processor_power_init_bm_check(struct | 218 | static inline void acpi_processor_power_init_bm_check(struct |
211 | acpi_processor_flags | 219 | acpi_processor_flags |
@@ -214,6 +222,16 @@ static inline void acpi_processor_power_init_bm_check(struct | |||
214 | flags->bm_check = 1; | 222 | flags->bm_check = 1; |
215 | return; | 223 | return; |
216 | } | 224 | } |
225 | static inline int acpi_processor_ffh_cstate_probe(unsigned int cpu, | ||
226 | struct acpi_processor_cx *cx, struct acpi_power_register *reg) | ||
227 | { | ||
228 | return -1; | ||
229 | } | ||
230 | static inline void acpi_processor_ffh_cstate_enter( | ||
231 | struct acpi_processor_cx *cstate) | ||
232 | { | ||
233 | return; | ||
234 | } | ||
217 | #endif | 235 | #endif |
218 | 236 | ||
219 | /* in processor_perflib.c */ | 237 | /* in processor_perflib.c */ |