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authorBob Moore <robert.moore@intel.com>2009-02-03 02:14:33 -0500
committerLen Brown <len.brown@intel.com>2009-03-26 16:38:21 -0400
commit993958fecab6eabc6ee5b7ed65c56d716fd5cfe3 (patch)
treedab5afbf110b7e4b1e380105398c03499080fdf6 /include/acpi/actbl.h
parentd3ccaff827cef5a5c5a0f3c97e1e2e6d99f618cb (diff)
ACPICA: Update FADT flag definitions
Add new flags in the Boot Architecture flags field. Update comments for all FADT flags. Add FADT version when each flag was defined. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'include/acpi/actbl.h')
-rw-r--r--include/acpi/actbl.h69
1 files changed, 34 insertions, 35 deletions
diff --git a/include/acpi/actbl.h b/include/acpi/actbl.h
index 1f3dfdb1b370..222733d01f36 100644
--- a/include/acpi/actbl.h
+++ b/include/acpi/actbl.h
@@ -214,11 +214,11 @@ struct acpi_table_fadt {
214 u16 flush_size; /* Processor's memory cache line width, in bytes */ 214 u16 flush_size; /* Processor's memory cache line width, in bytes */
215 u16 flush_stride; /* Number of flush strides that need to be read */ 215 u16 flush_stride; /* Number of flush strides that need to be read */
216 u8 duty_offset; /* Processor duty cycle index in processor's P_CNT reg */ 216 u8 duty_offset; /* Processor duty cycle index in processor's P_CNT reg */
217 u8 duty_width; /* Processor duty cycle value bit width in P_CNT register. */ 217 u8 duty_width; /* Processor duty cycle value bit width in P_CNT register */
218 u8 day_alarm; /* Index to day-of-month alarm in RTC CMOS RAM */ 218 u8 day_alarm; /* Index to day-of-month alarm in RTC CMOS RAM */
219 u8 month_alarm; /* Index to month-of-year alarm in RTC CMOS RAM */ 219 u8 month_alarm; /* Index to month-of-year alarm in RTC CMOS RAM */
220 u8 century; /* Index to century in RTC CMOS RAM */ 220 u8 century; /* Index to century in RTC CMOS RAM */
221 u16 boot_flags; /* IA-PC Boot Architecture Flags. See Table 5-10 for description */ 221 u16 boot_flags; /* IA-PC Boot Architecture Flags (see below for individual flags) */
222 u8 reserved; /* Reserved, must be zero */ 222 u8 reserved; /* Reserved, must be zero */
223 u32 flags; /* Miscellaneous flag bits (see below for individual flags) */ 223 u32 flags; /* Miscellaneous flag bits (see below for individual flags) */
224 struct acpi_generic_address reset_register; /* 64-bit address of the Reset register */ 224 struct acpi_generic_address reset_register; /* 64-bit address of the Reset register */
@@ -236,32 +236,41 @@ struct acpi_table_fadt {
236 struct acpi_generic_address xgpe1_block; /* 64-bit Extended General Purpose Event 1 Reg Blk address */ 236 struct acpi_generic_address xgpe1_block; /* 64-bit Extended General Purpose Event 1 Reg Blk address */
237}; 237};
238 238
239/* FADT Boot Architecture Flags (boot_flags) */
240
241#define ACPI_FADT_LEGACY_DEVICES (1) /* 00: [V2] System has LPC or ISA bus devices */
242#define ACPI_FADT_8042 (1<<1) /* 01: [V3] System has an 8042 controller on port 60/64 */
243#define ACPI_FADT_NO_VGA (1<<2) /* 02: [V4] It is not safe to probe for VGA hardware */
244#define ACPI_FADT_NO_MSI (1<<3) /* 03: [V4] Message Signaled Interrupts (MSI) must not be enabled */
245#define ACPI_FADT_NO_ASPM (1<<4) /* 04: [V4] PCIe ASPM control must not be enabled */
246
247#define FADT2_REVISION_ID 3
248
239/* FADT flags */ 249/* FADT flags */
240 250
241#define ACPI_FADT_WBINVD (1) /* 00: The wbinvd instruction works properly */ 251#define ACPI_FADT_WBINVD (1) /* 00: [V1] The wbinvd instruction works properly */
242#define ACPI_FADT_WBINVD_FLUSH (1<<1) /* 01: The wbinvd flushes but does not invalidate */ 252#define ACPI_FADT_WBINVD_FLUSH (1<<1) /* 01: [V1] wbinvd flushes but does not invalidate caches */
243#define ACPI_FADT_C1_SUPPORTED (1<<2) /* 02: All processors support C1 state */ 253#define ACPI_FADT_C1_SUPPORTED (1<<2) /* 02: [V1] All processors support C1 state */
244#define ACPI_FADT_C2_MP_SUPPORTED (1<<3) /* 03: C2 state works on MP system */ 254#define ACPI_FADT_C2_MP_SUPPORTED (1<<3) /* 03: [V1] C2 state works on MP system */
245#define ACPI_FADT_POWER_BUTTON (1<<4) /* 04: Power button is handled as a generic feature */ 255#define ACPI_FADT_POWER_BUTTON (1<<4) /* 04: [V1] Power button is handled as a control method device */
246#define ACPI_FADT_SLEEP_BUTTON (1<<5) /* 05: Sleep button is handled as a generic feature, or not present */ 256#define ACPI_FADT_SLEEP_BUTTON (1<<5) /* 05: [V1] Sleep button is handled as a control method device */
247#define ACPI_FADT_FIXED_RTC (1<<6) /* 06: RTC wakeup stat not in fixed register space */ 257#define ACPI_FADT_FIXED_RTC (1<<6) /* 06: [V1] RTC wakeup status not in fixed register space */
248#define ACPI_FADT_S4_RTC_WAKE (1<<7) /* 07: RTC wakeup possible from S4 */ 258#define ACPI_FADT_S4_RTC_WAKE (1<<7) /* 07: [V1] RTC alarm can wake system from S4 */
249#define ACPI_FADT_32BIT_TIMER (1<<8) /* 08: tmr_val is 32 bits 0=24-bits */ 259#define ACPI_FADT_32BIT_TIMER (1<<8) /* 08: [V1] ACPI timer width is 32-bit (0=24-bit) */
250#define ACPI_FADT_DOCKING_SUPPORTED (1<<9) /* 09: Docking supported */ 260#define ACPI_FADT_DOCKING_SUPPORTED (1<<9) /* 09: [V1] Docking supported */
251#define ACPI_FADT_RESET_REGISTER (1<<10) /* 10: System reset via the FADT RESET_REG supported */ 261#define ACPI_FADT_RESET_REGISTER (1<<10) /* 10: [V2] System reset via the FADT RESET_REG supported */
252#define ACPI_FADT_SEALED_CASE (1<<11) /* 11: No internal expansion capabilities and case is sealed */ 262#define ACPI_FADT_SEALED_CASE (1<<11) /* 11: [V3] No internal expansion capabilities and case is sealed */
253#define ACPI_FADT_HEADLESS (1<<12) /* 12: No local video capabilities or local input devices */ 263#define ACPI_FADT_HEADLESS (1<<12) /* 12: [V3] No local video capabilities or local input devices */
254#define ACPI_FADT_SLEEP_TYPE (1<<13) /* 13: Must execute native instruction after writing SLP_TYPx register */ 264#define ACPI_FADT_SLEEP_TYPE (1<<13) /* 13: [V3] Must execute native instruction after writing SLP_TYPx register */
255#define ACPI_FADT_PCI_EXPRESS_WAKE (1<<14) /* 14: System supports PCIEXP_WAKE (STS/EN) bits (ACPI 3.0) */ 265#define ACPI_FADT_PCI_EXPRESS_WAKE (1<<14) /* 14: [V4] System supports PCIEXP_WAKE (STS/EN) bits (ACPI 3.0) */
256#define ACPI_FADT_PLATFORM_CLOCK (1<<15) /* 15: OSPM should use platform-provided timer (ACPI 3.0) */ 266#define ACPI_FADT_PLATFORM_CLOCK (1<<15) /* 15: [V4] OSPM should use platform-provided timer (ACPI 3.0) */
257#define ACPI_FADT_S4_RTC_VALID (1<<16) /* 16: Contents of RTC_STS valid after S4 wake (ACPI 3.0) */ 267#define ACPI_FADT_S4_RTC_VALID (1<<16) /* 16: [V4] Contents of RTC_STS valid after S4 wake (ACPI 3.0) */
258#define ACPI_FADT_REMOTE_POWER_ON (1<<17) /* 17: System is compatible with remote power on (ACPI 3.0) */ 268#define ACPI_FADT_REMOTE_POWER_ON (1<<17) /* 17: [V4] System is compatible with remote power on (ACPI 3.0) */
259#define ACPI_FADT_APIC_CLUSTER (1<<18) /* 18: All local APICs must use cluster model (ACPI 3.0) */ 269#define ACPI_FADT_APIC_CLUSTER (1<<18) /* 18: [V4] All local APICs must use cluster model (ACPI 3.0) */
260#define ACPI_FADT_APIC_PHYSICAL (1<<19) /* 19: All local x_aPICs must use physical dest mode (ACPI 3.0) */ 270#define ACPI_FADT_APIC_PHYSICAL (1<<19) /* 19: [V4] All local x_aPICs must use physical dest mode (ACPI 3.0) */
271
272/* FADT Prefered Power Management Profiles */
261 273
262/*
263 * FADT Prefered Power Management Profiles
264 */
265enum acpi_prefered_pm_profiles { 274enum acpi_prefered_pm_profiles {
266 PM_UNSPECIFIED = 0, 275 PM_UNSPECIFIED = 0,
267 PM_DESKTOP = 1, 276 PM_DESKTOP = 1,
@@ -272,16 +281,6 @@ enum acpi_prefered_pm_profiles {
272 PM_APPLIANCE_PC = 6 281 PM_APPLIANCE_PC = 6
273}; 282};
274 283
275/* FADT Boot Arch Flags */
276
277#define BAF_LEGACY_DEVICES 0x0001
278#define BAF_8042_KEYBOARD_CONTROLLER 0x0002
279#define BAF_MSI_NOT_SUPPORTED 0x0008
280#define BAF_PCIE_ASPM_CONTROL 0x0010
281
282#define FADT2_REVISION_ID 3
283#define FADT2_MINUS_REVISION_ID 2
284
285/* Reset to default packing */ 284/* Reset to default packing */
286 285
287#pragma pack() 286#pragma pack()