diff options
| author | David Daney <ddaney@caviumnetworks.com> | 2010-10-07 19:03:53 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2010-10-29 14:08:43 -0400 |
| commit | c9941158fd8a539a56b0e8a4740ec1f6beb23ea3 (patch) | |
| tree | 73e3868737061e1d5b0b61c182ea443e3ccd94e3 /firmware/radeon/RV610_me.bin.ihex | |
| parent | 468ffde46d429fbd291b0ef43a06afe9c837629f (diff) | |
MIPS: Octeon: Apply CN63XXP1 errata workarounds.
The CN63XXP1 needs a couple of workarounds to ensure memory is not written
in unexpected ways.
All PREF with hints in the range 0-4,6-24 are replaced with PREF 28. We
pass a flag to the assembler to cover compiler generated code, and patch
uasm for the dynamically generated code.
The write buffer threshold is reduced to 4.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1672/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'firmware/radeon/RV610_me.bin.ihex')
0 files changed, 0 insertions, 0 deletions