aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorshemminger@osdl.org <shemminger@osdl.org>2005-10-26 15:16:09 -0400
committerJeff Garzik <jgarzik@pobox.com>2005-10-28 12:18:53 -0400
commitd571b694df3ebc66f7a4c507f5a32579e43c2294 (patch)
treeb58bbc8e4dcf938255af533036befd6354461bc5 /drivers
parentb2f5ad4fec76e78103e7fbb4e808587ea8a6d824 (diff)
[PATCH] sky2: spelling fixes
Cosmetic cleanup's: mostly spelling fixes etc. Signed-off-by: Stephen Hemminger <shemminger@osdl.org> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/sky2.c32
-rw-r--r--drivers/net/sky2.h10
2 files changed, 21 insertions, 21 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index f5b101bf469e..92d69fff8755 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -214,7 +214,7 @@ static int sky2_set_power_state(struct sky2_hw *hw, pci_power_t state)
214 pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &reg1); 214 pci_read_config_dword(hw->pdev, PCI_DEV_REG1, &reg1);
215 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD); 215 reg1 &= ~(PCI_Y2_PHY1_POWD | PCI_Y2_PHY2_POWD);
216 216
217 /* looks like this xl is back asswards .. */ 217 /* looks like this XL is back asswards .. */
218 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) { 218 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev > 1) {
219 reg1 |= PCI_Y2_PHY1_COMA; 219 reg1 |= PCI_Y2_PHY1_COMA;
220 if (hw->ports > 1) 220 if (hw->ports > 1)
@@ -461,7 +461,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
461 if (ledover) 461 if (ledover)
462 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); 462 gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover);
463 463
464 /* Enable phy interrupt on autonegotiation complete (or link up) */ 464 /* Enable phy interrupt on auto-negotiation complete (or link up) */
465 if (sky2->autoneg == AUTONEG_ENABLE) 465 if (sky2->autoneg == AUTONEG_ENABLE)
466 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); 466 gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL);
467 else 467 else
@@ -578,10 +578,10 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
578 sky2_write16(hw, SK_REG(port, RX_GMF_CTRL_T), 578 sky2_write16(hw, SK_REG(port, RX_GMF_CTRL_T),
579 GMF_RX_CTRL_DEF); 579 GMF_RX_CTRL_DEF);
580 580
581 /* Flush Rx MAC FIFO on any flowcontrol or error */ 581 /* Flush Rx MAC FIFO on any flow control or error */
582 reg = GMR_FS_ANY_ERR; 582 reg = GMR_FS_ANY_ERR;
583 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev <= 1) 583 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev <= 1)
584 reg = 0; /* WA Dev #4115 */ 584 reg = 0; /* WA dev #4.115 */
585 585
586 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), reg); 586 sky2_write16(hw, SK_REG(port, RX_GMF_FL_MSK), reg);
587 /* Set threshold to 0xa (64 bytes) 587 /* Set threshold to 0xa (64 bytes)
@@ -662,7 +662,7 @@ static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2)
662} 662}
663 663
664/* 664/*
665 * This is a workaround code taken from syskonnect sk98lin driver 665 * This is a workaround code taken from SysKonnect sk98lin driver
666 * to deal with chip bug on Yukon EC rev 0 in the wraparound case. 666 * to deal with chip bug on Yukon EC rev 0 in the wraparound case.
667 */ 667 */
668static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q, 668static inline void sky2_put_idx(struct sky2_hw *hw, unsigned q,
@@ -785,7 +785,7 @@ stopped:
785 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET); 785 sky2_write32(hw, Y2_QADDR(rxq, PREF_UNIT_CTRL), PREF_UNIT_RST_SET);
786} 786}
787 787
788/* Cleanout receive buffer area, assumes receiver hardware stopped */ 788/* Clean out receive buffer area, assumes receiver hardware stopped */
789static void sky2_rx_clean(struct sky2_port *sky2) 789static void sky2_rx_clean(struct sky2_port *sky2)
790{ 790{
791 unsigned i; 791 unsigned i;
@@ -1174,7 +1174,7 @@ out_unlock:
1174 * Free ring elements from starting at tx_cons until "done" 1174 * Free ring elements from starting at tx_cons until "done"
1175 * 1175 *
1176 * NB: the hardware will tell us about partial completion of multi-part 1176 * NB: the hardware will tell us about partial completion of multi-part
1177 * buffers; these are defered until completion. 1177 * buffers; these are deferred until completion.
1178 */ 1178 */
1179static void sky2_tx_complete(struct sky2_port *sky2, u16 done) 1179static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
1180{ 1180{
@@ -1182,7 +1182,7 @@ static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
1182 unsigned i; 1182 unsigned i;
1183 1183
1184 if (unlikely(netif_msg_tx_done(sky2))) 1184 if (unlikely(netif_msg_tx_done(sky2)))
1185 printk(KERN_DEBUG "%s: tx done, upto %u\n", 1185 printk(KERN_DEBUG "%s: tx done, up to %u\n",
1186 dev->name, done); 1186 dev->name, done);
1187 1187
1188 spin_lock(&sky2->tx_lock); 1188 spin_lock(&sky2->tx_lock);
@@ -1282,7 +1282,7 @@ static int sky2_down(struct net_device *dev)
1282 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); 1282 sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET);
1283 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); 1283 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET);
1284 1284
1285 /* turn off led's */ 1285 /* turn off LED's */
1286 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF); 1286 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF);
1287 1287
1288 sky2_tx_clean(sky2); 1288 sky2_tx_clean(sky2);
@@ -1364,7 +1364,7 @@ static void sky2_link_up(struct sky2_port *sky2)
1364 1364
1365 if (netif_msg_link(sky2)) 1365 if (netif_msg_link(sky2))
1366 printk(KERN_INFO PFX 1366 printk(KERN_INFO PFX
1367 "%s: Link is up at %d Mbps, %s duplex, flowcontrol %s\n", 1367 "%s: Link is up at %d Mbps, %s duplex, flow control %s\n",
1368 sky2->netdev->name, sky2->speed, 1368 sky2->netdev->name, sky2->speed,
1369 sky2->duplex == DUPLEX_FULL ? "full" : "half", 1369 sky2->duplex == DUPLEX_FULL ? "full" : "half",
1370 (sky2->tx_pause && sky2->rx_pause) ? "both" : 1370 (sky2->tx_pause && sky2->rx_pause) ? "both" :
@@ -1451,7 +1451,7 @@ static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux)
1451} 1451}
1452 1452
1453/* 1453/*
1454 * Interrrupt from PHY are handled in tasklet (soft irq) 1454 * Interrupt from PHY are handled in tasklet (soft irq)
1455 * because accessing phy registers requires spin wait which might 1455 * because accessing phy registers requires spin wait which might
1456 * cause excess interrupt latency. 1456 * cause excess interrupt latency.
1457 */ 1457 */
@@ -1556,7 +1556,7 @@ static int sky2_change_mtu(struct net_device *dev, int new_mtu)
1556/* 1556/*
1557 * Receive one packet. 1557 * Receive one packet.
1558 * For small packets or errors, just reuse existing skb. 1558 * For small packets or errors, just reuse existing skb.
1559 * For larger pakects, get new buffer. 1559 * For larger packets, get new buffer.
1560 */ 1560 */
1561static struct sk_buff *sky2_receive(struct sky2_port *sky2, 1561static struct sk_buff *sky2_receive(struct sky2_port *sky2,
1562 u16 length, u32 status) 1562 u16 length, u32 status)
@@ -1818,7 +1818,7 @@ static void sky2_hw_intr(struct sky2_hw *hw)
1818 } 1818 }
1819 1819
1820 if (status & Y2_IS_PCI_EXP) { 1820 if (status & Y2_IS_PCI_EXP) {
1821 /* PCI-Express uncorrectable Error occured */ 1821 /* PCI-Express uncorrectable Error occurred */
1822 u32 pex_err; 1822 u32 pex_err;
1823 1823
1824 pci_read_config_dword(hw->pdev, PEX_UNC_ERR_STAT, &pex_err); 1824 pci_read_config_dword(hw->pdev, PEX_UNC_ERR_STAT, &pex_err);
@@ -2113,7 +2113,7 @@ static int sky2_reset(struct sky2_hw *hw)
2113 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0) 2113 if (hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0)
2114 sky2_write8(hw, STAT_FIFO_ISR_WM, 0x10); 2114 sky2_write8(hw, STAT_FIFO_ISR_WM, 0x10);
2115 2115
2116 else /* WA 4109 */ 2116 else /* WA dev 4.109 */
2117 sky2_write8(hw, STAT_FIFO_ISR_WM, 0x04); 2117 sky2_write8(hw, STAT_FIFO_ISR_WM, 0x04);
2118 2118
2119 sky2_write32(hw, STAT_ISR_TIMER_INI, 0x0190); 2119 sky2_write32(hw, STAT_ISR_TIMER_INI, 0x0190);
@@ -2420,7 +2420,7 @@ static void sky2_set_multicast(struct net_device *dev)
2420 reg = gma_read16(hw, port, GM_RX_CTRL); 2420 reg = gma_read16(hw, port, GM_RX_CTRL);
2421 reg |= GM_RXCR_UCF_ENA; 2421 reg |= GM_RXCR_UCF_ENA;
2422 2422
2423 if (dev->flags & IFF_PROMISC) /* promiscious */ 2423 if (dev->flags & IFF_PROMISC) /* promiscuous */
2424 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA); 2424 reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA);
2425 else if ((dev->flags & IFF_ALLMULTI) || dev->mc_count > 16) /* all multicast */ 2425 else if ((dev->flags & IFF_ALLMULTI) || dev->mc_count > 16) /* all multicast */
2426 memset(filter, 0xff, sizeof(filter)); 2426 memset(filter, 0xff, sizeof(filter));
@@ -2833,7 +2833,7 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
2833 } 2833 }
2834 } 2834 }
2835#ifdef __BIG_ENDIAN 2835#ifdef __BIG_ENDIAN
2836 /* byte swap decriptors in hardware */ 2836 /* byte swap descriptors in hardware */
2837 { 2837 {
2838 u32 reg; 2838 u32 reg;
2839 2839
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index c15d46409bcc..629d08f170fd 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -356,11 +356,11 @@ enum {
356 356
357/* B2_Y2_CLK_GATE 8 bit Clock Gating (Yukon-2 only) */ 357/* B2_Y2_CLK_GATE 8 bit Clock Gating (Yukon-2 only) */
358enum { 358enum {
359 Y2_STATUS_LNK2_INAC = 1<<7, /* Status Link 2 inactiv (0 = activ) */ 359 Y2_STATUS_LNK2_INAC = 1<<7, /* Status Link 2 inactive (0 = active) */
360 Y2_CLK_GAT_LNK2_DIS = 1<<6, /* Disable clock gating Link 2 */ 360 Y2_CLK_GAT_LNK2_DIS = 1<<6, /* Disable clock gating Link 2 */
361 Y2_COR_CLK_LNK2_DIS = 1<<5, /* Disable Core clock Link 2 */ 361 Y2_COR_CLK_LNK2_DIS = 1<<5, /* Disable Core clock Link 2 */
362 Y2_PCI_CLK_LNK2_DIS = 1<<4, /* Disable PCI clock Link 2 */ 362 Y2_PCI_CLK_LNK2_DIS = 1<<4, /* Disable PCI clock Link 2 */
363 Y2_STATUS_LNK1_INAC = 1<<3, /* Status Link 1 inactiv (0 = activ) */ 363 Y2_STATUS_LNK1_INAC = 1<<3, /* Status Link 1 inactive (0 = active) */
364 Y2_CLK_GAT_LNK1_DIS = 1<<2, /* Disable clock gating Link 1 */ 364 Y2_CLK_GAT_LNK1_DIS = 1<<2, /* Disable clock gating Link 1 */
365 Y2_COR_CLK_LNK1_DIS = 1<<1, /* Disable Core clock Link 1 */ 365 Y2_COR_CLK_LNK1_DIS = 1<<1, /* Disable Core clock Link 1 */
366 Y2_PCI_CLK_LNK1_DIS = 1<<0, /* Disable PCI clock Link 1 */ 366 Y2_PCI_CLK_LNK1_DIS = 1<<0, /* Disable PCI clock Link 1 */
@@ -410,7 +410,7 @@ enum {
410#define RAM_ADR_RAN 0x0007ffffL /* Bit 18.. 0: RAM Address Range */ 410#define RAM_ADR_RAN 0x0007ffffL /* Bit 18.. 0: RAM Address Range */
411/* RAM Interface Registers */ 411/* RAM Interface Registers */
412 412
413/* B3_RI_CTRL 16 bit RAM Iface Control Register */ 413/* B3_RI_CTRL 16 bit RAM Interface Control Register */
414enum { 414enum {
415 RI_CLR_RD_PERR = 1<<9, /* Clear IRQ RAM Read Parity Err */ 415 RI_CLR_RD_PERR = 1<<9, /* Clear IRQ RAM Read Parity Err */
416 RI_CLR_WR_PERR = 1<<8, /* Clear IRQ RAM Write Parity Err*/ 416 RI_CLR_WR_PERR = 1<<8, /* Clear IRQ RAM Write Parity Err*/
@@ -613,7 +613,7 @@ enum {
613 BMU_ENA_RX_CHKSUM = 1<<13, /* Enable Rx TCP/IP Checksum Check */ 613 BMU_ENA_RX_CHKSUM = 1<<13, /* Enable Rx TCP/IP Checksum Check */
614 BMU_DIS_RX_CHKSUM = 1<<12, /* Disable Rx TCP/IP Checksum Check */ 614 BMU_DIS_RX_CHKSUM = 1<<12, /* Disable Rx TCP/IP Checksum Check */
615 BMU_CLR_IRQ_PAR = 1<<11, /* Clear IRQ on Parity errors (Rx) */ 615 BMU_CLR_IRQ_PAR = 1<<11, /* Clear IRQ on Parity errors (Rx) */
616 BMU_CLR_IRQ_TCP = 1<<11, /* Clear IRQ on TCP segmen. error (Tx) */ 616 BMU_CLR_IRQ_TCP = 1<<11, /* Clear IRQ on TCP segment. error (Tx) */
617 BMU_CLR_IRQ_CHK = 1<<10, /* Clear IRQ Check */ 617 BMU_CLR_IRQ_CHK = 1<<10, /* Clear IRQ Check */
618 BMU_STOP = 1<<9, /* Stop Rx/Tx Queue */ 618 BMU_STOP = 1<<9, /* Stop Rx/Tx Queue */
619 BMU_START = 1<<8, /* Start Rx/Tx Queue */ 619 BMU_START = 1<<8, /* Start Rx/Tx Queue */
@@ -636,7 +636,7 @@ enum {
636enum { 636enum {
637 BMU_TX_IPIDINCR_ON = 1<<13, /* Enable IP ID Increment */ 637 BMU_TX_IPIDINCR_ON = 1<<13, /* Enable IP ID Increment */
638 BMU_TX_IPIDINCR_OFF = 1<<12, /* Disable IP ID Increment */ 638 BMU_TX_IPIDINCR_OFF = 1<<12, /* Disable IP ID Increment */
639 BMU_TX_CLR_IRQ_TCP = 1<<11, /* Clear IRQ on TCP segm. length mism. */ 639 BMU_TX_CLR_IRQ_TCP = 1<<11, /* Clear IRQ on TCP segment length mismatch */
640}; 640};
641 641
642/* Queue Prefetch Unit Offsets, use Y2_QADDR() to address (Yukon-2 only)*/ 642/* Queue Prefetch Unit Offsets, use Y2_QADDR() to address (Yukon-2 only)*/