diff options
author | Krzysztof Helt <krzysztof.h1@wp.pl> | 2007-10-16 04:29:06 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-10-16 12:43:18 -0400 |
commit | 69816699fa019145dd163949d65a07093af73b67 (patch) | |
tree | 62f882257742edc6edda05349cf75789fb6fabe9 /drivers | |
parent | 9fa7bc016a688630386378c205f9ee0f7b2cc834 (diff) |
s3c2410fb: adds pixclock to s3c2410fb_display
This patch adds pixelclock field to the s3c2410fb_display structure and make
use of it in the driver.
The Bast machine defined 9 modes but pixclock and margin values are defined
only for the 640x480 modes so I removed other modes.
This patch also fixes wrong display type constant for the SMDK2440 board.
Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/video/s3c2410fb.c | 42 |
1 files changed, 16 insertions, 26 deletions
diff --git a/drivers/video/s3c2410fb.c b/drivers/video/s3c2410fb.c index 09d19633d3bc..fd05231f0c08 100644 --- a/drivers/video/s3c2410fb.c +++ b/drivers/video/s3c2410fb.c | |||
@@ -199,6 +199,7 @@ static int s3c2410fb_check_var(struct fb_var_screeninfo *var, | |||
199 | var->width = display->width; | 199 | var->width = display->width; |
200 | 200 | ||
201 | /* copy lcd settings */ | 201 | /* copy lcd settings */ |
202 | var->pixclock = display->pixclock; | ||
202 | var->left_margin = display->left_margin; | 203 | var->left_margin = display->left_margin; |
203 | var->right_margin = display->right_margin; | 204 | var->right_margin = display->right_margin; |
204 | var->upper_margin = display->upper_margin; | 205 | var->upper_margin = display->upper_margin; |
@@ -297,10 +298,6 @@ static void s3c2410fb_calculate_stn_lcd_regs(const struct fb_info *info, | |||
297 | unsigned wdly = (var->left_margin >> 4) - 1; | 298 | unsigned wdly = (var->left_margin >> 4) - 1; |
298 | unsigned wlh = (var->hsync_len >> 4) - 1; | 299 | unsigned wlh = (var->hsync_len >> 4) - 1; |
299 | 300 | ||
300 | dprintk("%s: var->xres = %d\n", __FUNCTION__, var->xres); | ||
301 | dprintk("%s: var->yres = %d\n", __FUNCTION__, var->yres); | ||
302 | dprintk("%s: var->bpp = %d\n", __FUNCTION__, var->bits_per_pixel); | ||
303 | |||
304 | if (type != S3C2410_LCDCON1_STN4) | 301 | if (type != S3C2410_LCDCON1_STN4) |
305 | hs >>= 1; | 302 | hs >>= 1; |
306 | 303 | ||
@@ -359,10 +356,6 @@ static void s3c2410fb_calculate_tft_lcd_regs(const struct fb_info *info, | |||
359 | const struct s3c2410fb_info *fbi = info->par; | 356 | const struct s3c2410fb_info *fbi = info->par; |
360 | const struct fb_var_screeninfo *var = &info->var; | 357 | const struct fb_var_screeninfo *var = &info->var; |
361 | 358 | ||
362 | dprintk("%s: var->xres = %d\n", __FUNCTION__, var->xres); | ||
363 | dprintk("%s: var->yres = %d\n", __FUNCTION__, var->yres); | ||
364 | dprintk("%s: var->bpp = %d\n", __FUNCTION__, var->bits_per_pixel); | ||
365 | |||
366 | regs->lcdcon1 &= ~S3C2410_LCDCON1_MODEMASK; | 359 | regs->lcdcon1 &= ~S3C2410_LCDCON1_MODEMASK; |
367 | 360 | ||
368 | switch (var->bits_per_pixel) { | 361 | switch (var->bits_per_pixel) { |
@@ -427,28 +420,25 @@ static void s3c2410fb_activate_var(struct fb_info *info) | |||
427 | void __iomem *regs = fbi->io; | 420 | void __iomem *regs = fbi->io; |
428 | int type = fbi->regs.lcdcon1 & S3C2410_LCDCON1_TFT; | 421 | int type = fbi->regs.lcdcon1 & S3C2410_LCDCON1_TFT; |
429 | struct fb_var_screeninfo *var = &info->var; | 422 | struct fb_var_screeninfo *var = &info->var; |
423 | int clkdiv = s3c2410fb_calc_pixclk(fbi, var->pixclock) / 2; | ||
430 | 424 | ||
431 | if (var->pixclock > 0) { | 425 | dprintk("%s: var->xres = %d\n", __FUNCTION__, var->xres); |
432 | int clkdiv = s3c2410fb_calc_pixclk(fbi, var->pixclock); | 426 | dprintk("%s: var->yres = %d\n", __FUNCTION__, var->yres); |
433 | 427 | dprintk("%s: var->bpp = %d\n", __FUNCTION__, var->bits_per_pixel); | |
434 | if (type == S3C2410_LCDCON1_TFT) { | ||
435 | clkdiv = (clkdiv / 2) - 1; | ||
436 | if (clkdiv < 0) | ||
437 | clkdiv = 0; | ||
438 | } else { | ||
439 | clkdiv = (clkdiv / 2); | ||
440 | if (clkdiv < 2) | ||
441 | clkdiv = 2; | ||
442 | } | ||
443 | |||
444 | fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_CLKVAL(0x3ff); | ||
445 | fbi->regs.lcdcon1 |= S3C2410_LCDCON1_CLKVAL(clkdiv); | ||
446 | } | ||
447 | 428 | ||
448 | if (type == S3C2410_LCDCON1_TFT) | 429 | if (type == S3C2410_LCDCON1_TFT) { |
449 | s3c2410fb_calculate_tft_lcd_regs(info, &fbi->regs); | 430 | s3c2410fb_calculate_tft_lcd_regs(info, &fbi->regs); |
450 | else | 431 | --clkdiv; |
432 | if (clkdiv < 0) | ||
433 | clkdiv = 0; | ||
434 | } else { | ||
451 | s3c2410fb_calculate_stn_lcd_regs(info, &fbi->regs); | 435 | s3c2410fb_calculate_stn_lcd_regs(info, &fbi->regs); |
436 | if (clkdiv < 2) | ||
437 | clkdiv = 2; | ||
438 | } | ||
439 | |||
440 | fbi->regs.lcdcon1 &= ~S3C2410_LCDCON1_CLKVAL(0x3ff); | ||
441 | fbi->regs.lcdcon1 |= S3C2410_LCDCON1_CLKVAL(clkdiv); | ||
452 | 442 | ||
453 | /* write new registers */ | 443 | /* write new registers */ |
454 | 444 | ||