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authorRafał Miłecki <zajec5@gmail.com>2010-11-18 07:27:59 -0500
committerJohn W. Linville <linville@tuxdriver.com>2010-11-24 16:19:33 -0500
commita5d3598de086cd38f71fe2fec43ac3ca97bb24bb (patch)
tree5c8cf0ab6d41edf2bbd25cf99579cb7357eb1316 /drivers
parentc0f05b9879a324937f14270e4a14d661d2beca63 (diff)
b43: N-PHY: fix some typos, conditions, set gain_boost
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/wireless/b43/phy_n.c35
1 files changed, 18 insertions, 17 deletions
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index fce5232336b4..cbdee308bb50 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -919,15 +919,15 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
919 B43_NPHY_C2_CGAINI_CL2DETECT); 919 B43_NPHY_C2_CGAINI_CL2DETECT);
920 920
921 /* Set narrowband clip threshold */ 921 /* Set narrowband clip threshold */
922 b43_phy_set(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84); 922 b43_phy_write(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84);
923 b43_phy_set(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84); 923 b43_phy_write(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84);
924 924
925 if (!dev->phy.is_40mhz) { 925 if (!dev->phy.is_40mhz) {
926 /* Set dwell lengths */ 926 /* Set dwell lengths */
927 b43_phy_set(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B); 927 b43_phy_write(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B);
928 b43_phy_set(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B); 928 b43_phy_write(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B);
929 b43_phy_set(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009); 929 b43_phy_write(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009);
930 b43_phy_set(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009); 930 b43_phy_write(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009);
931 } 931 }
932 932
933 /* Set wideband clip 2 threshold */ 933 /* Set wideband clip 2 threshold */
@@ -949,7 +949,7 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
949 ~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1); 949 ~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1);
950 } 950 }
951 951
952 b43_phy_set(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C); 952 b43_phy_write(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
953 953
954 if (nphy->gain_boost) { 954 if (nphy->gain_boost) {
955 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ && 955 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ &&
@@ -970,10 +970,10 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
970 code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT); 970 code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT);
971 971
972 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06); 972 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
973 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 973 /* specs say about 2 loops, but wl does 4 */
974 (code << 8 | 0x7C)); 974 for (i = 0; i < 4; i++)
975 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 975 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
976 (code << 8 | 0x7C)); 976 (code << 8 | 0x7C));
977 977
978 b43_nphy_adjust_lna_gain_table(dev); 978 b43_nphy_adjust_lna_gain_table(dev);
979 979
@@ -991,10 +991,10 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
991 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1); 991 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
992 992
993 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06); 993 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
994 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 994 /* specs say about 2 loops, but wl does 4 */
995 (code << 8 | 0x74)); 995 for (i = 0; i < 4; i++)
996 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 996 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
997 (code << 8 | 0x74)); 997 (code << 8 | 0x74));
998 } 998 }
999 999
1000 if (dev->phy.rev == 2) { 1000 if (dev->phy.rev == 2) {
@@ -1034,7 +1034,7 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
1034 u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 }; 1034 u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 };
1035 u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 }; 1035 u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 };
1036 1036
1037 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) 1037 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
1038 b43_nphy_classifier(dev, 1, 0); 1038 b43_nphy_classifier(dev, 1, 0);
1039 else 1039 else
1040 b43_nphy_classifier(dev, 1, 1); 1040 b43_nphy_classifier(dev, 1, 1);
@@ -3459,7 +3459,8 @@ static void b43_nphy_op_prepare_structs(struct b43_wldev *dev)
3459 3459
3460 memset(nphy, 0, sizeof(*nphy)); 3460 memset(nphy, 0, sizeof(*nphy));
3461 3461
3462 //TODO init struct b43_phy_n 3462 /* wl goes path which is executed for gain_boost, assume it is true */
3463 nphy->gain_boost = true;
3463} 3464}
3464 3465
3465static void b43_nphy_op_free(struct b43_wldev *dev) 3466static void b43_nphy_op_free(struct b43_wldev *dev)