diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2012-09-27 12:09:45 -0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-09-27 12:09:45 -0400 |
| commit | 8922c9b4b2e3b1b845b46e8da61ad228d8f1b121 (patch) | |
| tree | 0342521aa22e175a1c22c38f005ec7fd2037ff99 /drivers | |
| parent | 73d155b304575435cd9f6deeb93fbd4d2a6cc9af (diff) | |
| parent | 22df90f6bb687db58298084a200782dd0148d247 (diff) | |
Merge branch 'broadcom' of git://dev.phrozen.org/mips-next into mips-for-linux-next
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/ethernet/broadcom/bcm63xx_enet.h | 30 |
1 files changed, 1 insertions, 29 deletions
diff --git a/drivers/net/ethernet/broadcom/bcm63xx_enet.h b/drivers/net/ethernet/broadcom/bcm63xx_enet.h index 0e3048b788c2..133d5857b9e2 100644 --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h | |||
| @@ -10,6 +10,7 @@ | |||
| 10 | #include <bcm63xx_regs.h> | 10 | #include <bcm63xx_regs.h> |
| 11 | #include <bcm63xx_irq.h> | 11 | #include <bcm63xx_irq.h> |
| 12 | #include <bcm63xx_io.h> | 12 | #include <bcm63xx_io.h> |
| 13 | #include <bcm63xx_iudma.h> | ||
| 13 | 14 | ||
| 14 | /* default number of descriptor */ | 15 | /* default number of descriptor */ |
| 15 | #define BCMENET_DEF_RX_DESC 64 | 16 | #define BCMENET_DEF_RX_DESC 64 |
| @@ -31,35 +32,6 @@ | |||
| 31 | #define BCMENET_MAX_MTU 2046 | 32 | #define BCMENET_MAX_MTU 2046 |
| 32 | 33 | ||
| 33 | /* | 34 | /* |
| 34 | * rx/tx dma descriptor | ||
| 35 | */ | ||
| 36 | struct bcm_enet_desc { | ||
| 37 | u32 len_stat; | ||
| 38 | u32 address; | ||
| 39 | }; | ||
| 40 | |||
| 41 | #define DMADESC_LENGTH_SHIFT 16 | ||
| 42 | #define DMADESC_LENGTH_MASK (0xfff << DMADESC_LENGTH_SHIFT) | ||
| 43 | #define DMADESC_OWNER_MASK (1 << 15) | ||
| 44 | #define DMADESC_EOP_MASK (1 << 14) | ||
| 45 | #define DMADESC_SOP_MASK (1 << 13) | ||
| 46 | #define DMADESC_ESOP_MASK (DMADESC_EOP_MASK | DMADESC_SOP_MASK) | ||
| 47 | #define DMADESC_WRAP_MASK (1 << 12) | ||
| 48 | |||
| 49 | #define DMADESC_UNDER_MASK (1 << 9) | ||
| 50 | #define DMADESC_APPEND_CRC (1 << 8) | ||
| 51 | #define DMADESC_OVSIZE_MASK (1 << 4) | ||
| 52 | #define DMADESC_RXER_MASK (1 << 2) | ||
| 53 | #define DMADESC_CRC_MASK (1 << 1) | ||
| 54 | #define DMADESC_OV_MASK (1 << 0) | ||
| 55 | #define DMADESC_ERR_MASK (DMADESC_UNDER_MASK | \ | ||
| 56 | DMADESC_OVSIZE_MASK | \ | ||
| 57 | DMADESC_RXER_MASK | \ | ||
| 58 | DMADESC_CRC_MASK | \ | ||
| 59 | DMADESC_OV_MASK) | ||
| 60 | |||
| 61 | |||
| 62 | /* | ||
| 63 | * MIB Counters register definitions | 35 | * MIB Counters register definitions |
| 64 | */ | 36 | */ |
| 65 | #define ETH_MIB_TX_GD_OCTETS 0 | 37 | #define ETH_MIB_TX_GD_OCTETS 0 |