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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2010-01-18 02:20:21 -0500
committerDavid S. Miller <davem@davemloft.net>2010-01-19 04:42:00 -0500
commit68d0a036162f12d8be07c9fc140507cc1c8c6120 (patch)
treefef5c49741892eb0785dc71d7fd27bacd4ad61f8 /drivers
parenta354ae8747d0687093ce244e76b15b6174d2f098 (diff)
via82cxxx: fix UDMA settings programming
* preserve 80-wire cable detection bit * don't clear UDMA settings when programming PIO/MWDMA modes Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ide/via82cxxx.c19
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/ide/via82cxxx.c b/drivers/ide/via82cxxx.c
index 3db35b0142dc..fbecf8ea8207 100644
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -146,10 +146,25 @@ static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
146 case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break; 146 case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break;
147 case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break; 147 case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
148 case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break; 148 case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
149 default: return;
150 } 149 }
151 150
152 pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t); 151 /* Set UDMA unless device is not UDMA capable */
152 if (vdev->via_config->udma_mask) {
153 u8 udma_etc;
154
155 pci_read_config_byte(dev, VIA_UDMA_TIMING + 3 - dn, &udma_etc);
156
157 /* clear transfer mode bit */
158 udma_etc &= ~0x20;
159
160 if (timing->udma) {
161 /* preserve 80-wire cable detection bit */
162 udma_etc &= 0x10;
163 udma_etc |= t;
164 }
165
166 pci_write_config_byte(dev, VIA_UDMA_TIMING + 3 - dn, udma_etc);
167 }
153} 168}
154 169
155/** 170/**