diff options
author | David S. Miller <davem@davemloft.net> | 2012-11-17 22:00:43 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2012-11-17 22:00:43 -0500 |
commit | 67f4efdce7d85282fbd5832cddc80a07eb89b6d6 (patch) | |
tree | 9a1771ef13b27abdf8cf172e5b7556ab93e5c48c /drivers | |
parent | c53aa5058ad5ca8876a47d6639ad4d4f2c5ed584 (diff) | |
parent | f4a75d2eb7b1e2206094b901be09adb31ba63681 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Minor line offset auto-merges.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
127 files changed, 1487 insertions, 739 deletions
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c index f94d4c818fc7..0230cb6cbb3a 100644 --- a/drivers/acpi/video.c +++ b/drivers/acpi/video.c | |||
@@ -1345,12 +1345,15 @@ static int | |||
1345 | acpi_video_bus_get_devices(struct acpi_video_bus *video, | 1345 | acpi_video_bus_get_devices(struct acpi_video_bus *video, |
1346 | struct acpi_device *device) | 1346 | struct acpi_device *device) |
1347 | { | 1347 | { |
1348 | int status; | 1348 | int status = 0; |
1349 | struct acpi_device *dev; | 1349 | struct acpi_device *dev; |
1350 | 1350 | ||
1351 | status = acpi_video_device_enumerate(video); | 1351 | /* |
1352 | if (status) | 1352 | * There are systems where video module known to work fine regardless |
1353 | return status; | 1353 | * of broken _DOD and ignoring returned value here doesn't cause |
1354 | * any issues later. | ||
1355 | */ | ||
1356 | acpi_video_device_enumerate(video); | ||
1354 | 1357 | ||
1355 | list_for_each_entry(dev, &device->children, node) { | 1358 | list_for_each_entry(dev, &device->children, node) { |
1356 | 1359 | ||
diff --git a/drivers/base/platform.c b/drivers/base/platform.c index 8727e9c5eea4..72c776f2a1f5 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c | |||
@@ -83,9 +83,16 @@ EXPORT_SYMBOL_GPL(platform_get_resource); | |||
83 | */ | 83 | */ |
84 | int platform_get_irq(struct platform_device *dev, unsigned int num) | 84 | int platform_get_irq(struct platform_device *dev, unsigned int num) |
85 | { | 85 | { |
86 | #ifdef CONFIG_SPARC | ||
87 | /* sparc does not have irqs represented as IORESOURCE_IRQ resources */ | ||
88 | if (!dev || num >= dev->archdata.num_irqs) | ||
89 | return -ENXIO; | ||
90 | return dev->archdata.irqs[num]; | ||
91 | #else | ||
86 | struct resource *r = platform_get_resource(dev, IORESOURCE_IRQ, num); | 92 | struct resource *r = platform_get_resource(dev, IORESOURCE_IRQ, num); |
87 | 93 | ||
88 | return r ? r->start : -ENXIO; | 94 | return r ? r->start : -ENXIO; |
95 | #endif | ||
89 | } | 96 | } |
90 | EXPORT_SYMBOL_GPL(platform_get_irq); | 97 | EXPORT_SYMBOL_GPL(platform_get_irq); |
91 | 98 | ||
diff --git a/drivers/bluetooth/ath3k.c b/drivers/bluetooth/ath3k.c index fc2de5528dcc..b00000e8aef6 100644 --- a/drivers/bluetooth/ath3k.c +++ b/drivers/bluetooth/ath3k.c | |||
@@ -67,6 +67,7 @@ static struct usb_device_id ath3k_table[] = { | |||
67 | { USB_DEVICE(0x13d3, 0x3304) }, | 67 | { USB_DEVICE(0x13d3, 0x3304) }, |
68 | { USB_DEVICE(0x0930, 0x0215) }, | 68 | { USB_DEVICE(0x0930, 0x0215) }, |
69 | { USB_DEVICE(0x0489, 0xE03D) }, | 69 | { USB_DEVICE(0x0489, 0xE03D) }, |
70 | { USB_DEVICE(0x0489, 0xE027) }, | ||
70 | 71 | ||
71 | /* Atheros AR9285 Malbec with sflash firmware */ | 72 | /* Atheros AR9285 Malbec with sflash firmware */ |
72 | { USB_DEVICE(0x03F0, 0x311D) }, | 73 | { USB_DEVICE(0x03F0, 0x311D) }, |
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c index debda27df9b0..ee82f2fb65f0 100644 --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c | |||
@@ -124,6 +124,7 @@ static struct usb_device_id blacklist_table[] = { | |||
124 | { USB_DEVICE(0x13d3, 0x3304), .driver_info = BTUSB_IGNORE }, | 124 | { USB_DEVICE(0x13d3, 0x3304), .driver_info = BTUSB_IGNORE }, |
125 | { USB_DEVICE(0x0930, 0x0215), .driver_info = BTUSB_IGNORE }, | 125 | { USB_DEVICE(0x0930, 0x0215), .driver_info = BTUSB_IGNORE }, |
126 | { USB_DEVICE(0x0489, 0xe03d), .driver_info = BTUSB_IGNORE }, | 126 | { USB_DEVICE(0x0489, 0xe03d), .driver_info = BTUSB_IGNORE }, |
127 | { USB_DEVICE(0x0489, 0xe027), .driver_info = BTUSB_IGNORE }, | ||
127 | 128 | ||
128 | /* Atheros AR9285 Malbec with sflash firmware */ | 129 | /* Atheros AR9285 Malbec with sflash firmware */ |
129 | { USB_DEVICE(0x03f0, 0x311d), .driver_info = BTUSB_IGNORE }, | 130 | { USB_DEVICE(0x03f0, 0x311d), .driver_info = BTUSB_IGNORE }, |
diff --git a/drivers/bus/omap-ocp2scp.c b/drivers/bus/omap-ocp2scp.c index ff63560b8467..0c48b0e05ed6 100644 --- a/drivers/bus/omap-ocp2scp.c +++ b/drivers/bus/omap-ocp2scp.c | |||
@@ -22,6 +22,26 @@ | |||
22 | #include <linux/pm_runtime.h> | 22 | #include <linux/pm_runtime.h> |
23 | #include <linux/of.h> | 23 | #include <linux/of.h> |
24 | #include <linux/of_platform.h> | 24 | #include <linux/of_platform.h> |
25 | #include <linux/platform_data/omap_ocp2scp.h> | ||
26 | |||
27 | /** | ||
28 | * _count_resources - count for the number of resources | ||
29 | * @res: struct resource * | ||
30 | * | ||
31 | * Count and return the number of resources populated for the device that is | ||
32 | * connected to ocp2scp. | ||
33 | */ | ||
34 | static unsigned _count_resources(struct resource *res) | ||
35 | { | ||
36 | int cnt = 0; | ||
37 | |||
38 | while (res->start != res->end) { | ||
39 | cnt++; | ||
40 | res++; | ||
41 | } | ||
42 | |||
43 | return cnt; | ||
44 | } | ||
25 | 45 | ||
26 | static int ocp2scp_remove_devices(struct device *dev, void *c) | 46 | static int ocp2scp_remove_devices(struct device *dev, void *c) |
27 | { | 47 | { |
@@ -34,20 +54,62 @@ static int ocp2scp_remove_devices(struct device *dev, void *c) | |||
34 | 54 | ||
35 | static int __devinit omap_ocp2scp_probe(struct platform_device *pdev) | 55 | static int __devinit omap_ocp2scp_probe(struct platform_device *pdev) |
36 | { | 56 | { |
37 | int ret; | 57 | int ret; |
38 | struct device_node *np = pdev->dev.of_node; | 58 | unsigned res_cnt, i; |
59 | struct device_node *np = pdev->dev.of_node; | ||
60 | struct platform_device *pdev_child; | ||
61 | struct omap_ocp2scp_platform_data *pdata = pdev->dev.platform_data; | ||
62 | struct omap_ocp2scp_dev *dev; | ||
39 | 63 | ||
40 | if (np) { | 64 | if (np) { |
41 | ret = of_platform_populate(np, NULL, NULL, &pdev->dev); | 65 | ret = of_platform_populate(np, NULL, NULL, &pdev->dev); |
42 | if (ret) { | 66 | if (ret) { |
43 | dev_err(&pdev->dev, "failed to add resources for ocp2scp child\n"); | 67 | dev_err(&pdev->dev, |
68 | "failed to add resources for ocp2scp child\n"); | ||
44 | goto err0; | 69 | goto err0; |
45 | } | 70 | } |
71 | } else if (pdata) { | ||
72 | for (i = 0, dev = *pdata->devices; i < pdata->dev_cnt; i++, | ||
73 | dev++) { | ||
74 | res_cnt = _count_resources(dev->res); | ||
75 | |||
76 | pdev_child = platform_device_alloc(dev->drv_name, | ||
77 | PLATFORM_DEVID_AUTO); | ||
78 | if (!pdev_child) { | ||
79 | dev_err(&pdev->dev, | ||
80 | "failed to allocate mem for ocp2scp child\n"); | ||
81 | goto err0; | ||
82 | } | ||
83 | |||
84 | ret = platform_device_add_resources(pdev_child, | ||
85 | dev->res, res_cnt); | ||
86 | if (ret) { | ||
87 | dev_err(&pdev->dev, | ||
88 | "failed to add resources for ocp2scp child\n"); | ||
89 | goto err1; | ||
90 | } | ||
91 | |||
92 | pdev_child->dev.parent = &pdev->dev; | ||
93 | |||
94 | ret = platform_device_add(pdev_child); | ||
95 | if (ret) { | ||
96 | dev_err(&pdev->dev, | ||
97 | "failed to register ocp2scp child device\n"); | ||
98 | goto err1; | ||
99 | } | ||
100 | } | ||
101 | } else { | ||
102 | dev_err(&pdev->dev, "OCP2SCP initialized without plat data\n"); | ||
103 | return -EINVAL; | ||
46 | } | 104 | } |
105 | |||
47 | pm_runtime_enable(&pdev->dev); | 106 | pm_runtime_enable(&pdev->dev); |
48 | 107 | ||
49 | return 0; | 108 | return 0; |
50 | 109 | ||
110 | err1: | ||
111 | platform_device_put(pdev_child); | ||
112 | |||
51 | err0: | 113 | err0: |
52 | device_for_each_child(&pdev->dev, NULL, ocp2scp_remove_devices); | 114 | device_for_each_child(&pdev->dev, NULL, ocp2scp_remove_devices); |
53 | 115 | ||
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index ca4a25ed844c..e2c17d187d98 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c | |||
@@ -40,7 +40,7 @@ void u8500_clk_init(void) | |||
40 | CLK_IS_ROOT|CLK_IGNORE_UNUSED, | 40 | CLK_IS_ROOT|CLK_IGNORE_UNUSED, |
41 | 32768); | 41 | 32768); |
42 | clk_register_clkdev(clk, "clk32k", NULL); | 42 | clk_register_clkdev(clk, "clk32k", NULL); |
43 | clk_register_clkdev(clk, NULL, "rtc-pl031"); | 43 | clk_register_clkdev(clk, "apb_pclk", "rtc-pl031"); |
44 | 44 | ||
45 | /* PRCMU clocks */ | 45 | /* PRCMU clocks */ |
46 | fw_version = prcmu_get_fw_version(); | 46 | fw_version = prcmu_get_fw_version(); |
@@ -228,10 +228,17 @@ void u8500_clk_init(void) | |||
228 | 228 | ||
229 | clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", U8500_CLKRST1_BASE, | 229 | clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", U8500_CLKRST1_BASE, |
230 | BIT(2), 0); | 230 | BIT(2), 0); |
231 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.1"); | ||
232 | |||
231 | clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", U8500_CLKRST1_BASE, | 233 | clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", U8500_CLKRST1_BASE, |
232 | BIT(3), 0); | 234 | BIT(3), 0); |
235 | clk_register_clkdev(clk, "apb_pclk", "msp0"); | ||
236 | clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.0"); | ||
237 | |||
233 | clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", U8500_CLKRST1_BASE, | 238 | clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", U8500_CLKRST1_BASE, |
234 | BIT(4), 0); | 239 | BIT(4), 0); |
240 | clk_register_clkdev(clk, "apb_pclk", "msp1"); | ||
241 | clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.1"); | ||
235 | 242 | ||
236 | clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", U8500_CLKRST1_BASE, | 243 | clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", U8500_CLKRST1_BASE, |
237 | BIT(5), 0); | 244 | BIT(5), 0); |
@@ -239,6 +246,7 @@ void u8500_clk_init(void) | |||
239 | 246 | ||
240 | clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", U8500_CLKRST1_BASE, | 247 | clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", U8500_CLKRST1_BASE, |
241 | BIT(6), 0); | 248 | BIT(6), 0); |
249 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.2"); | ||
242 | 250 | ||
243 | clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", U8500_CLKRST1_BASE, | 251 | clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", U8500_CLKRST1_BASE, |
244 | BIT(7), 0); | 252 | BIT(7), 0); |
@@ -246,6 +254,7 @@ void u8500_clk_init(void) | |||
246 | 254 | ||
247 | clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", U8500_CLKRST1_BASE, | 255 | clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", U8500_CLKRST1_BASE, |
248 | BIT(8), 0); | 256 | BIT(8), 0); |
257 | clk_register_clkdev(clk, "apb_pclk", "slimbus0"); | ||
249 | 258 | ||
250 | clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", U8500_CLKRST1_BASE, | 259 | clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", U8500_CLKRST1_BASE, |
251 | BIT(9), 0); | 260 | BIT(9), 0); |
@@ -255,11 +264,16 @@ void u8500_clk_init(void) | |||
255 | 264 | ||
256 | clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", U8500_CLKRST1_BASE, | 265 | clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", U8500_CLKRST1_BASE, |
257 | BIT(10), 0); | 266 | BIT(10), 0); |
267 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.4"); | ||
268 | |||
258 | clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", U8500_CLKRST1_BASE, | 269 | clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", U8500_CLKRST1_BASE, |
259 | BIT(11), 0); | 270 | BIT(11), 0); |
271 | clk_register_clkdev(clk, "apb_pclk", "msp3"); | ||
272 | clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.3"); | ||
260 | 273 | ||
261 | clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", U8500_CLKRST2_BASE, | 274 | clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", U8500_CLKRST2_BASE, |
262 | BIT(0), 0); | 275 | BIT(0), 0); |
276 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.3"); | ||
263 | 277 | ||
264 | clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", U8500_CLKRST2_BASE, | 278 | clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", U8500_CLKRST2_BASE, |
265 | BIT(1), 0); | 279 | BIT(1), 0); |
@@ -279,12 +293,13 @@ void u8500_clk_init(void) | |||
279 | 293 | ||
280 | clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", U8500_CLKRST2_BASE, | 294 | clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", U8500_CLKRST2_BASE, |
281 | BIT(5), 0); | 295 | BIT(5), 0); |
296 | clk_register_clkdev(clk, "apb_pclk", "msp2"); | ||
297 | clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.2"); | ||
282 | 298 | ||
283 | clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", U8500_CLKRST2_BASE, | 299 | clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", U8500_CLKRST2_BASE, |
284 | BIT(6), 0); | 300 | BIT(6), 0); |
285 | clk_register_clkdev(clk, "apb_pclk", "sdi1"); | 301 | clk_register_clkdev(clk, "apb_pclk", "sdi1"); |
286 | 302 | ||
287 | |||
288 | clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", U8500_CLKRST2_BASE, | 303 | clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", U8500_CLKRST2_BASE, |
289 | BIT(7), 0); | 304 | BIT(7), 0); |
290 | clk_register_clkdev(clk, "apb_pclk", "sdi3"); | 305 | clk_register_clkdev(clk, "apb_pclk", "sdi3"); |
@@ -316,10 +331,15 @@ void u8500_clk_init(void) | |||
316 | 331 | ||
317 | clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE, | 332 | clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE, |
318 | BIT(1), 0); | 333 | BIT(1), 0); |
334 | clk_register_clkdev(clk, "apb_pclk", "ssp0"); | ||
335 | |||
319 | clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", U8500_CLKRST3_BASE, | 336 | clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", U8500_CLKRST3_BASE, |
320 | BIT(2), 0); | 337 | BIT(2), 0); |
338 | clk_register_clkdev(clk, "apb_pclk", "ssp1"); | ||
339 | |||
321 | clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", U8500_CLKRST3_BASE, | 340 | clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", U8500_CLKRST3_BASE, |
322 | BIT(3), 0); | 341 | BIT(3), 0); |
342 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.0"); | ||
323 | 343 | ||
324 | clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", U8500_CLKRST3_BASE, | 344 | clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", U8500_CLKRST3_BASE, |
325 | BIT(4), 0); | 345 | BIT(4), 0); |
@@ -401,10 +421,17 @@ void u8500_clk_init(void) | |||
401 | 421 | ||
402 | clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk", | 422 | clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk", |
403 | U8500_CLKRST1_BASE, BIT(2), CLK_SET_RATE_GATE); | 423 | U8500_CLKRST1_BASE, BIT(2), CLK_SET_RATE_GATE); |
424 | clk_register_clkdev(clk, NULL, "nmk-i2c.1"); | ||
425 | |||
404 | clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk", | 426 | clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk", |
405 | U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE); | 427 | U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE); |
428 | clk_register_clkdev(clk, NULL, "msp0"); | ||
429 | clk_register_clkdev(clk, NULL, "ux500-msp-i2s.0"); | ||
430 | |||
406 | clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk", | 431 | clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk", |
407 | U8500_CLKRST1_BASE, BIT(4), CLK_SET_RATE_GATE); | 432 | U8500_CLKRST1_BASE, BIT(4), CLK_SET_RATE_GATE); |
433 | clk_register_clkdev(clk, NULL, "msp1"); | ||
434 | clk_register_clkdev(clk, NULL, "ux500-msp-i2s.1"); | ||
408 | 435 | ||
409 | clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk", | 436 | clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk", |
410 | U8500_CLKRST1_BASE, BIT(5), CLK_SET_RATE_GATE); | 437 | U8500_CLKRST1_BASE, BIT(5), CLK_SET_RATE_GATE); |
@@ -412,17 +439,25 @@ void u8500_clk_init(void) | |||
412 | 439 | ||
413 | clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk", | 440 | clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk", |
414 | U8500_CLKRST1_BASE, BIT(6), CLK_SET_RATE_GATE); | 441 | U8500_CLKRST1_BASE, BIT(6), CLK_SET_RATE_GATE); |
442 | clk_register_clkdev(clk, NULL, "nmk-i2c.2"); | ||
443 | |||
415 | clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk", | 444 | clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk", |
416 | U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE); | 445 | U8500_CLKRST1_BASE, BIT(8), CLK_SET_RATE_GATE); |
417 | /* FIXME: Redefinition of BIT(3). */ | 446 | clk_register_clkdev(clk, NULL, "slimbus0"); |
447 | |||
418 | clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk", | 448 | clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk", |
419 | U8500_CLKRST1_BASE, BIT(9), CLK_SET_RATE_GATE); | 449 | U8500_CLKRST1_BASE, BIT(9), CLK_SET_RATE_GATE); |
450 | clk_register_clkdev(clk, NULL, "nmk-i2c.4"); | ||
451 | |||
420 | clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk", | 452 | clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk", |
421 | U8500_CLKRST1_BASE, BIT(10), CLK_SET_RATE_GATE); | 453 | U8500_CLKRST1_BASE, BIT(10), CLK_SET_RATE_GATE); |
454 | clk_register_clkdev(clk, NULL, "msp3"); | ||
455 | clk_register_clkdev(clk, NULL, "ux500-msp-i2s.3"); | ||
422 | 456 | ||
423 | /* Periph2 */ | 457 | /* Periph2 */ |
424 | clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk", | 458 | clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk", |
425 | U8500_CLKRST2_BASE, BIT(0), CLK_SET_RATE_GATE); | 459 | U8500_CLKRST2_BASE, BIT(0), CLK_SET_RATE_GATE); |
460 | clk_register_clkdev(clk, NULL, "nmk-i2c.3"); | ||
426 | 461 | ||
427 | clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk", | 462 | clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk", |
428 | U8500_CLKRST2_BASE, BIT(2), CLK_SET_RATE_GATE); | 463 | U8500_CLKRST2_BASE, BIT(2), CLK_SET_RATE_GATE); |
@@ -430,6 +465,8 @@ void u8500_clk_init(void) | |||
430 | 465 | ||
431 | clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk", | 466 | clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk", |
432 | U8500_CLKRST2_BASE, BIT(3), CLK_SET_RATE_GATE); | 467 | U8500_CLKRST2_BASE, BIT(3), CLK_SET_RATE_GATE); |
468 | clk_register_clkdev(clk, NULL, "msp2"); | ||
469 | clk_register_clkdev(clk, NULL, "ux500-msp-i2s.2"); | ||
433 | 470 | ||
434 | clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk", | 471 | clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk", |
435 | U8500_CLKRST2_BASE, BIT(4), CLK_SET_RATE_GATE); | 472 | U8500_CLKRST2_BASE, BIT(4), CLK_SET_RATE_GATE); |
@@ -450,10 +487,15 @@ void u8500_clk_init(void) | |||
450 | /* Periph3 */ | 487 | /* Periph3 */ |
451 | clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk", | 488 | clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk", |
452 | U8500_CLKRST3_BASE, BIT(1), CLK_SET_RATE_GATE); | 489 | U8500_CLKRST3_BASE, BIT(1), CLK_SET_RATE_GATE); |
490 | clk_register_clkdev(clk, NULL, "ssp0"); | ||
491 | |||
453 | clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk", | 492 | clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk", |
454 | U8500_CLKRST3_BASE, BIT(2), CLK_SET_RATE_GATE); | 493 | U8500_CLKRST3_BASE, BIT(2), CLK_SET_RATE_GATE); |
494 | clk_register_clkdev(clk, NULL, "ssp1"); | ||
495 | |||
455 | clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk", | 496 | clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk", |
456 | U8500_CLKRST3_BASE, BIT(3), CLK_SET_RATE_GATE); | 497 | U8500_CLKRST3_BASE, BIT(3), CLK_SET_RATE_GATE); |
498 | clk_register_clkdev(clk, NULL, "nmk-i2c.0"); | ||
457 | 499 | ||
458 | clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk", | 500 | clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk", |
459 | U8500_CLKRST3_BASE, BIT(4), CLK_SET_RATE_GATE); | 501 | U8500_CLKRST3_BASE, BIT(4), CLK_SET_RATE_GATE); |
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index d055cee36942..f11d8e3b4041 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -47,7 +47,7 @@ if GPIOLIB | |||
47 | 47 | ||
48 | config OF_GPIO | 48 | config OF_GPIO |
49 | def_bool y | 49 | def_bool y |
50 | depends on OF && !SPARC | 50 | depends on OF |
51 | 51 | ||
52 | config DEBUG_GPIO | 52 | config DEBUG_GPIO |
53 | bool "Debug GPIO calls" | 53 | bool "Debug GPIO calls" |
diff --git a/drivers/gpu/drm/drm_fops.c b/drivers/gpu/drm/drm_fops.c index 7ef1b673e1be..133b4132983e 100644 --- a/drivers/gpu/drm/drm_fops.c +++ b/drivers/gpu/drm/drm_fops.c | |||
@@ -121,6 +121,8 @@ int drm_open(struct inode *inode, struct file *filp) | |||
121 | int minor_id = iminor(inode); | 121 | int minor_id = iminor(inode); |
122 | struct drm_minor *minor; | 122 | struct drm_minor *minor; |
123 | int retcode = 0; | 123 | int retcode = 0; |
124 | int need_setup = 0; | ||
125 | struct address_space *old_mapping; | ||
124 | 126 | ||
125 | minor = idr_find(&drm_minors_idr, minor_id); | 127 | minor = idr_find(&drm_minors_idr, minor_id); |
126 | if (!minor) | 128 | if (!minor) |
@@ -132,23 +134,37 @@ int drm_open(struct inode *inode, struct file *filp) | |||
132 | if (drm_device_is_unplugged(dev)) | 134 | if (drm_device_is_unplugged(dev)) |
133 | return -ENODEV; | 135 | return -ENODEV; |
134 | 136 | ||
137 | if (!dev->open_count++) | ||
138 | need_setup = 1; | ||
139 | mutex_lock(&dev->struct_mutex); | ||
140 | old_mapping = dev->dev_mapping; | ||
141 | if (old_mapping == NULL) | ||
142 | dev->dev_mapping = &inode->i_data; | ||
143 | /* ihold ensures nobody can remove inode with our i_data */ | ||
144 | ihold(container_of(dev->dev_mapping, struct inode, i_data)); | ||
145 | inode->i_mapping = dev->dev_mapping; | ||
146 | filp->f_mapping = dev->dev_mapping; | ||
147 | mutex_unlock(&dev->struct_mutex); | ||
148 | |||
135 | retcode = drm_open_helper(inode, filp, dev); | 149 | retcode = drm_open_helper(inode, filp, dev); |
136 | if (!retcode) { | 150 | if (retcode) |
137 | atomic_inc(&dev->counts[_DRM_STAT_OPENS]); | 151 | goto err_undo; |
138 | if (!dev->open_count++) | 152 | atomic_inc(&dev->counts[_DRM_STAT_OPENS]); |
139 | retcode = drm_setup(dev); | 153 | if (need_setup) { |
140 | } | 154 | retcode = drm_setup(dev); |
141 | if (!retcode) { | 155 | if (retcode) |
142 | mutex_lock(&dev->struct_mutex); | 156 | goto err_undo; |
143 | if (dev->dev_mapping == NULL) | ||
144 | dev->dev_mapping = &inode->i_data; | ||
145 | /* ihold ensures nobody can remove inode with our i_data */ | ||
146 | ihold(container_of(dev->dev_mapping, struct inode, i_data)); | ||
147 | inode->i_mapping = dev->dev_mapping; | ||
148 | filp->f_mapping = dev->dev_mapping; | ||
149 | mutex_unlock(&dev->struct_mutex); | ||
150 | } | 157 | } |
158 | return 0; | ||
151 | 159 | ||
160 | err_undo: | ||
161 | mutex_lock(&dev->struct_mutex); | ||
162 | filp->f_mapping = old_mapping; | ||
163 | inode->i_mapping = old_mapping; | ||
164 | iput(container_of(dev->dev_mapping, struct inode, i_data)); | ||
165 | dev->dev_mapping = old_mapping; | ||
166 | mutex_unlock(&dev->struct_mutex); | ||
167 | dev->open_count--; | ||
152 | return retcode; | 168 | return retcode; |
153 | } | 169 | } |
154 | EXPORT_SYMBOL(drm_open); | 170 | EXPORT_SYMBOL(drm_open); |
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig index 59a26e577b57..fc345d4ebb03 100644 --- a/drivers/gpu/drm/exynos/Kconfig +++ b/drivers/gpu/drm/exynos/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config DRM_EXYNOS | 1 | config DRM_EXYNOS |
2 | tristate "DRM Support for Samsung SoC EXYNOS Series" | 2 | tristate "DRM Support for Samsung SoC EXYNOS Series" |
3 | depends on DRM && PLAT_SAMSUNG | 3 | depends on DRM && (PLAT_SAMSUNG || ARCH_MULTIPLATFORM) |
4 | select DRM_KMS_HELPER | 4 | select DRM_KMS_HELPER |
5 | select FB_CFB_FILLRECT | 5 | select FB_CFB_FILLRECT |
6 | select FB_CFB_COPYAREA | 6 | select FB_CFB_COPYAREA |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.c b/drivers/gpu/drm/exynos/exynos_drm_connector.c index 18c271862ca8..0f68a2872673 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_connector.c +++ b/drivers/gpu/drm/exynos/exynos_drm_connector.c | |||
@@ -374,6 +374,7 @@ struct drm_connector *exynos_drm_connector_create(struct drm_device *dev, | |||
374 | exynos_connector->encoder_id = encoder->base.id; | 374 | exynos_connector->encoder_id = encoder->base.id; |
375 | exynos_connector->manager = manager; | 375 | exynos_connector->manager = manager; |
376 | exynos_connector->dpms = DRM_MODE_DPMS_OFF; | 376 | exynos_connector->dpms = DRM_MODE_DPMS_OFF; |
377 | connector->dpms = DRM_MODE_DPMS_OFF; | ||
377 | connector->encoder = encoder; | 378 | connector->encoder = encoder; |
378 | 379 | ||
379 | err = drm_mode_connector_attach_encoder(connector, encoder); | 380 | err = drm_mode_connector_attach_encoder(connector, encoder); |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.c b/drivers/gpu/drm/exynos/exynos_drm_encoder.c index e51503fbaf2b..241ad1eeec64 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_encoder.c +++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.c | |||
@@ -43,12 +43,14 @@ | |||
43 | * @manager: specific encoder has its own manager to control a hardware | 43 | * @manager: specific encoder has its own manager to control a hardware |
44 | * appropriately and we can access a hardware drawing on this manager. | 44 | * appropriately and we can access a hardware drawing on this manager. |
45 | * @dpms: store the encoder dpms value. | 45 | * @dpms: store the encoder dpms value. |
46 | * @updated: indicate whether overlay data updating is needed or not. | ||
46 | */ | 47 | */ |
47 | struct exynos_drm_encoder { | 48 | struct exynos_drm_encoder { |
48 | struct drm_crtc *old_crtc; | 49 | struct drm_crtc *old_crtc; |
49 | struct drm_encoder drm_encoder; | 50 | struct drm_encoder drm_encoder; |
50 | struct exynos_drm_manager *manager; | 51 | struct exynos_drm_manager *manager; |
51 | int dpms; | 52 | int dpms; |
53 | bool updated; | ||
52 | }; | 54 | }; |
53 | 55 | ||
54 | static void exynos_drm_connector_power(struct drm_encoder *encoder, int mode) | 56 | static void exynos_drm_connector_power(struct drm_encoder *encoder, int mode) |
@@ -85,7 +87,9 @@ static void exynos_drm_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
85 | switch (mode) { | 87 | switch (mode) { |
86 | case DRM_MODE_DPMS_ON: | 88 | case DRM_MODE_DPMS_ON: |
87 | if (manager_ops && manager_ops->apply) | 89 | if (manager_ops && manager_ops->apply) |
88 | manager_ops->apply(manager->dev); | 90 | if (!exynos_encoder->updated) |
91 | manager_ops->apply(manager->dev); | ||
92 | |||
89 | exynos_drm_connector_power(encoder, mode); | 93 | exynos_drm_connector_power(encoder, mode); |
90 | exynos_encoder->dpms = mode; | 94 | exynos_encoder->dpms = mode; |
91 | break; | 95 | break; |
@@ -94,6 +98,7 @@ static void exynos_drm_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
94 | case DRM_MODE_DPMS_OFF: | 98 | case DRM_MODE_DPMS_OFF: |
95 | exynos_drm_connector_power(encoder, mode); | 99 | exynos_drm_connector_power(encoder, mode); |
96 | exynos_encoder->dpms = mode; | 100 | exynos_encoder->dpms = mode; |
101 | exynos_encoder->updated = false; | ||
97 | break; | 102 | break; |
98 | default: | 103 | default: |
99 | DRM_ERROR("unspecified mode %d\n", mode); | 104 | DRM_ERROR("unspecified mode %d\n", mode); |
@@ -205,13 +210,22 @@ static void exynos_drm_encoder_prepare(struct drm_encoder *encoder) | |||
205 | 210 | ||
206 | static void exynos_drm_encoder_commit(struct drm_encoder *encoder) | 211 | static void exynos_drm_encoder_commit(struct drm_encoder *encoder) |
207 | { | 212 | { |
208 | struct exynos_drm_manager *manager = exynos_drm_get_manager(encoder); | 213 | struct exynos_drm_encoder *exynos_encoder = to_exynos_encoder(encoder); |
214 | struct exynos_drm_manager *manager = exynos_encoder->manager; | ||
209 | struct exynos_drm_manager_ops *manager_ops = manager->ops; | 215 | struct exynos_drm_manager_ops *manager_ops = manager->ops; |
210 | 216 | ||
211 | DRM_DEBUG_KMS("%s\n", __FILE__); | 217 | DRM_DEBUG_KMS("%s\n", __FILE__); |
212 | 218 | ||
213 | if (manager_ops && manager_ops->commit) | 219 | if (manager_ops && manager_ops->commit) |
214 | manager_ops->commit(manager->dev); | 220 | manager_ops->commit(manager->dev); |
221 | |||
222 | /* | ||
223 | * this will avoid one issue that overlay data is updated to | ||
224 | * real hardware two times. | ||
225 | * And this variable will be used to check if the data was | ||
226 | * already updated or not by exynos_drm_encoder_dpms function. | ||
227 | */ | ||
228 | exynos_encoder->updated = true; | ||
215 | } | 229 | } |
216 | 230 | ||
217 | static void exynos_drm_encoder_disable(struct drm_encoder *encoder) | 231 | static void exynos_drm_encoder_disable(struct drm_encoder *encoder) |
@@ -401,19 +415,6 @@ void exynos_drm_encoder_crtc_dpms(struct drm_encoder *encoder, void *data) | |||
401 | manager_ops->dpms(manager->dev, mode); | 415 | manager_ops->dpms(manager->dev, mode); |
402 | 416 | ||
403 | /* | 417 | /* |
404 | * set current mode to new one so that data aren't updated into | ||
405 | * registers by drm_helper_connector_dpms two times. | ||
406 | * | ||
407 | * in case that drm_crtc_helper_set_mode() is called, | ||
408 | * overlay_ops->commit() and manager_ops->commit() callbacks | ||
409 | * can be called two times, first at drm_crtc_helper_set_mode() | ||
410 | * and second at drm_helper_connector_dpms(). | ||
411 | * so with this setting, when drm_helper_connector_dpms() is called | ||
412 | * encoder->funcs->dpms() will be ignored. | ||
413 | */ | ||
414 | exynos_encoder->dpms = mode; | ||
415 | |||
416 | /* | ||
417 | * if this condition is ok then it means that the crtc is already | 418 | * if this condition is ok then it means that the crtc is already |
418 | * detached from encoder and last function for detaching is properly | 419 | * detached from encoder and last function for detaching is properly |
419 | * done, so clear pipe from manager to prevent repeated call. | 420 | * done, so clear pipe from manager to prevent repeated call. |
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 614b2e9ac462..e7fbb823fd8e 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c | |||
@@ -1142,7 +1142,7 @@ static int __devinit mixer_probe(struct platform_device *pdev) | |||
1142 | const struct of_device_id *match; | 1142 | const struct of_device_id *match; |
1143 | match = of_match_node(of_match_ptr(mixer_match_types), | 1143 | match = of_match_node(of_match_ptr(mixer_match_types), |
1144 | pdev->dev.of_node); | 1144 | pdev->dev.of_node); |
1145 | drv = match->data; | 1145 | drv = (struct mixer_drv_data *)match->data; |
1146 | } else { | 1146 | } else { |
1147 | drv = (struct mixer_drv_data *) | 1147 | drv = (struct mixer_drv_data *) |
1148 | platform_get_device_id(pdev)->driver_data; | 1148 | platform_get_device_id(pdev)->driver_data; |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index c9bfd83dde64..61ae104dca8c 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1505,7 +1505,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) | |||
1505 | goto put_gmch; | 1505 | goto put_gmch; |
1506 | } | 1506 | } |
1507 | 1507 | ||
1508 | i915_kick_out_firmware_fb(dev_priv); | 1508 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
1509 | i915_kick_out_firmware_fb(dev_priv); | ||
1509 | 1510 | ||
1510 | pci_set_master(dev->pdev); | 1511 | pci_set_master(dev->pdev); |
1511 | 1512 | ||
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index f78061af7045..6345878ae1e7 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c | |||
@@ -143,7 +143,7 @@ static void intel_crt_dpms(struct drm_connector *connector, int mode) | |||
143 | int old_dpms; | 143 | int old_dpms; |
144 | 144 | ||
145 | /* PCH platforms and VLV only support on/off. */ | 145 | /* PCH platforms and VLV only support on/off. */ |
146 | if (INTEL_INFO(dev)->gen < 5 && mode != DRM_MODE_DPMS_ON) | 146 | if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON) |
147 | mode = DRM_MODE_DPMS_OFF; | 147 | mode = DRM_MODE_DPMS_OFF; |
148 | 148 | ||
149 | if (mode == connector->dpms) | 149 | if (mode == connector->dpms) |
@@ -729,7 +729,7 @@ void intel_crt_init(struct drm_device *dev) | |||
729 | 729 | ||
730 | crt->base.type = INTEL_OUTPUT_ANALOG; | 730 | crt->base.type = INTEL_OUTPUT_ANALOG; |
731 | crt->base.cloneable = true; | 731 | crt->base.cloneable = true; |
732 | if (IS_HASWELL(dev)) | 732 | if (IS_HASWELL(dev) || IS_I830(dev)) |
733 | crt->base.crtc_mask = (1 << 0); | 733 | crt->base.crtc_mask = (1 << 0); |
734 | else | 734 | else |
735 | crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); | 735 | crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 461a637f1ef7..4154bcd7a070 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -3841,6 +3841,17 @@ static bool intel_choose_pipe_bpp_dither(struct drm_crtc *crtc, | |||
3841 | } | 3841 | } |
3842 | } | 3842 | } |
3843 | 3843 | ||
3844 | if (intel_encoder->type == INTEL_OUTPUT_EDP) { | ||
3845 | /* Use VBT settings if we have an eDP panel */ | ||
3846 | unsigned int edp_bpc = dev_priv->edp.bpp / 3; | ||
3847 | |||
3848 | if (edp_bpc < display_bpc) { | ||
3849 | DRM_DEBUG_KMS("clamping display bpc (was %d) to eDP (%d)\n", display_bpc, edp_bpc); | ||
3850 | display_bpc = edp_bpc; | ||
3851 | } | ||
3852 | continue; | ||
3853 | } | ||
3854 | |||
3844 | /* | 3855 | /* |
3845 | * HDMI is either 12 or 8, so if the display lets 10bpc sneak | 3856 | * HDMI is either 12 or 8, so if the display lets 10bpc sneak |
3846 | * through, clamp it down. (Note: >12bpc will be caught below.) | 3857 | * through, clamp it down. (Note: >12bpc will be caught below.) |
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 495625914e4a..d7bc817f51a0 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c | |||
@@ -341,9 +341,17 @@ static int intel_overlay_off(struct intel_overlay *overlay) | |||
341 | intel_ring_emit(ring, flip_addr); | 341 | intel_ring_emit(ring, flip_addr); |
342 | intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); | 342 | intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); |
343 | /* turn overlay off */ | 343 | /* turn overlay off */ |
344 | intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_OFF); | 344 | if (IS_I830(dev)) { |
345 | intel_ring_emit(ring, flip_addr); | 345 | /* Workaround: Don't disable the overlay fully, since otherwise |
346 | intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); | 346 | * it dies on the next OVERLAY_ON cmd. */ |
347 | intel_ring_emit(ring, MI_NOOP); | ||
348 | intel_ring_emit(ring, MI_NOOP); | ||
349 | intel_ring_emit(ring, MI_NOOP); | ||
350 | } else { | ||
351 | intel_ring_emit(ring, MI_OVERLAY_FLIP | MI_OVERLAY_OFF); | ||
352 | intel_ring_emit(ring, flip_addr); | ||
353 | intel_ring_emit(ring, MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); | ||
354 | } | ||
347 | intel_ring_advance(ring); | 355 | intel_ring_advance(ring); |
348 | 356 | ||
349 | return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail); | 357 | return intel_overlay_do_wait_request(overlay, intel_overlay_off_tail); |
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c index e019b2369861..e2aacd329545 100644 --- a/drivers/gpu/drm/i915/intel_panel.c +++ b/drivers/gpu/drm/i915/intel_panel.c | |||
@@ -435,7 +435,7 @@ int intel_panel_setup_backlight(struct drm_device *dev) | |||
435 | props.type = BACKLIGHT_RAW; | 435 | props.type = BACKLIGHT_RAW; |
436 | props.max_brightness = _intel_panel_get_max_backlight(dev); | 436 | props.max_brightness = _intel_panel_get_max_backlight(dev); |
437 | if (props.max_brightness == 0) { | 437 | if (props.max_brightness == 0) { |
438 | DRM_ERROR("Failed to get maximum backlight value\n"); | 438 | DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n"); |
439 | return -ENODEV; | 439 | return -ENODEV; |
440 | } | 440 | } |
441 | dev_priv->backlight = | 441 | dev_priv->backlight = |
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index c01d97db0061..c600fb06e25e 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -894,6 +894,45 @@ static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo) | |||
894 | } | 894 | } |
895 | #endif | 895 | #endif |
896 | 896 | ||
897 | static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo, | ||
898 | unsigned if_index, uint8_t tx_rate, | ||
899 | uint8_t *data, unsigned length) | ||
900 | { | ||
901 | uint8_t set_buf_index[2] = { if_index, 0 }; | ||
902 | uint8_t hbuf_size, tmp[8]; | ||
903 | int i; | ||
904 | |||
905 | if (!intel_sdvo_set_value(intel_sdvo, | ||
906 | SDVO_CMD_SET_HBUF_INDEX, | ||
907 | set_buf_index, 2)) | ||
908 | return false; | ||
909 | |||
910 | if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO, | ||
911 | &hbuf_size, 1)) | ||
912 | return false; | ||
913 | |||
914 | /* Buffer size is 0 based, hooray! */ | ||
915 | hbuf_size++; | ||
916 | |||
917 | DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n", | ||
918 | if_index, length, hbuf_size); | ||
919 | |||
920 | for (i = 0; i < hbuf_size; i += 8) { | ||
921 | memset(tmp, 0, 8); | ||
922 | if (i < length) | ||
923 | memcpy(tmp, data + i, min_t(unsigned, 8, length - i)); | ||
924 | |||
925 | if (!intel_sdvo_set_value(intel_sdvo, | ||
926 | SDVO_CMD_SET_HBUF_DATA, | ||
927 | tmp, 8)) | ||
928 | return false; | ||
929 | } | ||
930 | |||
931 | return intel_sdvo_set_value(intel_sdvo, | ||
932 | SDVO_CMD_SET_HBUF_TXRATE, | ||
933 | &tx_rate, 1); | ||
934 | } | ||
935 | |||
897 | static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) | 936 | static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) |
898 | { | 937 | { |
899 | struct dip_infoframe avi_if = { | 938 | struct dip_infoframe avi_if = { |
@@ -901,11 +940,7 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) | |||
901 | .ver = DIP_VERSION_AVI, | 940 | .ver = DIP_VERSION_AVI, |
902 | .len = DIP_LEN_AVI, | 941 | .len = DIP_LEN_AVI, |
903 | }; | 942 | }; |
904 | uint8_t tx_rate = SDVO_HBUF_TX_VSYNC; | ||
905 | uint8_t set_buf_index[2] = { 1, 0 }; | ||
906 | uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; | 943 | uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)]; |
907 | uint64_t *data = (uint64_t *)sdvo_data; | ||
908 | unsigned i; | ||
909 | 944 | ||
910 | intel_dip_infoframe_csum(&avi_if); | 945 | intel_dip_infoframe_csum(&avi_if); |
911 | 946 | ||
@@ -915,22 +950,9 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) | |||
915 | sdvo_data[3] = avi_if.checksum; | 950 | sdvo_data[3] = avi_if.checksum; |
916 | memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); | 951 | memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi)); |
917 | 952 | ||
918 | if (!intel_sdvo_set_value(intel_sdvo, | 953 | return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF, |
919 | SDVO_CMD_SET_HBUF_INDEX, | 954 | SDVO_HBUF_TX_VSYNC, |
920 | set_buf_index, 2)) | 955 | sdvo_data, sizeof(sdvo_data)); |
921 | return false; | ||
922 | |||
923 | for (i = 0; i < sizeof(sdvo_data); i += 8) { | ||
924 | if (!intel_sdvo_set_value(intel_sdvo, | ||
925 | SDVO_CMD_SET_HBUF_DATA, | ||
926 | data, 8)) | ||
927 | return false; | ||
928 | data++; | ||
929 | } | ||
930 | |||
931 | return intel_sdvo_set_value(intel_sdvo, | ||
932 | SDVO_CMD_SET_HBUF_TXRATE, | ||
933 | &tx_rate, 1); | ||
934 | } | 956 | } |
935 | 957 | ||
936 | static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) | 958 | static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo) |
@@ -2360,6 +2382,18 @@ intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags) | |||
2360 | return true; | 2382 | return true; |
2361 | } | 2383 | } |
2362 | 2384 | ||
2385 | static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo) | ||
2386 | { | ||
2387 | struct drm_device *dev = intel_sdvo->base.base.dev; | ||
2388 | struct drm_connector *connector, *tmp; | ||
2389 | |||
2390 | list_for_each_entry_safe(connector, tmp, | ||
2391 | &dev->mode_config.connector_list, head) { | ||
2392 | if (intel_attached_encoder(connector) == &intel_sdvo->base) | ||
2393 | intel_sdvo_destroy(connector); | ||
2394 | } | ||
2395 | } | ||
2396 | |||
2363 | static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, | 2397 | static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo, |
2364 | struct intel_sdvo_connector *intel_sdvo_connector, | 2398 | struct intel_sdvo_connector *intel_sdvo_connector, |
2365 | int type) | 2399 | int type) |
@@ -2683,7 +2717,8 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) | |||
2683 | intel_sdvo->caps.output_flags) != true) { | 2717 | intel_sdvo->caps.output_flags) != true) { |
2684 | DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", | 2718 | DRM_DEBUG_KMS("SDVO output failed to setup on %s\n", |
2685 | SDVO_NAME(intel_sdvo)); | 2719 | SDVO_NAME(intel_sdvo)); |
2686 | goto err; | 2720 | /* Output_setup can leave behind connectors! */ |
2721 | goto err_output; | ||
2687 | } | 2722 | } |
2688 | 2723 | ||
2689 | /* Only enable the hotplug irq if we need it, to work around noisy | 2724 | /* Only enable the hotplug irq if we need it, to work around noisy |
@@ -2696,12 +2731,12 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) | |||
2696 | 2731 | ||
2697 | /* Set the input timing to the screen. Assume always input 0. */ | 2732 | /* Set the input timing to the screen. Assume always input 0. */ |
2698 | if (!intel_sdvo_set_target_input(intel_sdvo)) | 2733 | if (!intel_sdvo_set_target_input(intel_sdvo)) |
2699 | goto err; | 2734 | goto err_output; |
2700 | 2735 | ||
2701 | if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, | 2736 | if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo, |
2702 | &intel_sdvo->pixel_clock_min, | 2737 | &intel_sdvo->pixel_clock_min, |
2703 | &intel_sdvo->pixel_clock_max)) | 2738 | &intel_sdvo->pixel_clock_max)) |
2704 | goto err; | 2739 | goto err_output; |
2705 | 2740 | ||
2706 | DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " | 2741 | DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, " |
2707 | "clock range %dMHz - %dMHz, " | 2742 | "clock range %dMHz - %dMHz, " |
@@ -2721,6 +2756,9 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) | |||
2721 | (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); | 2756 | (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N'); |
2722 | return true; | 2757 | return true; |
2723 | 2758 | ||
2759 | err_output: | ||
2760 | intel_sdvo_output_cleanup(intel_sdvo); | ||
2761 | |||
2724 | err: | 2762 | err: |
2725 | drm_encoder_cleanup(&intel_encoder->base); | 2763 | drm_encoder_cleanup(&intel_encoder->base); |
2726 | i2c_del_adapter(&intel_sdvo->ddc); | 2764 | i2c_del_adapter(&intel_sdvo->ddc); |
diff --git a/drivers/gpu/drm/i915/intel_sdvo_regs.h b/drivers/gpu/drm/i915/intel_sdvo_regs.h index 9d030142ee43..770bdd6ecd9f 100644 --- a/drivers/gpu/drm/i915/intel_sdvo_regs.h +++ b/drivers/gpu/drm/i915/intel_sdvo_regs.h | |||
@@ -708,6 +708,8 @@ struct intel_sdvo_enhancements_arg { | |||
708 | #define SDVO_CMD_SET_AUDIO_STAT 0x91 | 708 | #define SDVO_CMD_SET_AUDIO_STAT 0x91 |
709 | #define SDVO_CMD_GET_AUDIO_STAT 0x92 | 709 | #define SDVO_CMD_GET_AUDIO_STAT 0x92 |
710 | #define SDVO_CMD_SET_HBUF_INDEX 0x93 | 710 | #define SDVO_CMD_SET_HBUF_INDEX 0x93 |
711 | #define SDVO_HBUF_INDEX_ELD 0 | ||
712 | #define SDVO_HBUF_INDEX_AVI_IF 1 | ||
711 | #define SDVO_CMD_GET_HBUF_INDEX 0x94 | 713 | #define SDVO_CMD_GET_HBUF_INDEX 0x94 |
712 | #define SDVO_CMD_GET_HBUF_INFO 0x95 | 714 | #define SDVO_CMD_GET_HBUF_INFO 0x95 |
713 | #define SDVO_CMD_SET_HBUF_AV_SPLIT 0x96 | 715 | #define SDVO_CMD_SET_HBUF_AV_SPLIT 0x96 |
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c index 16a9afb1060b..05a909a17cee 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c | |||
@@ -22,6 +22,8 @@ | |||
22 | * Authors: Ben Skeggs | 22 | * Authors: Ben Skeggs |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include <subdev/bar.h> | ||
26 | |||
25 | #include <engine/software.h> | 27 | #include <engine/software.h> |
26 | #include <engine/disp.h> | 28 | #include <engine/disp.h> |
27 | 29 | ||
@@ -37,6 +39,7 @@ nv50_disp_sclass[] = { | |||
37 | static void | 39 | static void |
38 | nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc) | 40 | nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc) |
39 | { | 41 | { |
42 | struct nouveau_bar *bar = nouveau_bar(priv); | ||
40 | struct nouveau_disp *disp = &priv->base; | 43 | struct nouveau_disp *disp = &priv->base; |
41 | struct nouveau_software_chan *chan, *temp; | 44 | struct nouveau_software_chan *chan, *temp; |
42 | unsigned long flags; | 45 | unsigned long flags; |
@@ -46,18 +49,19 @@ nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc) | |||
46 | if (chan->vblank.crtc != crtc) | 49 | if (chan->vblank.crtc != crtc) |
47 | continue; | 50 | continue; |
48 | 51 | ||
49 | nv_wr32(priv, 0x001704, chan->vblank.channel); | ||
50 | nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma); | ||
51 | |||
52 | if (nv_device(priv)->chipset == 0x50) { | 52 | if (nv_device(priv)->chipset == 0x50) { |
53 | nv_wr32(priv, 0x001704, chan->vblank.channel); | ||
54 | nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma); | ||
55 | bar->flush(bar); | ||
53 | nv_wr32(priv, 0x001570, chan->vblank.offset); | 56 | nv_wr32(priv, 0x001570, chan->vblank.offset); |
54 | nv_wr32(priv, 0x001574, chan->vblank.value); | 57 | nv_wr32(priv, 0x001574, chan->vblank.value); |
55 | } else { | 58 | } else { |
56 | if (nv_device(priv)->chipset >= 0xc0) { | 59 | nv_wr32(priv, 0x001718, 0x80000000 | chan->vblank.channel); |
57 | nv_wr32(priv, 0x06000c, | 60 | bar->flush(bar); |
58 | upper_32_bits(chan->vblank.offset)); | 61 | nv_wr32(priv, 0x06000c, |
59 | } | 62 | upper_32_bits(chan->vblank.offset)); |
60 | nv_wr32(priv, 0x060010, chan->vblank.offset); | 63 | nv_wr32(priv, 0x060010, |
64 | lower_32_bits(chan->vblank.offset)); | ||
61 | nv_wr32(priv, 0x060014, chan->vblank.value); | 65 | nv_wr32(priv, 0x060014, chan->vblank.value); |
62 | } | 66 | } |
63 | 67 | ||
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c index 8d0021049ec0..425001204a89 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c | |||
@@ -156,8 +156,8 @@ nv40_graph_context_ctor(struct nouveau_object *parent, | |||
156 | static int | 156 | static int |
157 | nv40_graph_context_fini(struct nouveau_object *object, bool suspend) | 157 | nv40_graph_context_fini(struct nouveau_object *object, bool suspend) |
158 | { | 158 | { |
159 | struct nv04_graph_priv *priv = (void *)object->engine; | 159 | struct nv40_graph_priv *priv = (void *)object->engine; |
160 | struct nv04_graph_chan *chan = (void *)object; | 160 | struct nv40_graph_chan *chan = (void *)object; |
161 | u32 inst = 0x01000000 | nv_gpuobj(chan)->addr >> 4; | 161 | u32 inst = 0x01000000 | nv_gpuobj(chan)->addr >> 4; |
162 | int ret = 0; | 162 | int ret = 0; |
163 | 163 | ||
diff --git a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c index 12418574efea..f7c581ad1991 100644 --- a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c +++ b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c | |||
@@ -38,7 +38,7 @@ struct nv40_mpeg_priv { | |||
38 | }; | 38 | }; |
39 | 39 | ||
40 | struct nv40_mpeg_chan { | 40 | struct nv40_mpeg_chan { |
41 | struct nouveau_mpeg base; | 41 | struct nouveau_mpeg_chan base; |
42 | }; | 42 | }; |
43 | 43 | ||
44 | /******************************************************************************* | 44 | /******************************************************************************* |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c index 49050d991e75..9474cfca6e4c 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c | |||
@@ -67,7 +67,7 @@ nv41_vm_unmap(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt) | |||
67 | static void | 67 | static void |
68 | nv41_vm_flush(struct nouveau_vm *vm) | 68 | nv41_vm_flush(struct nouveau_vm *vm) |
69 | { | 69 | { |
70 | struct nv04_vm_priv *priv = (void *)vm->vmm; | 70 | struct nv04_vmmgr_priv *priv = (void *)vm->vmm; |
71 | 71 | ||
72 | mutex_lock(&nv_subdev(priv)->mutex); | 72 | mutex_lock(&nv_subdev(priv)->mutex); |
73 | nv_wr32(priv, 0x100810, 0x00000022); | 73 | nv_wr32(priv, 0x100810, 0x00000022); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 9a6e2cb282dc..d3595b23434a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c | |||
@@ -355,7 +355,7 @@ nouveau_connector_detect_lvds(struct drm_connector *connector, bool force) | |||
355 | * valid - it's not (rh#613284) | 355 | * valid - it's not (rh#613284) |
356 | */ | 356 | */ |
357 | if (nv_encoder->dcb->lvdsconf.use_acpi_for_edid) { | 357 | if (nv_encoder->dcb->lvdsconf.use_acpi_for_edid) { |
358 | if (!(nv_connector->edid = nouveau_acpi_edid(dev, connector))) { | 358 | if ((nv_connector->edid = nouveau_acpi_edid(dev, connector))) { |
359 | status = connector_status_connected; | 359 | status = connector_status_connected; |
360 | goto out; | 360 | goto out; |
361 | } | 361 | } |
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 2e566e123e9e..3bce0299f64a 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -1696,35 +1696,43 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc) | |||
1696 | return ATOM_PPLL2; | 1696 | return ATOM_PPLL2; |
1697 | DRM_ERROR("unable to allocate a PPLL\n"); | 1697 | DRM_ERROR("unable to allocate a PPLL\n"); |
1698 | return ATOM_PPLL_INVALID; | 1698 | return ATOM_PPLL_INVALID; |
1699 | } else { | 1699 | } else if (ASIC_IS_AVIVO(rdev)) { |
1700 | if (ASIC_IS_AVIVO(rdev)) { | 1700 | /* in DP mode, the DP ref clock can come from either PPLL |
1701 | /* in DP mode, the DP ref clock can come from either PPLL | 1701 | * depending on the asic: |
1702 | * depending on the asic: | 1702 | * DCE3: PPLL1 or PPLL2 |
1703 | * DCE3: PPLL1 or PPLL2 | 1703 | */ |
1704 | */ | 1704 | if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) { |
1705 | if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) { | 1705 | /* use the same PPLL for all DP monitors */ |
1706 | /* use the same PPLL for all DP monitors */ | 1706 | pll = radeon_get_shared_dp_ppll(crtc); |
1707 | pll = radeon_get_shared_dp_ppll(crtc); | 1707 | if (pll != ATOM_PPLL_INVALID) |
1708 | if (pll != ATOM_PPLL_INVALID) | 1708 | return pll; |
1709 | return pll; | 1709 | } else { |
1710 | } else { | 1710 | /* use the same PPLL for all monitors with the same clock */ |
1711 | /* use the same PPLL for all monitors with the same clock */ | 1711 | pll = radeon_get_shared_nondp_ppll(crtc); |
1712 | pll = radeon_get_shared_nondp_ppll(crtc); | 1712 | if (pll != ATOM_PPLL_INVALID) |
1713 | if (pll != ATOM_PPLL_INVALID) | 1713 | return pll; |
1714 | return pll; | 1714 | } |
1715 | } | 1715 | /* all other cases */ |
1716 | /* all other cases */ | 1716 | pll_in_use = radeon_get_pll_use_mask(crtc); |
1717 | pll_in_use = radeon_get_pll_use_mask(crtc); | 1717 | /* the order shouldn't matter here, but we probably |
1718 | * need this until we have atomic modeset | ||
1719 | */ | ||
1720 | if (rdev->flags & RADEON_IS_IGP) { | ||
1718 | if (!(pll_in_use & (1 << ATOM_PPLL1))) | 1721 | if (!(pll_in_use & (1 << ATOM_PPLL1))) |
1719 | return ATOM_PPLL1; | 1722 | return ATOM_PPLL1; |
1720 | if (!(pll_in_use & (1 << ATOM_PPLL2))) | 1723 | if (!(pll_in_use & (1 << ATOM_PPLL2))) |
1721 | return ATOM_PPLL2; | 1724 | return ATOM_PPLL2; |
1722 | DRM_ERROR("unable to allocate a PPLL\n"); | ||
1723 | return ATOM_PPLL_INVALID; | ||
1724 | } else { | 1725 | } else { |
1725 | /* on pre-R5xx asics, the crtc to pll mapping is hardcoded */ | 1726 | if (!(pll_in_use & (1 << ATOM_PPLL2))) |
1726 | return radeon_crtc->crtc_id; | 1727 | return ATOM_PPLL2; |
1728 | if (!(pll_in_use & (1 << ATOM_PPLL1))) | ||
1729 | return ATOM_PPLL1; | ||
1727 | } | 1730 | } |
1731 | DRM_ERROR("unable to allocate a PPLL\n"); | ||
1732 | return ATOM_PPLL_INVALID; | ||
1733 | } else { | ||
1734 | /* on pre-R5xx asics, the crtc to pll mapping is hardcoded */ | ||
1735 | return radeon_crtc->crtc_id; | ||
1728 | } | 1736 | } |
1729 | } | 1737 | } |
1730 | 1738 | ||
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c index ba498f8e47a2..010bae19554a 100644 --- a/drivers/gpu/drm/radeon/atombios_encoders.c +++ b/drivers/gpu/drm/radeon/atombios_encoders.c | |||
@@ -1625,7 +1625,7 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode) | |||
1625 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0); | 1625 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP, 0, 0); |
1626 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); | 1626 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE, 0, 0); |
1627 | /* some early dce3.2 boards have a bug in their transmitter control table */ | 1627 | /* some early dce3.2 boards have a bug in their transmitter control table */ |
1628 | if ((rdev->family != CHIP_RV710) || (rdev->family != CHIP_RV730)) | 1628 | if ((rdev->family != CHIP_RV710) && (rdev->family != CHIP_RV730)) |
1629 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); | 1629 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); |
1630 | } | 1630 | } |
1631 | if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) { | 1631 | if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector) { |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 14313ad43b76..af31f829f4a8 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -1372,7 +1372,7 @@ void evergreen_mc_resume(struct radeon_device *rdev, struct evergreen_mc_save *s | |||
1372 | WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN); | 1372 | WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN); |
1373 | 1373 | ||
1374 | for (i = 0; i < rdev->num_crtc; i++) { | 1374 | for (i = 0; i < rdev->num_crtc; i++) { |
1375 | if (save->crtc_enabled) { | 1375 | if (save->crtc_enabled[i]) { |
1376 | if (ASIC_IS_DCE6(rdev)) { | 1376 | if (ASIC_IS_DCE6(rdev)) { |
1377 | tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]); | 1377 | tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]); |
1378 | tmp |= EVERGREEN_CRTC_BLANK_DATA_EN; | 1378 | tmp |= EVERGREEN_CRTC_BLANK_DATA_EN; |
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index 30271b641913..c042e497e450 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c | |||
@@ -264,7 +264,7 @@ static int evergreen_surface_check_2d(struct radeon_cs_parser *p, | |||
264 | /* macro tile width & height */ | 264 | /* macro tile width & height */ |
265 | palign = (8 * surf->bankw * track->npipes) * surf->mtilea; | 265 | palign = (8 * surf->bankw * track->npipes) * surf->mtilea; |
266 | halign = (8 * surf->bankh * surf->nbanks) / surf->mtilea; | 266 | halign = (8 * surf->bankh * surf->nbanks) / surf->mtilea; |
267 | mtileb = (palign / 8) * (halign / 8) * tileb;; | 267 | mtileb = (palign / 8) * (halign / 8) * tileb; |
268 | mtile_pr = surf->nbx / palign; | 268 | mtile_pr = surf->nbx / palign; |
269 | mtile_ps = (mtile_pr * surf->nby) / halign; | 269 | mtile_ps = (mtile_pr * surf->nby) / halign; |
270 | surf->layer_size = mtile_ps * mtileb * slice_pt; | 270 | surf->layer_size = mtile_ps * mtileb * slice_pt; |
@@ -2725,6 +2725,9 @@ static bool evergreen_vm_reg_valid(u32 reg) | |||
2725 | /* check config regs */ | 2725 | /* check config regs */ |
2726 | switch (reg) { | 2726 | switch (reg) { |
2727 | case GRBM_GFX_INDEX: | 2727 | case GRBM_GFX_INDEX: |
2728 | case CP_STRMOUT_CNTL: | ||
2729 | case CP_COHER_CNTL: | ||
2730 | case CP_COHER_SIZE: | ||
2728 | case VGT_VTX_VECT_EJECT_REG: | 2731 | case VGT_VTX_VECT_EJECT_REG: |
2729 | case VGT_CACHE_INVALIDATION: | 2732 | case VGT_CACHE_INVALIDATION: |
2730 | case VGT_GS_VERTEX_REUSE: | 2733 | case VGT_GS_VERTEX_REUSE: |
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index df542f1a5dfb..2bc0f6a1b428 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h | |||
@@ -91,6 +91,10 @@ | |||
91 | #define FB_READ_EN (1 << 0) | 91 | #define FB_READ_EN (1 << 0) |
92 | #define FB_WRITE_EN (1 << 1) | 92 | #define FB_WRITE_EN (1 << 1) |
93 | 93 | ||
94 | #define CP_STRMOUT_CNTL 0x84FC | ||
95 | |||
96 | #define CP_COHER_CNTL 0x85F0 | ||
97 | #define CP_COHER_SIZE 0x85F4 | ||
94 | #define CP_COHER_BASE 0x85F8 | 98 | #define CP_COHER_BASE 0x85F8 |
95 | #define CP_STALLED_STAT1 0x8674 | 99 | #define CP_STALLED_STAT1 0x8674 |
96 | #define CP_STALLED_STAT2 0x8678 | 100 | #define CP_STALLED_STAT2 0x8678 |
diff --git a/drivers/gpu/drm/radeon/radeon_atpx_handler.c b/drivers/gpu/drm/radeon/radeon_atpx_handler.c index 37f6a907aea4..15f5ded65e0c 100644 --- a/drivers/gpu/drm/radeon/radeon_atpx_handler.c +++ b/drivers/gpu/drm/radeon/radeon_atpx_handler.c | |||
@@ -352,9 +352,9 @@ static int radeon_atpx_switchto(enum vga_switcheroo_client_id id) | |||
352 | } | 352 | } |
353 | 353 | ||
354 | /** | 354 | /** |
355 | * radeon_atpx_switchto - switch to the requested GPU | 355 | * radeon_atpx_power_state - power down/up the requested GPU |
356 | * | 356 | * |
357 | * @id: GPU to switch to | 357 | * @id: GPU to power down/up |
358 | * @state: requested power state (0 = off, 1 = on) | 358 | * @state: requested power state (0 = off, 1 = on) |
359 | * | 359 | * |
360 | * Execute the necessary ATPX function to power down/up the discrete GPU | 360 | * Execute the necessary ATPX function to power down/up the discrete GPU |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index 67cfc1795ecd..b884c362a8c2 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -941,7 +941,7 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) | |||
941 | struct drm_mode_object *obj; | 941 | struct drm_mode_object *obj; |
942 | int i; | 942 | int i; |
943 | enum drm_connector_status ret = connector_status_disconnected; | 943 | enum drm_connector_status ret = connector_status_disconnected; |
944 | bool dret = false; | 944 | bool dret = false, broken_edid = false; |
945 | 945 | ||
946 | if (!force && radeon_check_hpd_status_unchanged(connector)) | 946 | if (!force && radeon_check_hpd_status_unchanged(connector)) |
947 | return connector->status; | 947 | return connector->status; |
@@ -965,6 +965,9 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) | |||
965 | ret = connector_status_disconnected; | 965 | ret = connector_status_disconnected; |
966 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); | 966 | DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n", drm_get_connector_name(connector)); |
967 | radeon_connector->ddc_bus = NULL; | 967 | radeon_connector->ddc_bus = NULL; |
968 | } else { | ||
969 | ret = connector_status_connected; | ||
970 | broken_edid = true; /* defer use_digital to later */ | ||
968 | } | 971 | } |
969 | } else { | 972 | } else { |
970 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | 973 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); |
@@ -1047,13 +1050,24 @@ radeon_dvi_detect(struct drm_connector *connector, bool force) | |||
1047 | 1050 | ||
1048 | encoder_funcs = encoder->helper_private; | 1051 | encoder_funcs = encoder->helper_private; |
1049 | if (encoder_funcs->detect) { | 1052 | if (encoder_funcs->detect) { |
1050 | if (ret != connector_status_connected) { | 1053 | if (!broken_edid) { |
1051 | ret = encoder_funcs->detect(encoder, connector); | 1054 | if (ret != connector_status_connected) { |
1052 | if (ret == connector_status_connected) { | 1055 | /* deal with analog monitors without DDC */ |
1053 | radeon_connector->use_digital = false; | 1056 | ret = encoder_funcs->detect(encoder, connector); |
1057 | if (ret == connector_status_connected) { | ||
1058 | radeon_connector->use_digital = false; | ||
1059 | } | ||
1060 | if (ret != connector_status_disconnected) | ||
1061 | radeon_connector->detected_by_load = true; | ||
1054 | } | 1062 | } |
1055 | if (ret != connector_status_disconnected) | 1063 | } else { |
1056 | radeon_connector->detected_by_load = true; | 1064 | enum drm_connector_status lret; |
1065 | /* assume digital unless load detected otherwise */ | ||
1066 | radeon_connector->use_digital = true; | ||
1067 | lret = encoder_funcs->detect(encoder, connector); | ||
1068 | DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret); | ||
1069 | if (lret == connector_status_connected) | ||
1070 | radeon_connector->use_digital = false; | ||
1057 | } | 1071 | } |
1058 | break; | 1072 | break; |
1059 | } | 1073 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 5677a424b585..6857cb4efb76 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |||
@@ -295,6 +295,7 @@ static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
295 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | 295 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
296 | struct drm_device *dev = crtc->dev; | 296 | struct drm_device *dev = crtc->dev; |
297 | struct radeon_device *rdev = dev->dev_private; | 297 | struct radeon_device *rdev = dev->dev_private; |
298 | uint32_t crtc_ext_cntl = 0; | ||
298 | uint32_t mask; | 299 | uint32_t mask; |
299 | 300 | ||
300 | if (radeon_crtc->crtc_id) | 301 | if (radeon_crtc->crtc_id) |
@@ -307,6 +308,16 @@ static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
307 | RADEON_CRTC_VSYNC_DIS | | 308 | RADEON_CRTC_VSYNC_DIS | |
308 | RADEON_CRTC_HSYNC_DIS); | 309 | RADEON_CRTC_HSYNC_DIS); |
309 | 310 | ||
311 | /* | ||
312 | * On all dual CRTC GPUs this bit controls the CRTC of the primary DAC. | ||
313 | * Therefore it is set in the DAC DMPS function. | ||
314 | * This is different for GPU's with a single CRTC but a primary and a | ||
315 | * TV DAC: here it controls the single CRTC no matter where it is | ||
316 | * routed. Therefore we set it here. | ||
317 | */ | ||
318 | if (rdev->flags & RADEON_SINGLE_CRTC) | ||
319 | crtc_ext_cntl = RADEON_CRTC_CRT_ON; | ||
320 | |||
310 | switch (mode) { | 321 | switch (mode) { |
311 | case DRM_MODE_DPMS_ON: | 322 | case DRM_MODE_DPMS_ON: |
312 | radeon_crtc->enabled = true; | 323 | radeon_crtc->enabled = true; |
@@ -317,7 +328,7 @@ static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
317 | else { | 328 | else { |
318 | WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN | | 329 | WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_EN, ~(RADEON_CRTC_EN | |
319 | RADEON_CRTC_DISP_REQ_EN_B)); | 330 | RADEON_CRTC_DISP_REQ_EN_B)); |
320 | WREG32_P(RADEON_CRTC_EXT_CNTL, 0, ~mask); | 331 | WREG32_P(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl, ~(mask | crtc_ext_cntl)); |
321 | } | 332 | } |
322 | drm_vblank_post_modeset(dev, radeon_crtc->crtc_id); | 333 | drm_vblank_post_modeset(dev, radeon_crtc->crtc_id); |
323 | radeon_crtc_load_lut(crtc); | 334 | radeon_crtc_load_lut(crtc); |
@@ -331,7 +342,7 @@ static void radeon_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
331 | else { | 342 | else { |
332 | WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN | | 343 | WREG32_P(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~(RADEON_CRTC_EN | |
333 | RADEON_CRTC_DISP_REQ_EN_B)); | 344 | RADEON_CRTC_DISP_REQ_EN_B)); |
334 | WREG32_P(RADEON_CRTC_EXT_CNTL, mask, ~mask); | 345 | WREG32_P(RADEON_CRTC_EXT_CNTL, mask, ~(mask | crtc_ext_cntl)); |
335 | } | 346 | } |
336 | radeon_crtc->enabled = false; | 347 | radeon_crtc->enabled = false; |
337 | /* adjust pm to dpms changes AFTER disabling crtcs */ | 348 | /* adjust pm to dpms changes AFTER disabling crtcs */ |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 0063df9d166d..f5ba2241dacc 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |||
@@ -537,7 +537,9 @@ static void radeon_legacy_primary_dac_dpms(struct drm_encoder *encoder, int mode | |||
537 | break; | 537 | break; |
538 | } | 538 | } |
539 | 539 | ||
540 | WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); | 540 | /* handled in radeon_crtc_dpms() */ |
541 | if (!(rdev->flags & RADEON_SINGLE_CRTC)) | ||
542 | WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); | ||
541 | WREG32(RADEON_DAC_CNTL, dac_cntl); | 543 | WREG32(RADEON_DAC_CNTL, dac_cntl); |
542 | WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl); | 544 | WREG32(RADEON_DAC_MACRO_CNTL, dac_macro_cntl); |
543 | 545 | ||
@@ -662,6 +664,8 @@ static enum drm_connector_status radeon_legacy_primary_dac_detect(struct drm_enc | |||
662 | 664 | ||
663 | if (ASIC_IS_R300(rdev)) | 665 | if (ASIC_IS_R300(rdev)) |
664 | tmp |= (0x1b6 << RADEON_DAC_FORCE_DATA_SHIFT); | 666 | tmp |= (0x1b6 << RADEON_DAC_FORCE_DATA_SHIFT); |
667 | else if (ASIC_IS_RV100(rdev)) | ||
668 | tmp |= (0x1ac << RADEON_DAC_FORCE_DATA_SHIFT); | ||
665 | else | 669 | else |
666 | tmp |= (0x180 << RADEON_DAC_FORCE_DATA_SHIFT); | 670 | tmp |= (0x180 << RADEON_DAC_FORCE_DATA_SHIFT); |
667 | 671 | ||
@@ -671,6 +675,7 @@ static enum drm_connector_status radeon_legacy_primary_dac_detect(struct drm_enc | |||
671 | tmp |= RADEON_DAC_RANGE_CNTL_PS2 | RADEON_DAC_CMP_EN; | 675 | tmp |= RADEON_DAC_RANGE_CNTL_PS2 | RADEON_DAC_CMP_EN; |
672 | WREG32(RADEON_DAC_CNTL, tmp); | 676 | WREG32(RADEON_DAC_CNTL, tmp); |
673 | 677 | ||
678 | tmp = dac_macro_cntl; | ||
674 | tmp &= ~(RADEON_DAC_PDWN_R | | 679 | tmp &= ~(RADEON_DAC_PDWN_R | |
675 | RADEON_DAC_PDWN_G | | 680 | RADEON_DAC_PDWN_G | |
676 | RADEON_DAC_PDWN_B); | 681 | RADEON_DAC_PDWN_B); |
@@ -1092,7 +1097,8 @@ static void radeon_legacy_tv_dac_dpms(struct drm_encoder *encoder, int mode) | |||
1092 | } else { | 1097 | } else { |
1093 | if (is_tv) | 1098 | if (is_tv) |
1094 | WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl); | 1099 | WREG32(RADEON_TV_MASTER_CNTL, tv_master_cntl); |
1095 | else | 1100 | /* handled in radeon_crtc_dpms() */ |
1101 | else if (!(rdev->flags & RADEON_SINGLE_CRTC)) | ||
1096 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); | 1102 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); |
1097 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); | 1103 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); |
1098 | } | 1104 | } |
@@ -1416,13 +1422,104 @@ static bool radeon_legacy_tv_detect(struct drm_encoder *encoder, | |||
1416 | return found; | 1422 | return found; |
1417 | } | 1423 | } |
1418 | 1424 | ||
1425 | static bool radeon_legacy_ext_dac_detect(struct drm_encoder *encoder, | ||
1426 | struct drm_connector *connector) | ||
1427 | { | ||
1428 | struct drm_device *dev = encoder->dev; | ||
1429 | struct radeon_device *rdev = dev->dev_private; | ||
1430 | uint32_t gpio_monid, fp2_gen_cntl, disp_output_cntl, crtc2_gen_cntl; | ||
1431 | uint32_t disp_lin_trans_grph_a, disp_lin_trans_grph_b, disp_lin_trans_grph_c; | ||
1432 | uint32_t disp_lin_trans_grph_d, disp_lin_trans_grph_e, disp_lin_trans_grph_f; | ||
1433 | uint32_t tmp, crtc2_h_total_disp, crtc2_v_total_disp; | ||
1434 | uint32_t crtc2_h_sync_strt_wid, crtc2_v_sync_strt_wid; | ||
1435 | bool found = false; | ||
1436 | int i; | ||
1437 | |||
1438 | /* save the regs we need */ | ||
1439 | gpio_monid = RREG32(RADEON_GPIO_MONID); | ||
1440 | fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); | ||
1441 | disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL); | ||
1442 | crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL); | ||
1443 | disp_lin_trans_grph_a = RREG32(RADEON_DISP_LIN_TRANS_GRPH_A); | ||
1444 | disp_lin_trans_grph_b = RREG32(RADEON_DISP_LIN_TRANS_GRPH_B); | ||
1445 | disp_lin_trans_grph_c = RREG32(RADEON_DISP_LIN_TRANS_GRPH_C); | ||
1446 | disp_lin_trans_grph_d = RREG32(RADEON_DISP_LIN_TRANS_GRPH_D); | ||
1447 | disp_lin_trans_grph_e = RREG32(RADEON_DISP_LIN_TRANS_GRPH_E); | ||
1448 | disp_lin_trans_grph_f = RREG32(RADEON_DISP_LIN_TRANS_GRPH_F); | ||
1449 | crtc2_h_total_disp = RREG32(RADEON_CRTC2_H_TOTAL_DISP); | ||
1450 | crtc2_v_total_disp = RREG32(RADEON_CRTC2_V_TOTAL_DISP); | ||
1451 | crtc2_h_sync_strt_wid = RREG32(RADEON_CRTC2_H_SYNC_STRT_WID); | ||
1452 | crtc2_v_sync_strt_wid = RREG32(RADEON_CRTC2_V_SYNC_STRT_WID); | ||
1453 | |||
1454 | tmp = RREG32(RADEON_GPIO_MONID); | ||
1455 | tmp &= ~RADEON_GPIO_A_0; | ||
1456 | WREG32(RADEON_GPIO_MONID, tmp); | ||
1457 | |||
1458 | WREG32(RADEON_FP2_GEN_CNTL, (RADEON_FP2_ON | | ||
1459 | RADEON_FP2_PANEL_FORMAT | | ||
1460 | R200_FP2_SOURCE_SEL_TRANS_UNIT | | ||
1461 | RADEON_FP2_DVO_EN | | ||
1462 | R200_FP2_DVO_RATE_SEL_SDR)); | ||
1463 | |||
1464 | WREG32(RADEON_DISP_OUTPUT_CNTL, (RADEON_DISP_DAC_SOURCE_RMX | | ||
1465 | RADEON_DISP_TRANS_MATRIX_GRAPHICS)); | ||
1466 | |||
1467 | WREG32(RADEON_CRTC2_GEN_CNTL, (RADEON_CRTC2_EN | | ||
1468 | RADEON_CRTC2_DISP_REQ_EN_B)); | ||
1469 | |||
1470 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_A, 0x00000000); | ||
1471 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_B, 0x000003f0); | ||
1472 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_C, 0x00000000); | ||
1473 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_D, 0x000003f0); | ||
1474 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_E, 0x00000000); | ||
1475 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_F, 0x000003f0); | ||
1476 | |||
1477 | WREG32(RADEON_CRTC2_H_TOTAL_DISP, 0x01000008); | ||
1478 | WREG32(RADEON_CRTC2_H_SYNC_STRT_WID, 0x00000800); | ||
1479 | WREG32(RADEON_CRTC2_V_TOTAL_DISP, 0x00080001); | ||
1480 | WREG32(RADEON_CRTC2_V_SYNC_STRT_WID, 0x00000080); | ||
1481 | |||
1482 | for (i = 0; i < 200; i++) { | ||
1483 | tmp = RREG32(RADEON_GPIO_MONID); | ||
1484 | if (tmp & RADEON_GPIO_Y_0) | ||
1485 | found = true; | ||
1486 | |||
1487 | if (found) | ||
1488 | break; | ||
1489 | |||
1490 | if (!drm_can_sleep()) | ||
1491 | mdelay(1); | ||
1492 | else | ||
1493 | msleep(1); | ||
1494 | } | ||
1495 | |||
1496 | /* restore the regs we used */ | ||
1497 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_A, disp_lin_trans_grph_a); | ||
1498 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_B, disp_lin_trans_grph_b); | ||
1499 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_C, disp_lin_trans_grph_c); | ||
1500 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_D, disp_lin_trans_grph_d); | ||
1501 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_E, disp_lin_trans_grph_e); | ||
1502 | WREG32(RADEON_DISP_LIN_TRANS_GRPH_F, disp_lin_trans_grph_f); | ||
1503 | WREG32(RADEON_CRTC2_H_TOTAL_DISP, crtc2_h_total_disp); | ||
1504 | WREG32(RADEON_CRTC2_V_TOTAL_DISP, crtc2_v_total_disp); | ||
1505 | WREG32(RADEON_CRTC2_H_SYNC_STRT_WID, crtc2_h_sync_strt_wid); | ||
1506 | WREG32(RADEON_CRTC2_V_SYNC_STRT_WID, crtc2_v_sync_strt_wid); | ||
1507 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); | ||
1508 | WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl); | ||
1509 | WREG32(RADEON_FP2_GEN_CNTL, fp2_gen_cntl); | ||
1510 | WREG32(RADEON_GPIO_MONID, gpio_monid); | ||
1511 | |||
1512 | return found; | ||
1513 | } | ||
1514 | |||
1419 | static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder *encoder, | 1515 | static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder *encoder, |
1420 | struct drm_connector *connector) | 1516 | struct drm_connector *connector) |
1421 | { | 1517 | { |
1422 | struct drm_device *dev = encoder->dev; | 1518 | struct drm_device *dev = encoder->dev; |
1423 | struct radeon_device *rdev = dev->dev_private; | 1519 | struct radeon_device *rdev = dev->dev_private; |
1424 | uint32_t crtc2_gen_cntl, tv_dac_cntl, dac_cntl2, dac_ext_cntl; | 1520 | uint32_t crtc2_gen_cntl = 0, tv_dac_cntl, dac_cntl2, dac_ext_cntl; |
1425 | uint32_t disp_hw_debug, disp_output_cntl, gpiopad_a, pixclks_cntl, tmp; | 1521 | uint32_t gpiopad_a = 0, pixclks_cntl, tmp; |
1522 | uint32_t disp_output_cntl = 0, disp_hw_debug = 0, crtc_ext_cntl = 0; | ||
1426 | enum drm_connector_status found = connector_status_disconnected; | 1523 | enum drm_connector_status found = connector_status_disconnected; |
1427 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 1524 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1428 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; | 1525 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; |
@@ -1459,12 +1556,27 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder | |||
1459 | return connector_status_disconnected; | 1556 | return connector_status_disconnected; |
1460 | } | 1557 | } |
1461 | 1558 | ||
1559 | /* R200 uses an external DAC for secondary DAC */ | ||
1560 | if (rdev->family == CHIP_R200) { | ||
1561 | if (radeon_legacy_ext_dac_detect(encoder, connector)) | ||
1562 | found = connector_status_connected; | ||
1563 | return found; | ||
1564 | } | ||
1565 | |||
1462 | /* save the regs we need */ | 1566 | /* save the regs we need */ |
1463 | pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); | 1567 | pixclks_cntl = RREG32_PLL(RADEON_PIXCLKS_CNTL); |
1464 | gpiopad_a = ASIC_IS_R300(rdev) ? RREG32(RADEON_GPIOPAD_A) : 0; | 1568 | |
1465 | disp_output_cntl = ASIC_IS_R300(rdev) ? RREG32(RADEON_DISP_OUTPUT_CNTL) : 0; | 1569 | if (rdev->flags & RADEON_SINGLE_CRTC) { |
1466 | disp_hw_debug = ASIC_IS_R300(rdev) ? 0 : RREG32(RADEON_DISP_HW_DEBUG); | 1570 | crtc_ext_cntl = RREG32(RADEON_CRTC_EXT_CNTL); |
1467 | crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL); | 1571 | } else { |
1572 | if (ASIC_IS_R300(rdev)) { | ||
1573 | gpiopad_a = RREG32(RADEON_GPIOPAD_A); | ||
1574 | disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL); | ||
1575 | } else { | ||
1576 | disp_hw_debug = RREG32(RADEON_DISP_HW_DEBUG); | ||
1577 | } | ||
1578 | crtc2_gen_cntl = RREG32(RADEON_CRTC2_GEN_CNTL); | ||
1579 | } | ||
1468 | tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL); | 1580 | tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL); |
1469 | dac_ext_cntl = RREG32(RADEON_DAC_EXT_CNTL); | 1581 | dac_ext_cntl = RREG32(RADEON_DAC_EXT_CNTL); |
1470 | dac_cntl2 = RREG32(RADEON_DAC_CNTL2); | 1582 | dac_cntl2 = RREG32(RADEON_DAC_CNTL2); |
@@ -1473,22 +1585,24 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder | |||
1473 | | RADEON_PIX2CLK_DAC_ALWAYS_ONb); | 1585 | | RADEON_PIX2CLK_DAC_ALWAYS_ONb); |
1474 | WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); | 1586 | WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); |
1475 | 1587 | ||
1476 | if (ASIC_IS_R300(rdev)) | 1588 | if (rdev->flags & RADEON_SINGLE_CRTC) { |
1477 | WREG32_P(RADEON_GPIOPAD_A, 1, ~1); | 1589 | tmp = crtc_ext_cntl | RADEON_CRTC_CRT_ON; |
1478 | 1590 | WREG32(RADEON_CRTC_EXT_CNTL, tmp); | |
1479 | tmp = crtc2_gen_cntl & ~RADEON_CRTC2_PIX_WIDTH_MASK; | ||
1480 | tmp |= RADEON_CRTC2_CRT2_ON | | ||
1481 | (2 << RADEON_CRTC2_PIX_WIDTH_SHIFT); | ||
1482 | |||
1483 | WREG32(RADEON_CRTC2_GEN_CNTL, tmp); | ||
1484 | |||
1485 | if (ASIC_IS_R300(rdev)) { | ||
1486 | tmp = disp_output_cntl & ~RADEON_DISP_TVDAC_SOURCE_MASK; | ||
1487 | tmp |= RADEON_DISP_TVDAC_SOURCE_CRTC2; | ||
1488 | WREG32(RADEON_DISP_OUTPUT_CNTL, tmp); | ||
1489 | } else { | 1591 | } else { |
1490 | tmp = disp_hw_debug & ~RADEON_CRT2_DISP1_SEL; | 1592 | tmp = crtc2_gen_cntl & ~RADEON_CRTC2_PIX_WIDTH_MASK; |
1491 | WREG32(RADEON_DISP_HW_DEBUG, tmp); | 1593 | tmp |= RADEON_CRTC2_CRT2_ON | |
1594 | (2 << RADEON_CRTC2_PIX_WIDTH_SHIFT); | ||
1595 | WREG32(RADEON_CRTC2_GEN_CNTL, tmp); | ||
1596 | |||
1597 | if (ASIC_IS_R300(rdev)) { | ||
1598 | WREG32_P(RADEON_GPIOPAD_A, 1, ~1); | ||
1599 | tmp = disp_output_cntl & ~RADEON_DISP_TVDAC_SOURCE_MASK; | ||
1600 | tmp |= RADEON_DISP_TVDAC_SOURCE_CRTC2; | ||
1601 | WREG32(RADEON_DISP_OUTPUT_CNTL, tmp); | ||
1602 | } else { | ||
1603 | tmp = disp_hw_debug & ~RADEON_CRT2_DISP1_SEL; | ||
1604 | WREG32(RADEON_DISP_HW_DEBUG, tmp); | ||
1605 | } | ||
1492 | } | 1606 | } |
1493 | 1607 | ||
1494 | tmp = RADEON_TV_DAC_NBLANK | | 1608 | tmp = RADEON_TV_DAC_NBLANK | |
@@ -1530,14 +1644,19 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder | |||
1530 | WREG32(RADEON_DAC_CNTL2, dac_cntl2); | 1644 | WREG32(RADEON_DAC_CNTL2, dac_cntl2); |
1531 | WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl); | 1645 | WREG32(RADEON_DAC_EXT_CNTL, dac_ext_cntl); |
1532 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); | 1646 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); |
1533 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); | ||
1534 | 1647 | ||
1535 | if (ASIC_IS_R300(rdev)) { | 1648 | if (rdev->flags & RADEON_SINGLE_CRTC) { |
1536 | WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl); | 1649 | WREG32(RADEON_CRTC_EXT_CNTL, crtc_ext_cntl); |
1537 | WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1); | ||
1538 | } else { | 1650 | } else { |
1539 | WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug); | 1651 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); |
1652 | if (ASIC_IS_R300(rdev)) { | ||
1653 | WREG32(RADEON_DISP_OUTPUT_CNTL, disp_output_cntl); | ||
1654 | WREG32_P(RADEON_GPIOPAD_A, gpiopad_a, ~1); | ||
1655 | } else { | ||
1656 | WREG32(RADEON_DISP_HW_DEBUG, disp_hw_debug); | ||
1657 | } | ||
1540 | } | 1658 | } |
1659 | |||
1541 | WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); | 1660 | WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); |
1542 | 1661 | ||
1543 | return found; | 1662 | return found; |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index b0db712060fb..4422d630b33b 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -2474,6 +2474,7 @@ static bool si_vm_reg_valid(u32 reg) | |||
2474 | /* check config regs */ | 2474 | /* check config regs */ |
2475 | switch (reg) { | 2475 | switch (reg) { |
2476 | case GRBM_GFX_INDEX: | 2476 | case GRBM_GFX_INDEX: |
2477 | case CP_STRMOUT_CNTL: | ||
2477 | case VGT_VTX_VECT_EJECT_REG: | 2478 | case VGT_VTX_VECT_EJECT_REG: |
2478 | case VGT_CACHE_INVALIDATION: | 2479 | case VGT_CACHE_INVALIDATION: |
2479 | case VGT_ESGS_RING_SIZE: | 2480 | case VGT_ESGS_RING_SIZE: |
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 7d2a20e56577..a8871afc5b4e 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h | |||
@@ -424,6 +424,7 @@ | |||
424 | # define RDERR_INT_ENABLE (1 << 0) | 424 | # define RDERR_INT_ENABLE (1 << 0) |
425 | # define GUI_IDLE_INT_ENABLE (1 << 19) | 425 | # define GUI_IDLE_INT_ENABLE (1 << 19) |
426 | 426 | ||
427 | #define CP_STRMOUT_CNTL 0x84FC | ||
427 | #define SCRATCH_REG0 0x8500 | 428 | #define SCRATCH_REG0 0x8500 |
428 | #define SCRATCH_REG1 0x8504 | 429 | #define SCRATCH_REG1 0x8504 |
429 | #define SCRATCH_REG2 0x8508 | 430 | #define SCRATCH_REG2 0x8508 |
diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c index 860dc4813e99..bd2a3b40cd12 100644 --- a/drivers/gpu/drm/ttm/ttm_page_alloc.c +++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c | |||
@@ -749,7 +749,10 @@ static int ttm_get_pages(struct page **pages, unsigned npages, int flags, | |||
749 | /* clear the pages coming from the pool if requested */ | 749 | /* clear the pages coming from the pool if requested */ |
750 | if (flags & TTM_PAGE_FLAG_ZERO_ALLOC) { | 750 | if (flags & TTM_PAGE_FLAG_ZERO_ALLOC) { |
751 | list_for_each_entry(p, &plist, lru) { | 751 | list_for_each_entry(p, &plist, lru) { |
752 | clear_page(page_address(p)); | 752 | if (PageHighMem(p)) |
753 | clear_highpage(p); | ||
754 | else | ||
755 | clear_page(page_address(p)); | ||
753 | } | 756 | } |
754 | } | 757 | } |
755 | 758 | ||
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c index bf8260133ea9..7d759a430294 100644 --- a/drivers/gpu/drm/ttm/ttm_tt.c +++ b/drivers/gpu/drm/ttm/ttm_tt.c | |||
@@ -308,9 +308,7 @@ int ttm_tt_swapin(struct ttm_tt *ttm) | |||
308 | if (unlikely(to_page == NULL)) | 308 | if (unlikely(to_page == NULL)) |
309 | goto out_err; | 309 | goto out_err; |
310 | 310 | ||
311 | preempt_disable(); | ||
312 | copy_highpage(to_page, from_page); | 311 | copy_highpage(to_page, from_page); |
313 | preempt_enable(); | ||
314 | page_cache_release(from_page); | 312 | page_cache_release(from_page); |
315 | } | 313 | } |
316 | 314 | ||
@@ -358,9 +356,7 @@ int ttm_tt_swapout(struct ttm_tt *ttm, struct file *persistent_swap_storage) | |||
358 | ret = PTR_ERR(to_page); | 356 | ret = PTR_ERR(to_page); |
359 | goto out_err; | 357 | goto out_err; |
360 | } | 358 | } |
361 | preempt_disable(); | ||
362 | copy_highpage(to_page, from_page); | 359 | copy_highpage(to_page, from_page); |
363 | preempt_enable(); | ||
364 | set_page_dirty(to_page); | 360 | set_page_dirty(to_page); |
365 | mark_page_accessed(to_page); | 361 | mark_page_accessed(to_page); |
366 | page_cache_release(to_page); | 362 | page_cache_release(to_page); |
diff --git a/drivers/gpu/drm/udl/udl_drv.h b/drivers/gpu/drm/udl/udl_drv.h index fccd361f7b50..87aa5f5d3c88 100644 --- a/drivers/gpu/drm/udl/udl_drv.h +++ b/drivers/gpu/drm/udl/udl_drv.h | |||
@@ -104,7 +104,7 @@ udl_fb_user_fb_create(struct drm_device *dev, | |||
104 | 104 | ||
105 | int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, | 105 | int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, |
106 | const char *front, char **urb_buf_ptr, | 106 | const char *front, char **urb_buf_ptr, |
107 | u32 byte_offset, u32 byte_width, | 107 | u32 byte_offset, u32 device_byte_offset, u32 byte_width, |
108 | int *ident_ptr, int *sent_ptr); | 108 | int *ident_ptr, int *sent_ptr); |
109 | 109 | ||
110 | int udl_dumb_create(struct drm_file *file_priv, | 110 | int udl_dumb_create(struct drm_file *file_priv, |
diff --git a/drivers/gpu/drm/udl/udl_fb.c b/drivers/gpu/drm/udl/udl_fb.c index 69a2b16f42a6..d4ab3beaada0 100644 --- a/drivers/gpu/drm/udl/udl_fb.c +++ b/drivers/gpu/drm/udl/udl_fb.c | |||
@@ -114,9 +114,10 @@ static void udlfb_dpy_deferred_io(struct fb_info *info, | |||
114 | list_for_each_entry(cur, &fbdefio->pagelist, lru) { | 114 | list_for_each_entry(cur, &fbdefio->pagelist, lru) { |
115 | 115 | ||
116 | if (udl_render_hline(dev, (ufbdev->ufb.base.bits_per_pixel / 8), | 116 | if (udl_render_hline(dev, (ufbdev->ufb.base.bits_per_pixel / 8), |
117 | &urb, (char *) info->fix.smem_start, | 117 | &urb, (char *) info->fix.smem_start, |
118 | &cmd, cur->index << PAGE_SHIFT, | 118 | &cmd, cur->index << PAGE_SHIFT, |
119 | PAGE_SIZE, &bytes_identical, &bytes_sent)) | 119 | cur->index << PAGE_SHIFT, |
120 | PAGE_SIZE, &bytes_identical, &bytes_sent)) | ||
120 | goto error; | 121 | goto error; |
121 | bytes_rendered += PAGE_SIZE; | 122 | bytes_rendered += PAGE_SIZE; |
122 | } | 123 | } |
@@ -187,10 +188,11 @@ int udl_handle_damage(struct udl_framebuffer *fb, int x, int y, | |||
187 | for (i = y; i < y + height ; i++) { | 188 | for (i = y; i < y + height ; i++) { |
188 | const int line_offset = fb->base.pitches[0] * i; | 189 | const int line_offset = fb->base.pitches[0] * i; |
189 | const int byte_offset = line_offset + (x * bpp); | 190 | const int byte_offset = line_offset + (x * bpp); |
190 | 191 | const int dev_byte_offset = (fb->base.width * bpp * i) + (x * bpp); | |
191 | if (udl_render_hline(dev, bpp, &urb, | 192 | if (udl_render_hline(dev, bpp, &urb, |
192 | (char *) fb->obj->vmapping, | 193 | (char *) fb->obj->vmapping, |
193 | &cmd, byte_offset, width * bpp, | 194 | &cmd, byte_offset, dev_byte_offset, |
195 | width * bpp, | ||
194 | &bytes_identical, &bytes_sent)) | 196 | &bytes_identical, &bytes_sent)) |
195 | goto error; | 197 | goto error; |
196 | } | 198 | } |
diff --git a/drivers/gpu/drm/udl/udl_transfer.c b/drivers/gpu/drm/udl/udl_transfer.c index dc095526ffb7..142fee5f983f 100644 --- a/drivers/gpu/drm/udl/udl_transfer.c +++ b/drivers/gpu/drm/udl/udl_transfer.c | |||
@@ -213,11 +213,12 @@ static void udl_compress_hline16( | |||
213 | */ | 213 | */ |
214 | int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, | 214 | int udl_render_hline(struct drm_device *dev, int bpp, struct urb **urb_ptr, |
215 | const char *front, char **urb_buf_ptr, | 215 | const char *front, char **urb_buf_ptr, |
216 | u32 byte_offset, u32 byte_width, | 216 | u32 byte_offset, u32 device_byte_offset, |
217 | u32 byte_width, | ||
217 | int *ident_ptr, int *sent_ptr) | 218 | int *ident_ptr, int *sent_ptr) |
218 | { | 219 | { |
219 | const u8 *line_start, *line_end, *next_pixel; | 220 | const u8 *line_start, *line_end, *next_pixel; |
220 | u32 base16 = 0 + (byte_offset / bpp) * 2; | 221 | u32 base16 = 0 + (device_byte_offset / bpp) * 2; |
221 | struct urb *urb = *urb_ptr; | 222 | struct urb *urb = *urb_ptr; |
222 | u8 *cmd = *urb_buf_ptr; | 223 | u8 *cmd = *urb_buf_ptr; |
223 | u8 *cmd_end = (u8 *) urb->transfer_buffer + urb->transfer_buffer_length; | 224 | u8 *cmd_end = (u8 *) urb->transfer_buffer + urb->transfer_buffer_length; |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c index 3ce68a2e312d..d1498bfd7873 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c | |||
@@ -306,7 +306,7 @@ void vmw_bo_pin(struct ttm_buffer_object *bo, bool pin) | |||
306 | 306 | ||
307 | BUG_ON(!atomic_read(&bo->reserved)); | 307 | BUG_ON(!atomic_read(&bo->reserved)); |
308 | BUG_ON(old_mem_type != TTM_PL_VRAM && | 308 | BUG_ON(old_mem_type != TTM_PL_VRAM && |
309 | old_mem_type != VMW_PL_FLAG_GMR); | 309 | old_mem_type != VMW_PL_GMR); |
310 | 310 | ||
311 | pl_flags = TTM_PL_FLAG_VRAM | VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED; | 311 | pl_flags = TTM_PL_FLAG_VRAM | VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED; |
312 | if (pin) | 312 | if (pin) |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index ed3c1e7ddde9..2dd185e42f21 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | |||
@@ -1098,6 +1098,11 @@ static void vmw_pm_complete(struct device *kdev) | |||
1098 | struct drm_device *dev = pci_get_drvdata(pdev); | 1098 | struct drm_device *dev = pci_get_drvdata(pdev); |
1099 | struct vmw_private *dev_priv = vmw_priv(dev); | 1099 | struct vmw_private *dev_priv = vmw_priv(dev); |
1100 | 1100 | ||
1101 | mutex_lock(&dev_priv->hw_mutex); | ||
1102 | vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2); | ||
1103 | (void) vmw_read(dev_priv, SVGA_REG_ID); | ||
1104 | mutex_unlock(&dev_priv->hw_mutex); | ||
1105 | |||
1101 | /** | 1106 | /** |
1102 | * Reclaim 3d reference held by fbdev and potentially | 1107 | * Reclaim 3d reference held by fbdev and potentially |
1103 | * start fifo. | 1108 | * start fifo. |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c index b07ca2e4d04b..7290811f89be 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c | |||
@@ -110,6 +110,8 @@ int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data, | |||
110 | memcpy_fromio(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size); | 110 | memcpy_fromio(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size); |
111 | 111 | ||
112 | ret = copy_to_user(buffer, bounce, size); | 112 | ret = copy_to_user(buffer, bounce, size); |
113 | if (ret) | ||
114 | ret = -EFAULT; | ||
113 | vfree(bounce); | 115 | vfree(bounce); |
114 | 116 | ||
115 | if (unlikely(ret != 0)) | 117 | if (unlikely(ret != 0)) |
diff --git a/drivers/hid/hid-microsoft.c b/drivers/hid/hid-microsoft.c index f676c01bb471..6fcd466d0825 100644 --- a/drivers/hid/hid-microsoft.c +++ b/drivers/hid/hid-microsoft.c | |||
@@ -46,9 +46,9 @@ static __u8 *ms_report_fixup(struct hid_device *hdev, __u8 *rdesc, | |||
46 | rdesc[559] = 0x45; | 46 | rdesc[559] = 0x45; |
47 | } | 47 | } |
48 | /* the same as above (s/usage/physical/) */ | 48 | /* the same as above (s/usage/physical/) */ |
49 | if ((quirks & MS_RDESC_3K) && *rsize == 106 && | 49 | if ((quirks & MS_RDESC_3K) && *rsize == 106 && rdesc[94] == 0x19 && |
50 | !memcmp((char []){ 0x19, 0x00, 0x29, 0xff }, | 50 | rdesc[95] == 0x00 && rdesc[96] == 0x29 && |
51 | &rdesc[94], 4)) { | 51 | rdesc[97] == 0xff) { |
52 | rdesc[94] = 0x35; | 52 | rdesc[94] = 0x35; |
53 | rdesc[96] = 0x45; | 53 | rdesc[96] = 0x45; |
54 | } | 54 | } |
diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c index 17d15bb610d1..7c47fc3f7b2b 100644 --- a/drivers/hid/hidraw.c +++ b/drivers/hid/hidraw.c | |||
@@ -42,7 +42,6 @@ static struct cdev hidraw_cdev; | |||
42 | static struct class *hidraw_class; | 42 | static struct class *hidraw_class; |
43 | static struct hidraw *hidraw_table[HIDRAW_MAX_DEVICES]; | 43 | static struct hidraw *hidraw_table[HIDRAW_MAX_DEVICES]; |
44 | static DEFINE_MUTEX(minors_lock); | 44 | static DEFINE_MUTEX(minors_lock); |
45 | static void drop_ref(struct hidraw *hid, int exists_bit); | ||
46 | 45 | ||
47 | static ssize_t hidraw_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos) | 46 | static ssize_t hidraw_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos) |
48 | { | 47 | { |
@@ -114,7 +113,7 @@ static ssize_t hidraw_send_report(struct file *file, const char __user *buffer, | |||
114 | __u8 *buf; | 113 | __u8 *buf; |
115 | int ret = 0; | 114 | int ret = 0; |
116 | 115 | ||
117 | if (!hidraw_table[minor] || !hidraw_table[minor]->exist) { | 116 | if (!hidraw_table[minor]) { |
118 | ret = -ENODEV; | 117 | ret = -ENODEV; |
119 | goto out; | 118 | goto out; |
120 | } | 119 | } |
@@ -262,7 +261,7 @@ static int hidraw_open(struct inode *inode, struct file *file) | |||
262 | } | 261 | } |
263 | 262 | ||
264 | mutex_lock(&minors_lock); | 263 | mutex_lock(&minors_lock); |
265 | if (!hidraw_table[minor] || !hidraw_table[minor]->exist) { | 264 | if (!hidraw_table[minor]) { |
266 | err = -ENODEV; | 265 | err = -ENODEV; |
267 | goto out_unlock; | 266 | goto out_unlock; |
268 | } | 267 | } |
@@ -299,12 +298,36 @@ out: | |||
299 | static int hidraw_release(struct inode * inode, struct file * file) | 298 | static int hidraw_release(struct inode * inode, struct file * file) |
300 | { | 299 | { |
301 | unsigned int minor = iminor(inode); | 300 | unsigned int minor = iminor(inode); |
301 | struct hidraw *dev; | ||
302 | struct hidraw_list *list = file->private_data; | 302 | struct hidraw_list *list = file->private_data; |
303 | int ret; | ||
304 | int i; | ||
305 | |||
306 | mutex_lock(&minors_lock); | ||
307 | if (!hidraw_table[minor]) { | ||
308 | ret = -ENODEV; | ||
309 | goto unlock; | ||
310 | } | ||
303 | 311 | ||
304 | drop_ref(hidraw_table[minor], 0); | ||
305 | list_del(&list->node); | 312 | list_del(&list->node); |
313 | dev = hidraw_table[minor]; | ||
314 | if (!--dev->open) { | ||
315 | if (list->hidraw->exist) { | ||
316 | hid_hw_power(dev->hid, PM_HINT_NORMAL); | ||
317 | hid_hw_close(dev->hid); | ||
318 | } else { | ||
319 | kfree(list->hidraw); | ||
320 | } | ||
321 | } | ||
322 | |||
323 | for (i = 0; i < HIDRAW_BUFFER_SIZE; ++i) | ||
324 | kfree(list->buffer[i].value); | ||
306 | kfree(list); | 325 | kfree(list); |
307 | return 0; | 326 | ret = 0; |
327 | unlock: | ||
328 | mutex_unlock(&minors_lock); | ||
329 | |||
330 | return ret; | ||
308 | } | 331 | } |
309 | 332 | ||
310 | static long hidraw_ioctl(struct file *file, unsigned int cmd, | 333 | static long hidraw_ioctl(struct file *file, unsigned int cmd, |
@@ -506,7 +529,21 @@ EXPORT_SYMBOL_GPL(hidraw_connect); | |||
506 | void hidraw_disconnect(struct hid_device *hid) | 529 | void hidraw_disconnect(struct hid_device *hid) |
507 | { | 530 | { |
508 | struct hidraw *hidraw = hid->hidraw; | 531 | struct hidraw *hidraw = hid->hidraw; |
509 | drop_ref(hidraw, 1); | 532 | |
533 | mutex_lock(&minors_lock); | ||
534 | hidraw->exist = 0; | ||
535 | |||
536 | device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor)); | ||
537 | |||
538 | hidraw_table[hidraw->minor] = NULL; | ||
539 | |||
540 | if (hidraw->open) { | ||
541 | hid_hw_close(hid); | ||
542 | wake_up_interruptible(&hidraw->wait); | ||
543 | } else { | ||
544 | kfree(hidraw); | ||
545 | } | ||
546 | mutex_unlock(&minors_lock); | ||
510 | } | 547 | } |
511 | EXPORT_SYMBOL_GPL(hidraw_disconnect); | 548 | EXPORT_SYMBOL_GPL(hidraw_disconnect); |
512 | 549 | ||
@@ -555,23 +592,3 @@ void hidraw_exit(void) | |||
555 | unregister_chrdev_region(dev_id, HIDRAW_MAX_DEVICES); | 592 | unregister_chrdev_region(dev_id, HIDRAW_MAX_DEVICES); |
556 | 593 | ||
557 | } | 594 | } |
558 | |||
559 | static void drop_ref(struct hidraw *hidraw, int exists_bit) | ||
560 | { | ||
561 | mutex_lock(&minors_lock); | ||
562 | if (exists_bit) { | ||
563 | hid_hw_close(hidraw->hid); | ||
564 | hidraw->exist = 0; | ||
565 | if (hidraw->open) | ||
566 | wake_up_interruptible(&hidraw->wait); | ||
567 | } else { | ||
568 | --hidraw->open; | ||
569 | } | ||
570 | |||
571 | if (!hidraw->open && !hidraw->exist) { | ||
572 | device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor)); | ||
573 | hidraw_table[hidraw->minor] = NULL; | ||
574 | kfree(hidraw); | ||
575 | } | ||
576 | mutex_unlock(&minors_lock); | ||
577 | } | ||
diff --git a/drivers/hwmon/asb100.c b/drivers/hwmon/asb100.c index a227be47149f..520e5bf4f76d 100644 --- a/drivers/hwmon/asb100.c +++ b/drivers/hwmon/asb100.c | |||
@@ -32,7 +32,7 @@ | |||
32 | * ASB100-A supports pwm1, while plain ASB100 does not. There is no known | 32 | * ASB100-A supports pwm1, while plain ASB100 does not. There is no known |
33 | * way for the driver to tell which one is there. | 33 | * way for the driver to tell which one is there. |
34 | * | 34 | * |
35 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | 35 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
36 | * asb100 7 3 1 4 0x31 0x0694 yes no | 36 | * asb100 7 3 1 4 0x31 0x0694 yes no |
37 | */ | 37 | */ |
38 | 38 | ||
diff --git a/drivers/hwmon/w83627ehf.c b/drivers/hwmon/w83627ehf.c index 1821b7423d5b..de3c7e04c3b5 100644 --- a/drivers/hwmon/w83627ehf.c +++ b/drivers/hwmon/w83627ehf.c | |||
@@ -2083,6 +2083,7 @@ static int __devinit w83627ehf_probe(struct platform_device *pdev) | |||
2083 | mutex_init(&data->lock); | 2083 | mutex_init(&data->lock); |
2084 | mutex_init(&data->update_lock); | 2084 | mutex_init(&data->update_lock); |
2085 | data->name = w83627ehf_device_names[sio_data->kind]; | 2085 | data->name = w83627ehf_device_names[sio_data->kind]; |
2086 | data->bank = 0xff; /* Force initial bank selection */ | ||
2086 | platform_set_drvdata(pdev, data); | 2087 | platform_set_drvdata(pdev, data); |
2087 | 2088 | ||
2088 | /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */ | 2089 | /* 627EHG and 627EHF have 10 voltage inputs; 627DHG and 667HG have 9 */ |
diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c index 5b1a6a666441..af1589908709 100644 --- a/drivers/hwmon/w83627hf.c +++ b/drivers/hwmon/w83627hf.c | |||
@@ -25,7 +25,7 @@ | |||
25 | /* | 25 | /* |
26 | * Supports following chips: | 26 | * Supports following chips: |
27 | * | 27 | * |
28 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | 28 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
29 | * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) | 29 | * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC) |
30 | * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) | 30 | * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC) |
31 | * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) | 31 | * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC) |
diff --git a/drivers/hwmon/w83781d.c b/drivers/hwmon/w83781d.c index 5a5046d94c3e..20f11d31da40 100644 --- a/drivers/hwmon/w83781d.c +++ b/drivers/hwmon/w83781d.c | |||
@@ -24,7 +24,7 @@ | |||
24 | /* | 24 | /* |
25 | * Supports following chips: | 25 | * Supports following chips: |
26 | * | 26 | * |
27 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | 27 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
28 | * as99127f 7 3 0 3 0x31 0x12c3 yes no | 28 | * as99127f 7 3 0 3 0x31 0x12c3 yes no |
29 | * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no | 29 | * as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no |
30 | * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes | 30 | * w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes |
diff --git a/drivers/hwmon/w83791d.c b/drivers/hwmon/w83791d.c index 39ab7bcc616e..ed397c645198 100644 --- a/drivers/hwmon/w83791d.c +++ b/drivers/hwmon/w83791d.c | |||
@@ -22,7 +22,7 @@ | |||
22 | /* | 22 | /* |
23 | * Supports following chips: | 23 | * Supports following chips: |
24 | * | 24 | * |
25 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | 25 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
26 | * w83791d 10 5 5 3 0x71 0x5ca3 yes no | 26 | * w83791d 10 5 5 3 0x71 0x5ca3 yes no |
27 | * | 27 | * |
28 | * The w83791d chip appears to be part way between the 83781d and the | 28 | * The w83791d chip appears to be part way between the 83781d and the |
diff --git a/drivers/hwmon/w83792d.c b/drivers/hwmon/w83792d.c index 053645279f38..301942d08453 100644 --- a/drivers/hwmon/w83792d.c +++ b/drivers/hwmon/w83792d.c | |||
@@ -31,7 +31,7 @@ | |||
31 | /* | 31 | /* |
32 | * Supports following chips: | 32 | * Supports following chips: |
33 | * | 33 | * |
34 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | 34 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
35 | * w83792d 9 7 7 3 0x7a 0x5ca3 yes no | 35 | * w83792d 9 7 7 3 0x7a 0x5ca3 yes no |
36 | */ | 36 | */ |
37 | 37 | ||
diff --git a/drivers/hwmon/w83l786ng.c b/drivers/hwmon/w83l786ng.c index f0e8286c3c70..79710bcac2f7 100644 --- a/drivers/hwmon/w83l786ng.c +++ b/drivers/hwmon/w83l786ng.c | |||
@@ -20,7 +20,7 @@ | |||
20 | /* | 20 | /* |
21 | * Supports following chips: | 21 | * Supports following chips: |
22 | * | 22 | * |
23 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | 23 | * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA |
24 | * w83l786ng 3 2 2 2 0x7b 0x5ca3 yes no | 24 | * w83l786ng 3 2 2 2 0x7b 0x5ca3 yes no |
25 | */ | 25 | */ |
26 | 26 | ||
diff --git a/drivers/i2c/busses/i2c-mxs.c b/drivers/i2c/busses/i2c-mxs.c index 1f58197062cf..286ca1917820 100644 --- a/drivers/i2c/busses/i2c-mxs.c +++ b/drivers/i2c/busses/i2c-mxs.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Freescale MXS I2C bus driver | 2 | * Freescale MXS I2C bus driver |
3 | * | 3 | * |
4 | * Copyright (C) 2011 Wolfram Sang, Pengutronix e.K. | 4 | * Copyright (C) 2011-2012 Wolfram Sang, Pengutronix e.K. |
5 | * | 5 | * |
6 | * based on a (non-working) driver which was: | 6 | * based on a (non-working) driver which was: |
7 | * | 7 | * |
@@ -35,10 +35,6 @@ | |||
35 | 35 | ||
36 | #define DRIVER_NAME "mxs-i2c" | 36 | #define DRIVER_NAME "mxs-i2c" |
37 | 37 | ||
38 | static bool use_pioqueue; | ||
39 | module_param(use_pioqueue, bool, 0); | ||
40 | MODULE_PARM_DESC(use_pioqueue, "Use PIOQUEUE mode for transfer instead of DMA"); | ||
41 | |||
42 | #define MXS_I2C_CTRL0 (0x00) | 38 | #define MXS_I2C_CTRL0 (0x00) |
43 | #define MXS_I2C_CTRL0_SET (0x04) | 39 | #define MXS_I2C_CTRL0_SET (0x04) |
44 | 40 | ||
@@ -75,23 +71,6 @@ MODULE_PARM_DESC(use_pioqueue, "Use PIOQUEUE mode for transfer instead of DMA"); | |||
75 | MXS_I2C_CTRL1_SLAVE_STOP_IRQ | \ | 71 | MXS_I2C_CTRL1_SLAVE_STOP_IRQ | \ |
76 | MXS_I2C_CTRL1_SLAVE_IRQ) | 72 | MXS_I2C_CTRL1_SLAVE_IRQ) |
77 | 73 | ||
78 | #define MXS_I2C_QUEUECTRL (0x60) | ||
79 | #define MXS_I2C_QUEUECTRL_SET (0x64) | ||
80 | #define MXS_I2C_QUEUECTRL_CLR (0x68) | ||
81 | |||
82 | #define MXS_I2C_QUEUECTRL_QUEUE_RUN 0x20 | ||
83 | #define MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE 0x04 | ||
84 | |||
85 | #define MXS_I2C_QUEUESTAT (0x70) | ||
86 | #define MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY 0x00002000 | ||
87 | #define MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK 0x0000001F | ||
88 | |||
89 | #define MXS_I2C_QUEUECMD (0x80) | ||
90 | |||
91 | #define MXS_I2C_QUEUEDATA (0x90) | ||
92 | |||
93 | #define MXS_I2C_DATA (0xa0) | ||
94 | |||
95 | 74 | ||
96 | #define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK | \ | 75 | #define MXS_CMD_I2C_SELECT (MXS_I2C_CTRL0_RETAIN_CLOCK | \ |
97 | MXS_I2C_CTRL0_PRE_SEND_START | \ | 76 | MXS_I2C_CTRL0_PRE_SEND_START | \ |
@@ -153,7 +132,6 @@ struct mxs_i2c_dev { | |||
153 | const struct mxs_i2c_speed_config *speed; | 132 | const struct mxs_i2c_speed_config *speed; |
154 | 133 | ||
155 | /* DMA support components */ | 134 | /* DMA support components */ |
156 | bool dma_mode; | ||
157 | int dma_channel; | 135 | int dma_channel; |
158 | struct dma_chan *dmach; | 136 | struct dma_chan *dmach; |
159 | struct mxs_dma_data dma_data; | 137 | struct mxs_dma_data dma_data; |
@@ -172,99 +150,6 @@ static void mxs_i2c_reset(struct mxs_i2c_dev *i2c) | |||
172 | writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2); | 150 | writel(i2c->speed->timing2, i2c->regs + MXS_I2C_TIMING2); |
173 | 151 | ||
174 | writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); | 152 | writel(MXS_I2C_IRQ_MASK << 8, i2c->regs + MXS_I2C_CTRL1_SET); |
175 | if (i2c->dma_mode) | ||
176 | writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE, | ||
177 | i2c->regs + MXS_I2C_QUEUECTRL_CLR); | ||
178 | else | ||
179 | writel(MXS_I2C_QUEUECTRL_PIO_QUEUE_MODE, | ||
180 | i2c->regs + MXS_I2C_QUEUECTRL_SET); | ||
181 | } | ||
182 | |||
183 | static void mxs_i2c_pioq_setup_read(struct mxs_i2c_dev *i2c, u8 addr, int len, | ||
184 | int flags) | ||
185 | { | ||
186 | u32 data; | ||
187 | |||
188 | writel(MXS_CMD_I2C_SELECT, i2c->regs + MXS_I2C_QUEUECMD); | ||
189 | |||
190 | data = (addr << 1) | I2C_SMBUS_READ; | ||
191 | writel(data, i2c->regs + MXS_I2C_DATA); | ||
192 | |||
193 | data = MXS_CMD_I2C_READ | MXS_I2C_CTRL0_XFER_COUNT(len) | flags; | ||
194 | writel(data, i2c->regs + MXS_I2C_QUEUECMD); | ||
195 | } | ||
196 | |||
197 | static void mxs_i2c_pioq_setup_write(struct mxs_i2c_dev *i2c, | ||
198 | u8 addr, u8 *buf, int len, int flags) | ||
199 | { | ||
200 | u32 data; | ||
201 | int i, shifts_left; | ||
202 | |||
203 | data = MXS_CMD_I2C_WRITE | MXS_I2C_CTRL0_XFER_COUNT(len + 1) | flags; | ||
204 | writel(data, i2c->regs + MXS_I2C_QUEUECMD); | ||
205 | |||
206 | /* | ||
207 | * We have to copy the slave address (u8) and buffer (arbitrary number | ||
208 | * of u8) into the data register (u32). To achieve that, the u8 are put | ||
209 | * into the MSBs of 'data' which is then shifted for the next u8. When | ||
210 | * appropriate, 'data' is written to MXS_I2C_DATA. So, the first u32 | ||
211 | * looks like this: | ||
212 | * | ||
213 | * 3 2 1 0 | ||
214 | * 10987654|32109876|54321098|76543210 | ||
215 | * --------+--------+--------+-------- | ||
216 | * buffer+2|buffer+1|buffer+0|slave_addr | ||
217 | */ | ||
218 | |||
219 | data = ((addr << 1) | I2C_SMBUS_WRITE) << 24; | ||
220 | |||
221 | for (i = 0; i < len; i++) { | ||
222 | data >>= 8; | ||
223 | data |= buf[i] << 24; | ||
224 | if ((i & 3) == 2) | ||
225 | writel(data, i2c->regs + MXS_I2C_DATA); | ||
226 | } | ||
227 | |||
228 | /* Write out the remaining bytes if any */ | ||
229 | shifts_left = 24 - (i & 3) * 8; | ||
230 | if (shifts_left) | ||
231 | writel(data >> shifts_left, i2c->regs + MXS_I2C_DATA); | ||
232 | } | ||
233 | |||
234 | /* | ||
235 | * TODO: should be replaceable with a waitqueue and RD_QUEUE_IRQ (setting the | ||
236 | * rd_threshold to 1). Couldn't get this to work, though. | ||
237 | */ | ||
238 | static int mxs_i2c_wait_for_data(struct mxs_i2c_dev *i2c) | ||
239 | { | ||
240 | unsigned long timeout = jiffies + msecs_to_jiffies(1000); | ||
241 | |||
242 | while (readl(i2c->regs + MXS_I2C_QUEUESTAT) | ||
243 | & MXS_I2C_QUEUESTAT_RD_QUEUE_EMPTY) { | ||
244 | if (time_after(jiffies, timeout)) | ||
245 | return -ETIMEDOUT; | ||
246 | cond_resched(); | ||
247 | } | ||
248 | |||
249 | return 0; | ||
250 | } | ||
251 | |||
252 | static int mxs_i2c_finish_read(struct mxs_i2c_dev *i2c, u8 *buf, int len) | ||
253 | { | ||
254 | u32 uninitialized_var(data); | ||
255 | int i; | ||
256 | |||
257 | for (i = 0; i < len; i++) { | ||
258 | if ((i & 3) == 0) { | ||
259 | if (mxs_i2c_wait_for_data(i2c)) | ||
260 | return -ETIMEDOUT; | ||
261 | data = readl(i2c->regs + MXS_I2C_QUEUEDATA); | ||
262 | } | ||
263 | buf[i] = data & 0xff; | ||
264 | data >>= 8; | ||
265 | } | ||
266 | |||
267 | return 0; | ||
268 | } | 153 | } |
269 | 154 | ||
270 | static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c) | 155 | static void mxs_i2c_dma_finish(struct mxs_i2c_dev *i2c) |
@@ -432,39 +317,17 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, | |||
432 | init_completion(&i2c->cmd_complete); | 317 | init_completion(&i2c->cmd_complete); |
433 | i2c->cmd_err = 0; | 318 | i2c->cmd_err = 0; |
434 | 319 | ||
435 | if (i2c->dma_mode) { | 320 | ret = mxs_i2c_dma_setup_xfer(adap, msg, flags); |
436 | ret = mxs_i2c_dma_setup_xfer(adap, msg, flags); | 321 | if (ret) |
437 | if (ret) | 322 | return ret; |
438 | return ret; | ||
439 | } else { | ||
440 | if (msg->flags & I2C_M_RD) { | ||
441 | mxs_i2c_pioq_setup_read(i2c, msg->addr, | ||
442 | msg->len, flags); | ||
443 | } else { | ||
444 | mxs_i2c_pioq_setup_write(i2c, msg->addr, msg->buf, | ||
445 | msg->len, flags); | ||
446 | } | ||
447 | |||
448 | writel(MXS_I2C_QUEUECTRL_QUEUE_RUN, | ||
449 | i2c->regs + MXS_I2C_QUEUECTRL_SET); | ||
450 | } | ||
451 | 323 | ||
452 | ret = wait_for_completion_timeout(&i2c->cmd_complete, | 324 | ret = wait_for_completion_timeout(&i2c->cmd_complete, |
453 | msecs_to_jiffies(1000)); | 325 | msecs_to_jiffies(1000)); |
454 | if (ret == 0) | 326 | if (ret == 0) |
455 | goto timeout; | 327 | goto timeout; |
456 | 328 | ||
457 | if (!i2c->dma_mode && !i2c->cmd_err && (msg->flags & I2C_M_RD)) { | ||
458 | ret = mxs_i2c_finish_read(i2c, msg->buf, msg->len); | ||
459 | if (ret) | ||
460 | goto timeout; | ||
461 | } | ||
462 | |||
463 | if (i2c->cmd_err == -ENXIO) | 329 | if (i2c->cmd_err == -ENXIO) |
464 | mxs_i2c_reset(i2c); | 330 | mxs_i2c_reset(i2c); |
465 | else | ||
466 | writel(MXS_I2C_QUEUECTRL_QUEUE_RUN, | ||
467 | i2c->regs + MXS_I2C_QUEUECTRL_CLR); | ||
468 | 331 | ||
469 | dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err); | 332 | dev_dbg(i2c->dev, "Done with err=%d\n", i2c->cmd_err); |
470 | 333 | ||
@@ -472,8 +335,7 @@ static int mxs_i2c_xfer_msg(struct i2c_adapter *adap, struct i2c_msg *msg, | |||
472 | 335 | ||
473 | timeout: | 336 | timeout: |
474 | dev_dbg(i2c->dev, "Timeout!\n"); | 337 | dev_dbg(i2c->dev, "Timeout!\n"); |
475 | if (i2c->dma_mode) | 338 | mxs_i2c_dma_finish(i2c); |
476 | mxs_i2c_dma_finish(i2c); | ||
477 | mxs_i2c_reset(i2c); | 339 | mxs_i2c_reset(i2c); |
478 | return -ETIMEDOUT; | 340 | return -ETIMEDOUT; |
479 | } | 341 | } |
@@ -502,7 +364,6 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id) | |||
502 | { | 364 | { |
503 | struct mxs_i2c_dev *i2c = dev_id; | 365 | struct mxs_i2c_dev *i2c = dev_id; |
504 | u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK; | 366 | u32 stat = readl(i2c->regs + MXS_I2C_CTRL1) & MXS_I2C_IRQ_MASK; |
505 | bool is_last_cmd; | ||
506 | 367 | ||
507 | if (!stat) | 368 | if (!stat) |
508 | return IRQ_NONE; | 369 | return IRQ_NONE; |
@@ -515,14 +376,6 @@ static irqreturn_t mxs_i2c_isr(int this_irq, void *dev_id) | |||
515 | /* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */ | 376 | /* MXS_I2C_CTRL1_OVERSIZE_XFER_TERM_IRQ is only for slaves */ |
516 | i2c->cmd_err = -EIO; | 377 | i2c->cmd_err = -EIO; |
517 | 378 | ||
518 | if (!i2c->dma_mode) { | ||
519 | is_last_cmd = (readl(i2c->regs + MXS_I2C_QUEUESTAT) & | ||
520 | MXS_I2C_QUEUESTAT_WRITE_QUEUE_CNT_MASK) == 0; | ||
521 | |||
522 | if (is_last_cmd || i2c->cmd_err) | ||
523 | complete(&i2c->cmd_complete); | ||
524 | } | ||
525 | |||
526 | writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR); | 379 | writel(stat, i2c->regs + MXS_I2C_CTRL1_CLR); |
527 | 380 | ||
528 | return IRQ_HANDLED; | 381 | return IRQ_HANDLED; |
@@ -556,23 +409,14 @@ static int mxs_i2c_get_ofdata(struct mxs_i2c_dev *i2c) | |||
556 | int ret; | 409 | int ret; |
557 | 410 | ||
558 | /* | 411 | /* |
559 | * The MXS I2C DMA mode is prefered and enabled by default. | ||
560 | * The PIO mode is still supported, but should be used only | ||
561 | * for debuging purposes etc. | ||
562 | */ | ||
563 | i2c->dma_mode = !use_pioqueue; | ||
564 | if (!i2c->dma_mode) | ||
565 | dev_info(dev, "Using PIOQUEUE mode for I2C transfers!\n"); | ||
566 | |||
567 | /* | ||
568 | * TODO: This is a temporary solution and should be changed | 412 | * TODO: This is a temporary solution and should be changed |
569 | * to use generic DMA binding later when the helpers get in. | 413 | * to use generic DMA binding later when the helpers get in. |
570 | */ | 414 | */ |
571 | ret = of_property_read_u32(node, "fsl,i2c-dma-channel", | 415 | ret = of_property_read_u32(node, "fsl,i2c-dma-channel", |
572 | &i2c->dma_channel); | 416 | &i2c->dma_channel); |
573 | if (ret) { | 417 | if (ret) { |
574 | dev_warn(dev, "Failed to get DMA channel, using PIOQUEUE!\n"); | 418 | dev_err(dev, "Failed to get DMA channel!\n"); |
575 | i2c->dma_mode = 0; | 419 | return -ENODEV; |
576 | } | 420 | } |
577 | 421 | ||
578 | ret = of_property_read_u32(node, "clock-frequency", &speed); | 422 | ret = of_property_read_u32(node, "clock-frequency", &speed); |
@@ -634,15 +478,13 @@ static int __devinit mxs_i2c_probe(struct platform_device *pdev) | |||
634 | } | 478 | } |
635 | 479 | ||
636 | /* Setup the DMA */ | 480 | /* Setup the DMA */ |
637 | if (i2c->dma_mode) { | 481 | dma_cap_zero(mask); |
638 | dma_cap_zero(mask); | 482 | dma_cap_set(DMA_SLAVE, mask); |
639 | dma_cap_set(DMA_SLAVE, mask); | 483 | i2c->dma_data.chan_irq = dmairq; |
640 | i2c->dma_data.chan_irq = dmairq; | 484 | i2c->dmach = dma_request_channel(mask, mxs_i2c_dma_filter, i2c); |
641 | i2c->dmach = dma_request_channel(mask, mxs_i2c_dma_filter, i2c); | 485 | if (!i2c->dmach) { |
642 | if (!i2c->dmach) { | 486 | dev_err(dev, "Failed to request dma\n"); |
643 | dev_err(dev, "Failed to request dma\n"); | 487 | return -ENODEV; |
644 | return -ENODEV; | ||
645 | } | ||
646 | } | 488 | } |
647 | 489 | ||
648 | platform_set_drvdata(pdev, i2c); | 490 | platform_set_drvdata(pdev, i2c); |
diff --git a/drivers/i2c/busses/i2c-nomadik.c b/drivers/i2c/busses/i2c-nomadik.c index 698d7acb0f08..02c3115a2dfa 100644 --- a/drivers/i2c/busses/i2c-nomadik.c +++ b/drivers/i2c/busses/i2c-nomadik.c | |||
@@ -644,7 +644,11 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
644 | 644 | ||
645 | pm_runtime_get_sync(&dev->adev->dev); | 645 | pm_runtime_get_sync(&dev->adev->dev); |
646 | 646 | ||
647 | clk_enable(dev->clk); | 647 | status = clk_prepare_enable(dev->clk); |
648 | if (status) { | ||
649 | dev_err(&dev->adev->dev, "can't prepare_enable clock\n"); | ||
650 | goto out_clk; | ||
651 | } | ||
648 | 652 | ||
649 | status = init_hw(dev); | 653 | status = init_hw(dev); |
650 | if (status) | 654 | if (status) |
@@ -671,7 +675,8 @@ static int nmk_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
671 | } | 675 | } |
672 | 676 | ||
673 | out: | 677 | out: |
674 | clk_disable(dev->clk); | 678 | clk_disable_unprepare(dev->clk); |
679 | out_clk: | ||
675 | pm_runtime_put_sync(&dev->adev->dev); | 680 | pm_runtime_put_sync(&dev->adev->dev); |
676 | 681 | ||
677 | dev->busy = false; | 682 | dev->busy = false; |
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index f981ac4e6783..dcea77bf6f50 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c | |||
@@ -742,7 +742,7 @@ static int __devinit tegra_i2c_probe(struct platform_device *pdev) | |||
742 | } | 742 | } |
743 | 743 | ||
744 | ret = devm_request_irq(&pdev->dev, i2c_dev->irq, | 744 | ret = devm_request_irq(&pdev->dev, i2c_dev->irq, |
745 | tegra_i2c_isr, 0, pdev->name, i2c_dev); | 745 | tegra_i2c_isr, 0, dev_name(&pdev->dev), i2c_dev); |
746 | if (ret) { | 746 | if (ret) { |
747 | dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq); | 747 | dev_err(&pdev->dev, "Failed to request irq %i\n", i2c_dev->irq); |
748 | return ret; | 748 | return ret; |
diff --git a/drivers/i2c/muxes/i2c-mux-pinctrl.c b/drivers/i2c/muxes/i2c-mux-pinctrl.c index 5f097f309b9f..7fa5b24b16db 100644 --- a/drivers/i2c/muxes/i2c-mux-pinctrl.c +++ b/drivers/i2c/muxes/i2c-mux-pinctrl.c | |||
@@ -169,7 +169,7 @@ static int __devinit i2c_mux_pinctrl_probe(struct platform_device *pdev) | |||
169 | mux->busses = devm_kzalloc(&pdev->dev, | 169 | mux->busses = devm_kzalloc(&pdev->dev, |
170 | sizeof(mux->busses) * mux->pdata->bus_count, | 170 | sizeof(mux->busses) * mux->pdata->bus_count, |
171 | GFP_KERNEL); | 171 | GFP_KERNEL); |
172 | if (!mux->states) { | 172 | if (!mux->busses) { |
173 | dev_err(&pdev->dev, "Cannot allocate busses\n"); | 173 | dev_err(&pdev->dev, "Cannot allocate busses\n"); |
174 | ret = -ENOMEM; | 174 | ret = -ENOMEM; |
175 | goto err; | 175 | goto err; |
diff --git a/drivers/irqchip/irq-bcm2835.c b/drivers/irqchip/irq-bcm2835.c index dc670ccc6978..16c78f1c5ef2 100644 --- a/drivers/irqchip/irq-bcm2835.c +++ b/drivers/irqchip/irq-bcm2835.c | |||
@@ -168,7 +168,8 @@ static int __init armctrl_of_init(struct device_node *node, | |||
168 | } | 168 | } |
169 | 169 | ||
170 | static struct of_device_id irq_of_match[] __initconst = { | 170 | static struct of_device_id irq_of_match[] __initconst = { |
171 | { .compatible = "brcm,bcm2835-armctrl-ic", .data = armctrl_of_init } | 171 | { .compatible = "brcm,bcm2835-armctrl-ic", .data = armctrl_of_init }, |
172 | { } | ||
172 | }; | 173 | }; |
173 | 174 | ||
174 | void __init bcm2835_init_irq(void) | 175 | void __init bcm2835_init_irq(void) |
diff --git a/drivers/leds/ledtrig-cpu.c b/drivers/leds/ledtrig-cpu.c index b312056da14d..4239b3955ff0 100644 --- a/drivers/leds/ledtrig-cpu.c +++ b/drivers/leds/ledtrig-cpu.c | |||
@@ -33,8 +33,6 @@ | |||
33 | struct led_trigger_cpu { | 33 | struct led_trigger_cpu { |
34 | char name[MAX_NAME_LEN]; | 34 | char name[MAX_NAME_LEN]; |
35 | struct led_trigger *_trig; | 35 | struct led_trigger *_trig; |
36 | struct mutex lock; | ||
37 | int lock_is_inited; | ||
38 | }; | 36 | }; |
39 | 37 | ||
40 | static DEFINE_PER_CPU(struct led_trigger_cpu, cpu_trig); | 38 | static DEFINE_PER_CPU(struct led_trigger_cpu, cpu_trig); |
@@ -50,12 +48,6 @@ void ledtrig_cpu(enum cpu_led_event ledevt) | |||
50 | { | 48 | { |
51 | struct led_trigger_cpu *trig = &__get_cpu_var(cpu_trig); | 49 | struct led_trigger_cpu *trig = &__get_cpu_var(cpu_trig); |
52 | 50 | ||
53 | /* mutex lock should be initialized before calling mutex_call() */ | ||
54 | if (!trig->lock_is_inited) | ||
55 | return; | ||
56 | |||
57 | mutex_lock(&trig->lock); | ||
58 | |||
59 | /* Locate the correct CPU LED */ | 51 | /* Locate the correct CPU LED */ |
60 | switch (ledevt) { | 52 | switch (ledevt) { |
61 | case CPU_LED_IDLE_END: | 53 | case CPU_LED_IDLE_END: |
@@ -75,8 +67,6 @@ void ledtrig_cpu(enum cpu_led_event ledevt) | |||
75 | /* Will leave the LED as it is */ | 67 | /* Will leave the LED as it is */ |
76 | break; | 68 | break; |
77 | } | 69 | } |
78 | |||
79 | mutex_unlock(&trig->lock); | ||
80 | } | 70 | } |
81 | EXPORT_SYMBOL(ledtrig_cpu); | 71 | EXPORT_SYMBOL(ledtrig_cpu); |
82 | 72 | ||
@@ -117,14 +107,9 @@ static int __init ledtrig_cpu_init(void) | |||
117 | for_each_possible_cpu(cpu) { | 107 | for_each_possible_cpu(cpu) { |
118 | struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); | 108 | struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); |
119 | 109 | ||
120 | mutex_init(&trig->lock); | ||
121 | |||
122 | snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu); | 110 | snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu); |
123 | 111 | ||
124 | mutex_lock(&trig->lock); | ||
125 | led_trigger_register_simple(trig->name, &trig->_trig); | 112 | led_trigger_register_simple(trig->name, &trig->_trig); |
126 | trig->lock_is_inited = 1; | ||
127 | mutex_unlock(&trig->lock); | ||
128 | } | 113 | } |
129 | 114 | ||
130 | register_syscore_ops(&ledtrig_cpu_syscore_ops); | 115 | register_syscore_ops(&ledtrig_cpu_syscore_ops); |
@@ -142,15 +127,9 @@ static void __exit ledtrig_cpu_exit(void) | |||
142 | for_each_possible_cpu(cpu) { | 127 | for_each_possible_cpu(cpu) { |
143 | struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); | 128 | struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); |
144 | 129 | ||
145 | mutex_lock(&trig->lock); | ||
146 | |||
147 | led_trigger_unregister_simple(trig->_trig); | 130 | led_trigger_unregister_simple(trig->_trig); |
148 | trig->_trig = NULL; | 131 | trig->_trig = NULL; |
149 | memset(trig->name, 0, MAX_NAME_LEN); | 132 | memset(trig->name, 0, MAX_NAME_LEN); |
150 | trig->lock_is_inited = 0; | ||
151 | |||
152 | mutex_unlock(&trig->lock); | ||
153 | mutex_destroy(&trig->lock); | ||
154 | } | 133 | } |
155 | 134 | ||
156 | unregister_syscore_ops(&ledtrig_cpu_syscore_ops); | 135 | unregister_syscore_ops(&ledtrig_cpu_syscore_ops); |
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c index 660bbc528862..4d50da618166 100644 --- a/drivers/mmc/host/dw_mmc-exynos.c +++ b/drivers/mmc/host/dw_mmc-exynos.c | |||
@@ -208,7 +208,7 @@ static unsigned long exynos5250_dwmmc_caps[4] = { | |||
208 | MMC_CAP_CMD23, | 208 | MMC_CAP_CMD23, |
209 | }; | 209 | }; |
210 | 210 | ||
211 | static struct dw_mci_drv_data exynos5250_drv_data = { | 211 | static const struct dw_mci_drv_data exynos5250_drv_data = { |
212 | .caps = exynos5250_dwmmc_caps, | 212 | .caps = exynos5250_dwmmc_caps, |
213 | .init = dw_mci_exynos_priv_init, | 213 | .init = dw_mci_exynos_priv_init, |
214 | .setup_clock = dw_mci_exynos_setup_clock, | 214 | .setup_clock = dw_mci_exynos_setup_clock, |
@@ -220,14 +220,14 @@ static struct dw_mci_drv_data exynos5250_drv_data = { | |||
220 | 220 | ||
221 | static const struct of_device_id dw_mci_exynos_match[] = { | 221 | static const struct of_device_id dw_mci_exynos_match[] = { |
222 | { .compatible = "samsung,exynos5250-dw-mshc", | 222 | { .compatible = "samsung,exynos5250-dw-mshc", |
223 | .data = (void *)&exynos5250_drv_data, }, | 223 | .data = &exynos5250_drv_data, }, |
224 | {}, | 224 | {}, |
225 | }; | 225 | }; |
226 | MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match); | 226 | MODULE_DEVICE_TABLE(of, dw_mci_exynos_match); |
227 | 227 | ||
228 | int dw_mci_exynos_probe(struct platform_device *pdev) | 228 | int dw_mci_exynos_probe(struct platform_device *pdev) |
229 | { | 229 | { |
230 | struct dw_mci_drv_data *drv_data; | 230 | const struct dw_mci_drv_data *drv_data; |
231 | const struct of_device_id *match; | 231 | const struct of_device_id *match; |
232 | 232 | ||
233 | match = of_match_node(dw_mci_exynos_match, pdev->dev.of_node); | 233 | match = of_match_node(dw_mci_exynos_match, pdev->dev.of_node); |
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c index c960ca7ffbe6..917936bee5d5 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.c +++ b/drivers/mmc/host/dw_mmc-pltfm.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include "dw_mmc.h" | 24 | #include "dw_mmc.h" |
25 | 25 | ||
26 | int dw_mci_pltfm_register(struct platform_device *pdev, | 26 | int dw_mci_pltfm_register(struct platform_device *pdev, |
27 | struct dw_mci_drv_data *drv_data) | 27 | const struct dw_mci_drv_data *drv_data) |
28 | { | 28 | { |
29 | struct dw_mci *host; | 29 | struct dw_mci *host; |
30 | struct resource *regs; | 30 | struct resource *regs; |
@@ -50,8 +50,8 @@ int dw_mci_pltfm_register(struct platform_device *pdev, | |||
50 | if (!host->regs) | 50 | if (!host->regs) |
51 | return -ENOMEM; | 51 | return -ENOMEM; |
52 | 52 | ||
53 | if (host->drv_data->init) { | 53 | if (drv_data && drv_data->init) { |
54 | ret = host->drv_data->init(host); | 54 | ret = drv_data->init(host); |
55 | if (ret) | 55 | if (ret) |
56 | return ret; | 56 | return ret; |
57 | } | 57 | } |
diff --git a/drivers/mmc/host/dw_mmc-pltfm.h b/drivers/mmc/host/dw_mmc-pltfm.h index 301f24541fc2..2ac37b81de4d 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.h +++ b/drivers/mmc/host/dw_mmc-pltfm.h | |||
@@ -13,7 +13,7 @@ | |||
13 | #define _DW_MMC_PLTFM_H_ | 13 | #define _DW_MMC_PLTFM_H_ |
14 | 14 | ||
15 | extern int dw_mci_pltfm_register(struct platform_device *pdev, | 15 | extern int dw_mci_pltfm_register(struct platform_device *pdev, |
16 | struct dw_mci_drv_data *drv_data); | 16 | const struct dw_mci_drv_data *drv_data); |
17 | extern int __devexit dw_mci_pltfm_remove(struct platform_device *pdev); | 17 | extern int __devexit dw_mci_pltfm_remove(struct platform_device *pdev); |
18 | extern const struct dev_pm_ops dw_mci_pltfm_pmops; | 18 | extern const struct dev_pm_ops dw_mci_pltfm_pmops; |
19 | 19 | ||
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index c2828f35c3b8..c0667c8af2bd 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c | |||
@@ -232,6 +232,7 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) | |||
232 | { | 232 | { |
233 | struct mmc_data *data; | 233 | struct mmc_data *data; |
234 | struct dw_mci_slot *slot = mmc_priv(mmc); | 234 | struct dw_mci_slot *slot = mmc_priv(mmc); |
235 | struct dw_mci_drv_data *drv_data = slot->host->drv_data; | ||
235 | u32 cmdr; | 236 | u32 cmdr; |
236 | cmd->error = -EINPROGRESS; | 237 | cmd->error = -EINPROGRESS; |
237 | 238 | ||
@@ -261,8 +262,8 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) | |||
261 | cmdr |= SDMMC_CMD_DAT_WR; | 262 | cmdr |= SDMMC_CMD_DAT_WR; |
262 | } | 263 | } |
263 | 264 | ||
264 | if (slot->host->drv_data->prepare_command) | 265 | if (drv_data && drv_data->prepare_command) |
265 | slot->host->drv_data->prepare_command(slot->host, &cmdr); | 266 | drv_data->prepare_command(slot->host, &cmdr); |
266 | 267 | ||
267 | return cmdr; | 268 | return cmdr; |
268 | } | 269 | } |
@@ -434,7 +435,7 @@ static int dw_mci_idmac_init(struct dw_mci *host) | |||
434 | return 0; | 435 | return 0; |
435 | } | 436 | } |
436 | 437 | ||
437 | static struct dw_mci_dma_ops dw_mci_idmac_ops = { | 438 | static const struct dw_mci_dma_ops dw_mci_idmac_ops = { |
438 | .init = dw_mci_idmac_init, | 439 | .init = dw_mci_idmac_init, |
439 | .start = dw_mci_idmac_start_dma, | 440 | .start = dw_mci_idmac_start_dma, |
440 | .stop = dw_mci_idmac_stop_dma, | 441 | .stop = dw_mci_idmac_stop_dma, |
@@ -772,6 +773,7 @@ static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) | |||
772 | static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | 773 | static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
773 | { | 774 | { |
774 | struct dw_mci_slot *slot = mmc_priv(mmc); | 775 | struct dw_mci_slot *slot = mmc_priv(mmc); |
776 | struct dw_mci_drv_data *drv_data = slot->host->drv_data; | ||
775 | u32 regs; | 777 | u32 regs; |
776 | 778 | ||
777 | /* set default 1 bit mode */ | 779 | /* set default 1 bit mode */ |
@@ -807,8 +809,8 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
807 | slot->clock = ios->clock; | 809 | slot->clock = ios->clock; |
808 | } | 810 | } |
809 | 811 | ||
810 | if (slot->host->drv_data->set_ios) | 812 | if (drv_data && drv_data->set_ios) |
811 | slot->host->drv_data->set_ios(slot->host, ios); | 813 | drv_data->set_ios(slot->host, ios); |
812 | 814 | ||
813 | switch (ios->power_mode) { | 815 | switch (ios->power_mode) { |
814 | case MMC_POWER_UP: | 816 | case MMC_POWER_UP: |
@@ -1815,6 +1817,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
1815 | { | 1817 | { |
1816 | struct mmc_host *mmc; | 1818 | struct mmc_host *mmc; |
1817 | struct dw_mci_slot *slot; | 1819 | struct dw_mci_slot *slot; |
1820 | struct dw_mci_drv_data *drv_data = host->drv_data; | ||
1818 | int ctrl_id, ret; | 1821 | int ctrl_id, ret; |
1819 | u8 bus_width; | 1822 | u8 bus_width; |
1820 | 1823 | ||
@@ -1854,8 +1857,8 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
1854 | } else { | 1857 | } else { |
1855 | ctrl_id = to_platform_device(host->dev)->id; | 1858 | ctrl_id = to_platform_device(host->dev)->id; |
1856 | } | 1859 | } |
1857 | if (host->drv_data && host->drv_data->caps) | 1860 | if (drv_data && drv_data->caps) |
1858 | mmc->caps |= host->drv_data->caps[ctrl_id]; | 1861 | mmc->caps |= drv_data->caps[ctrl_id]; |
1859 | 1862 | ||
1860 | if (host->pdata->caps2) | 1863 | if (host->pdata->caps2) |
1861 | mmc->caps2 = host->pdata->caps2; | 1864 | mmc->caps2 = host->pdata->caps2; |
@@ -1867,10 +1870,10 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
1867 | else | 1870 | else |
1868 | bus_width = 1; | 1871 | bus_width = 1; |
1869 | 1872 | ||
1870 | if (host->drv_data->setup_bus) { | 1873 | if (drv_data && drv_data->setup_bus) { |
1871 | struct device_node *slot_np; | 1874 | struct device_node *slot_np; |
1872 | slot_np = dw_mci_of_find_slot_node(host->dev, slot->id); | 1875 | slot_np = dw_mci_of_find_slot_node(host->dev, slot->id); |
1873 | ret = host->drv_data->setup_bus(host, slot_np, bus_width); | 1876 | ret = drv_data->setup_bus(host, slot_np, bus_width); |
1874 | if (ret) | 1877 | if (ret) |
1875 | goto err_setup_bus; | 1878 | goto err_setup_bus; |
1876 | } | 1879 | } |
@@ -1968,7 +1971,7 @@ static void dw_mci_init_dma(struct dw_mci *host) | |||
1968 | /* Determine which DMA interface to use */ | 1971 | /* Determine which DMA interface to use */ |
1969 | #ifdef CONFIG_MMC_DW_IDMAC | 1972 | #ifdef CONFIG_MMC_DW_IDMAC |
1970 | host->dma_ops = &dw_mci_idmac_ops; | 1973 | host->dma_ops = &dw_mci_idmac_ops; |
1971 | dev_info(&host->dev, "Using internal DMA controller.\n"); | 1974 | dev_info(host->dev, "Using internal DMA controller.\n"); |
1972 | #endif | 1975 | #endif |
1973 | 1976 | ||
1974 | if (!host->dma_ops) | 1977 | if (!host->dma_ops) |
@@ -2035,6 +2038,7 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) | |||
2035 | struct dw_mci_board *pdata; | 2038 | struct dw_mci_board *pdata; |
2036 | struct device *dev = host->dev; | 2039 | struct device *dev = host->dev; |
2037 | struct device_node *np = dev->of_node; | 2040 | struct device_node *np = dev->of_node; |
2041 | struct dw_mci_drv_data *drv_data = host->drv_data; | ||
2038 | int idx, ret; | 2042 | int idx, ret; |
2039 | 2043 | ||
2040 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | 2044 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); |
@@ -2062,8 +2066,8 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) | |||
2062 | 2066 | ||
2063 | of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms); | 2067 | of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms); |
2064 | 2068 | ||
2065 | if (host->drv_data->parse_dt) { | 2069 | if (drv_data && drv_data->parse_dt) { |
2066 | ret = host->drv_data->parse_dt(host); | 2070 | ret = drv_data->parse_dt(host); |
2067 | if (ret) | 2071 | if (ret) |
2068 | return ERR_PTR(ret); | 2072 | return ERR_PTR(ret); |
2069 | } | 2073 | } |
@@ -2080,6 +2084,7 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) | |||
2080 | 2084 | ||
2081 | int dw_mci_probe(struct dw_mci *host) | 2085 | int dw_mci_probe(struct dw_mci *host) |
2082 | { | 2086 | { |
2087 | struct dw_mci_drv_data *drv_data = host->drv_data; | ||
2083 | int width, i, ret = 0; | 2088 | int width, i, ret = 0; |
2084 | u32 fifo_size; | 2089 | u32 fifo_size; |
2085 | int init_slots = 0; | 2090 | int init_slots = 0; |
@@ -2127,8 +2132,8 @@ int dw_mci_probe(struct dw_mci *host) | |||
2127 | else | 2132 | else |
2128 | host->bus_hz = clk_get_rate(host->ciu_clk); | 2133 | host->bus_hz = clk_get_rate(host->ciu_clk); |
2129 | 2134 | ||
2130 | if (host->drv_data->setup_clock) { | 2135 | if (drv_data && drv_data->setup_clock) { |
2131 | ret = host->drv_data->setup_clock(host); | 2136 | ret = drv_data->setup_clock(host); |
2132 | if (ret) { | 2137 | if (ret) { |
2133 | dev_err(host->dev, | 2138 | dev_err(host->dev, |
2134 | "implementation specific clock setup failed\n"); | 2139 | "implementation specific clock setup failed\n"); |
@@ -2228,6 +2233,21 @@ int dw_mci_probe(struct dw_mci *host) | |||
2228 | else | 2233 | else |
2229 | host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; | 2234 | host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; |
2230 | 2235 | ||
2236 | /* | ||
2237 | * Enable interrupts for command done, data over, data empty, card det, | ||
2238 | * receive ready and error such as transmit, receive timeout, crc error | ||
2239 | */ | ||
2240 | mci_writel(host, RINTSTS, 0xFFFFFFFF); | ||
2241 | mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | | ||
2242 | SDMMC_INT_TXDR | SDMMC_INT_RXDR | | ||
2243 | DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); | ||
2244 | mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ | ||
2245 | |||
2246 | dev_info(host->dev, "DW MMC controller at irq %d, " | ||
2247 | "%d bit host data width, " | ||
2248 | "%u deep fifo\n", | ||
2249 | host->irq, width, fifo_size); | ||
2250 | |||
2231 | /* We need at least one slot to succeed */ | 2251 | /* We need at least one slot to succeed */ |
2232 | for (i = 0; i < host->num_slots; i++) { | 2252 | for (i = 0; i < host->num_slots; i++) { |
2233 | ret = dw_mci_init_slot(host, i); | 2253 | ret = dw_mci_init_slot(host, i); |
@@ -2257,20 +2277,6 @@ int dw_mci_probe(struct dw_mci *host) | |||
2257 | else | 2277 | else |
2258 | host->data_offset = DATA_240A_OFFSET; | 2278 | host->data_offset = DATA_240A_OFFSET; |
2259 | 2279 | ||
2260 | /* | ||
2261 | * Enable interrupts for command done, data over, data empty, card det, | ||
2262 | * receive ready and error such as transmit, receive timeout, crc error | ||
2263 | */ | ||
2264 | mci_writel(host, RINTSTS, 0xFFFFFFFF); | ||
2265 | mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | | ||
2266 | SDMMC_INT_TXDR | SDMMC_INT_RXDR | | ||
2267 | DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); | ||
2268 | mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ | ||
2269 | |||
2270 | dev_info(host->dev, "DW MMC controller at irq %d, " | ||
2271 | "%d bit host data width, " | ||
2272 | "%u deep fifo\n", | ||
2273 | host->irq, width, fifo_size); | ||
2274 | if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) | 2280 | if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) |
2275 | dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n"); | 2281 | dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n"); |
2276 | 2282 | ||
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index 565c2e4fac75..6290b7f1ccfe 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c | |||
@@ -1134,4 +1134,4 @@ module_platform_driver(mxcmci_driver); | |||
1134 | MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); | 1134 | MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); |
1135 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); | 1135 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); |
1136 | MODULE_LICENSE("GPL"); | 1136 | MODULE_LICENSE("GPL"); |
1137 | MODULE_ALIAS("platform:imx-mmc"); | 1137 | MODULE_ALIAS("platform:mxc-mmc"); |
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 54bfd0cc106b..fedd258cc4ea 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c | |||
@@ -178,7 +178,8 @@ struct omap_hsmmc_host { | |||
178 | 178 | ||
179 | static int omap_hsmmc_card_detect(struct device *dev, int slot) | 179 | static int omap_hsmmc_card_detect(struct device *dev, int slot) |
180 | { | 180 | { |
181 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 181 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
182 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
182 | 183 | ||
183 | /* NOTE: assumes card detect signal is active-low */ | 184 | /* NOTE: assumes card detect signal is active-low */ |
184 | return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); | 185 | return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); |
@@ -186,7 +187,8 @@ static int omap_hsmmc_card_detect(struct device *dev, int slot) | |||
186 | 187 | ||
187 | static int omap_hsmmc_get_wp(struct device *dev, int slot) | 188 | static int omap_hsmmc_get_wp(struct device *dev, int slot) |
188 | { | 189 | { |
189 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 190 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
191 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
190 | 192 | ||
191 | /* NOTE: assumes write protect signal is active-high */ | 193 | /* NOTE: assumes write protect signal is active-high */ |
192 | return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); | 194 | return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); |
@@ -194,7 +196,8 @@ static int omap_hsmmc_get_wp(struct device *dev, int slot) | |||
194 | 196 | ||
195 | static int omap_hsmmc_get_cover_state(struct device *dev, int slot) | 197 | static int omap_hsmmc_get_cover_state(struct device *dev, int slot) |
196 | { | 198 | { |
197 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 199 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
200 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
198 | 201 | ||
199 | /* NOTE: assumes card detect signal is active-low */ | 202 | /* NOTE: assumes card detect signal is active-low */ |
200 | return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); | 203 | return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); |
@@ -204,7 +207,8 @@ static int omap_hsmmc_get_cover_state(struct device *dev, int slot) | |||
204 | 207 | ||
205 | static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) | 208 | static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) |
206 | { | 209 | { |
207 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 210 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
211 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
208 | 212 | ||
209 | disable_irq(mmc->slots[0].card_detect_irq); | 213 | disable_irq(mmc->slots[0].card_detect_irq); |
210 | return 0; | 214 | return 0; |
@@ -212,7 +216,8 @@ static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) | |||
212 | 216 | ||
213 | static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) | 217 | static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) |
214 | { | 218 | { |
215 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 219 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
220 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
216 | 221 | ||
217 | enable_irq(mmc->slots[0].card_detect_irq); | 222 | enable_irq(mmc->slots[0].card_detect_irq); |
218 | return 0; | 223 | return 0; |
@@ -2009,9 +2014,9 @@ static int __devexit omap_hsmmc_remove(struct platform_device *pdev) | |||
2009 | clk_put(host->dbclk); | 2014 | clk_put(host->dbclk); |
2010 | } | 2015 | } |
2011 | 2016 | ||
2012 | mmc_free_host(host->mmc); | 2017 | omap_hsmmc_gpio_free(host->pdata); |
2013 | iounmap(host->base); | 2018 | iounmap(host->base); |
2014 | omap_hsmmc_gpio_free(pdev->dev.platform_data); | 2019 | mmc_free_host(host->mmc); |
2015 | 2020 | ||
2016 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 2021 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
2017 | if (res) | 2022 | if (res) |
diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c index 90140eb03e36..8fd50a211037 100644 --- a/drivers/mmc/host/sdhci-dove.c +++ b/drivers/mmc/host/sdhci-dove.c | |||
@@ -19,6 +19,7 @@ | |||
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
20 | */ | 20 | */ |
21 | 21 | ||
22 | #include <linux/err.h> | ||
22 | #include <linux/io.h> | 23 | #include <linux/io.h> |
23 | #include <linux/clk.h> | 24 | #include <linux/clk.h> |
24 | #include <linux/err.h> | 25 | #include <linux/err.h> |
@@ -84,30 +85,32 @@ static int __devinit sdhci_dove_probe(struct platform_device *pdev) | |||
84 | struct sdhci_dove_priv *priv; | 85 | struct sdhci_dove_priv *priv; |
85 | int ret; | 86 | int ret; |
86 | 87 | ||
87 | ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata); | ||
88 | if (ret) | ||
89 | goto sdhci_dove_register_fail; | ||
90 | |||
91 | priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv), | 88 | priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv), |
92 | GFP_KERNEL); | 89 | GFP_KERNEL); |
93 | if (!priv) { | 90 | if (!priv) { |
94 | dev_err(&pdev->dev, "unable to allocate private data"); | 91 | dev_err(&pdev->dev, "unable to allocate private data"); |
95 | ret = -ENOMEM; | 92 | return -ENOMEM; |
96 | goto sdhci_dove_allocate_fail; | ||
97 | } | 93 | } |
98 | 94 | ||
95 | priv->clk = clk_get(&pdev->dev, NULL); | ||
96 | if (!IS_ERR(priv->clk)) | ||
97 | clk_prepare_enable(priv->clk); | ||
98 | |||
99 | ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata); | ||
100 | if (ret) | ||
101 | goto sdhci_dove_register_fail; | ||
102 | |||
99 | host = platform_get_drvdata(pdev); | 103 | host = platform_get_drvdata(pdev); |
100 | pltfm_host = sdhci_priv(host); | 104 | pltfm_host = sdhci_priv(host); |
101 | pltfm_host->priv = priv; | 105 | pltfm_host->priv = priv; |
102 | 106 | ||
103 | priv->clk = clk_get(&pdev->dev, NULL); | ||
104 | if (!IS_ERR(priv->clk)) | ||
105 | clk_prepare_enable(priv->clk); | ||
106 | return 0; | 107 | return 0; |
107 | 108 | ||
108 | sdhci_dove_allocate_fail: | ||
109 | sdhci_pltfm_unregister(pdev); | ||
110 | sdhci_dove_register_fail: | 109 | sdhci_dove_register_fail: |
110 | if (!IS_ERR(priv->clk)) { | ||
111 | clk_disable_unprepare(priv->clk); | ||
112 | clk_put(priv->clk); | ||
113 | } | ||
111 | return ret; | 114 | return ret; |
112 | } | 115 | } |
113 | 116 | ||
@@ -117,14 +120,13 @@ static int __devexit sdhci_dove_remove(struct platform_device *pdev) | |||
117 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); | 120 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
118 | struct sdhci_dove_priv *priv = pltfm_host->priv; | 121 | struct sdhci_dove_priv *priv = pltfm_host->priv; |
119 | 122 | ||
120 | if (priv->clk) { | 123 | sdhci_pltfm_unregister(pdev); |
121 | if (!IS_ERR(priv->clk)) { | 124 | |
122 | clk_disable_unprepare(priv->clk); | 125 | if (!IS_ERR(priv->clk)) { |
123 | clk_put(priv->clk); | 126 | clk_disable_unprepare(priv->clk); |
124 | } | 127 | clk_put(priv->clk); |
125 | devm_kfree(&pdev->dev, priv->clk); | ||
126 | } | 128 | } |
127 | return sdhci_pltfm_unregister(pdev); | 129 | return 0; |
128 | } | 130 | } |
129 | 131 | ||
130 | static const struct of_device_id sdhci_dove_of_match_table[] __devinitdata = { | 132 | static const struct of_device_id sdhci_dove_of_match_table[] __devinitdata = { |
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index ae5fcbfa1eef..63d219f57cae 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c | |||
@@ -169,6 +169,16 @@ static void esdhc_of_resume(struct sdhci_host *host) | |||
169 | } | 169 | } |
170 | #endif | 170 | #endif |
171 | 171 | ||
172 | static void esdhc_of_platform_init(struct sdhci_host *host) | ||
173 | { | ||
174 | u32 vvn; | ||
175 | |||
176 | vvn = in_be32(host->ioaddr + SDHCI_SLOT_INT_STATUS); | ||
177 | vvn = (vvn & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT; | ||
178 | if (vvn == VENDOR_V_22) | ||
179 | host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23; | ||
180 | } | ||
181 | |||
172 | static struct sdhci_ops sdhci_esdhc_ops = { | 182 | static struct sdhci_ops sdhci_esdhc_ops = { |
173 | .read_l = esdhc_readl, | 183 | .read_l = esdhc_readl, |
174 | .read_w = esdhc_readw, | 184 | .read_w = esdhc_readw, |
@@ -180,6 +190,7 @@ static struct sdhci_ops sdhci_esdhc_ops = { | |||
180 | .enable_dma = esdhc_of_enable_dma, | 190 | .enable_dma = esdhc_of_enable_dma, |
181 | .get_max_clock = esdhc_of_get_max_clock, | 191 | .get_max_clock = esdhc_of_get_max_clock, |
182 | .get_min_clock = esdhc_of_get_min_clock, | 192 | .get_min_clock = esdhc_of_get_min_clock, |
193 | .platform_init = esdhc_of_platform_init, | ||
183 | #ifdef CONFIG_PM | 194 | #ifdef CONFIG_PM |
184 | .platform_suspend = esdhc_of_suspend, | 195 | .platform_suspend = esdhc_of_suspend, |
185 | .platform_resume = esdhc_of_resume, | 196 | .platform_resume = esdhc_of_resume, |
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index 4bb74b042a06..04936f353ced 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c | |||
@@ -1196,7 +1196,7 @@ static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot( | |||
1196 | return ERR_PTR(-ENODEV); | 1196 | return ERR_PTR(-ENODEV); |
1197 | } | 1197 | } |
1198 | 1198 | ||
1199 | if (pci_resource_len(pdev, bar) != 0x100) { | 1199 | if (pci_resource_len(pdev, bar) < 0x100) { |
1200 | dev_err(&pdev->dev, "Invalid iomem size. You may " | 1200 | dev_err(&pdev->dev, "Invalid iomem size. You may " |
1201 | "experience problems.\n"); | 1201 | "experience problems.\n"); |
1202 | } | 1202 | } |
diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index 65551a9709cc..27164457f861 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c | |||
@@ -150,6 +150,13 @@ struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev, | |||
150 | goto err_remap; | 150 | goto err_remap; |
151 | } | 151 | } |
152 | 152 | ||
153 | /* | ||
154 | * Some platforms need to probe the controller to be able to | ||
155 | * determine which caps should be used. | ||
156 | */ | ||
157 | if (host->ops && host->ops->platform_init) | ||
158 | host->ops->platform_init(host); | ||
159 | |||
153 | platform_set_drvdata(pdev, host); | 160 | platform_set_drvdata(pdev, host); |
154 | 161 | ||
155 | return host; | 162 | return host; |
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 2903949594c6..a54dd5d7a5f9 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c | |||
@@ -211,8 +211,8 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) | |||
211 | if (ourhost->cur_clk != best_src) { | 211 | if (ourhost->cur_clk != best_src) { |
212 | struct clk *clk = ourhost->clk_bus[best_src]; | 212 | struct clk *clk = ourhost->clk_bus[best_src]; |
213 | 213 | ||
214 | clk_enable(clk); | 214 | clk_prepare_enable(clk); |
215 | clk_disable(ourhost->clk_bus[ourhost->cur_clk]); | 215 | clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]); |
216 | 216 | ||
217 | /* turn clock off to card before changing clock source */ | 217 | /* turn clock off to card before changing clock source */ |
218 | writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); | 218 | writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); |
@@ -607,7 +607,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
607 | } | 607 | } |
608 | 608 | ||
609 | /* enable the local io clock and keep it running for the moment. */ | 609 | /* enable the local io clock and keep it running for the moment. */ |
610 | clk_enable(sc->clk_io); | 610 | clk_prepare_enable(sc->clk_io); |
611 | 611 | ||
612 | for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | 612 | for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
613 | struct clk *clk; | 613 | struct clk *clk; |
@@ -638,7 +638,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
638 | } | 638 | } |
639 | 639 | ||
640 | #ifndef CONFIG_PM_RUNTIME | 640 | #ifndef CONFIG_PM_RUNTIME |
641 | clk_enable(sc->clk_bus[sc->cur_clk]); | 641 | clk_prepare_enable(sc->clk_bus[sc->cur_clk]); |
642 | #endif | 642 | #endif |
643 | 643 | ||
644 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 644 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
@@ -747,13 +747,14 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
747 | sdhci_s3c_setup_card_detect_gpio(sc); | 747 | sdhci_s3c_setup_card_detect_gpio(sc); |
748 | 748 | ||
749 | #ifdef CONFIG_PM_RUNTIME | 749 | #ifdef CONFIG_PM_RUNTIME |
750 | clk_disable(sc->clk_io); | 750 | if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL) |
751 | clk_disable_unprepare(sc->clk_io); | ||
751 | #endif | 752 | #endif |
752 | return 0; | 753 | return 0; |
753 | 754 | ||
754 | err_req_regs: | 755 | err_req_regs: |
755 | #ifndef CONFIG_PM_RUNTIME | 756 | #ifndef CONFIG_PM_RUNTIME |
756 | clk_disable(sc->clk_bus[sc->cur_clk]); | 757 | clk_disable_unprepare(sc->clk_bus[sc->cur_clk]); |
757 | #endif | 758 | #endif |
758 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | 759 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
759 | if (sc->clk_bus[ptr]) { | 760 | if (sc->clk_bus[ptr]) { |
@@ -762,7 +763,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
762 | } | 763 | } |
763 | 764 | ||
764 | err_no_busclks: | 765 | err_no_busclks: |
765 | clk_disable(sc->clk_io); | 766 | clk_disable_unprepare(sc->clk_io); |
766 | clk_put(sc->clk_io); | 767 | clk_put(sc->clk_io); |
767 | 768 | ||
768 | err_io_clk: | 769 | err_io_clk: |
@@ -794,7 +795,8 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev) | |||
794 | gpio_free(sc->ext_cd_gpio); | 795 | gpio_free(sc->ext_cd_gpio); |
795 | 796 | ||
796 | #ifdef CONFIG_PM_RUNTIME | 797 | #ifdef CONFIG_PM_RUNTIME |
797 | clk_enable(sc->clk_io); | 798 | if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL) |
799 | clk_prepare_enable(sc->clk_io); | ||
798 | #endif | 800 | #endif |
799 | sdhci_remove_host(host, 1); | 801 | sdhci_remove_host(host, 1); |
800 | 802 | ||
@@ -802,14 +804,14 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev) | |||
802 | pm_runtime_disable(&pdev->dev); | 804 | pm_runtime_disable(&pdev->dev); |
803 | 805 | ||
804 | #ifndef CONFIG_PM_RUNTIME | 806 | #ifndef CONFIG_PM_RUNTIME |
805 | clk_disable(sc->clk_bus[sc->cur_clk]); | 807 | clk_disable_unprepare(sc->clk_bus[sc->cur_clk]); |
806 | #endif | 808 | #endif |
807 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | 809 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
808 | if (sc->clk_bus[ptr]) { | 810 | if (sc->clk_bus[ptr]) { |
809 | clk_put(sc->clk_bus[ptr]); | 811 | clk_put(sc->clk_bus[ptr]); |
810 | } | 812 | } |
811 | } | 813 | } |
812 | clk_disable(sc->clk_io); | 814 | clk_disable_unprepare(sc->clk_io); |
813 | clk_put(sc->clk_io); | 815 | clk_put(sc->clk_io); |
814 | 816 | ||
815 | if (pdev->dev.of_node) { | 817 | if (pdev->dev.of_node) { |
@@ -849,8 +851,8 @@ static int sdhci_s3c_runtime_suspend(struct device *dev) | |||
849 | 851 | ||
850 | ret = sdhci_runtime_suspend_host(host); | 852 | ret = sdhci_runtime_suspend_host(host); |
851 | 853 | ||
852 | clk_disable(ourhost->clk_bus[ourhost->cur_clk]); | 854 | clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]); |
853 | clk_disable(busclk); | 855 | clk_disable_unprepare(busclk); |
854 | return ret; | 856 | return ret; |
855 | } | 857 | } |
856 | 858 | ||
@@ -861,8 +863,8 @@ static int sdhci_s3c_runtime_resume(struct device *dev) | |||
861 | struct clk *busclk = ourhost->clk_io; | 863 | struct clk *busclk = ourhost->clk_io; |
862 | int ret; | 864 | int ret; |
863 | 865 | ||
864 | clk_enable(busclk); | 866 | clk_prepare_enable(busclk); |
865 | clk_enable(ourhost->clk_bus[ourhost->cur_clk]); | 867 | clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]); |
866 | ret = sdhci_runtime_resume_host(host); | 868 | ret = sdhci_runtime_resume_host(host); |
867 | return ret; | 869 | return ret; |
868 | } | 870 | } |
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 7922adb42386..c7851c0aabce 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c | |||
@@ -1315,16 +1315,19 @@ static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) | |||
1315 | */ | 1315 | */ |
1316 | if ((host->flags & SDHCI_NEEDS_RETUNING) && | 1316 | if ((host->flags & SDHCI_NEEDS_RETUNING) && |
1317 | !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { | 1317 | !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { |
1318 | /* eMMC uses cmd21 while sd and sdio use cmd19 */ | 1318 | if (mmc->card) { |
1319 | tuning_opcode = mmc->card->type == MMC_TYPE_MMC ? | 1319 | /* eMMC uses cmd21 but sd and sdio use cmd19 */ |
1320 | MMC_SEND_TUNING_BLOCK_HS200 : | 1320 | tuning_opcode = |
1321 | MMC_SEND_TUNING_BLOCK; | 1321 | mmc->card->type == MMC_TYPE_MMC ? |
1322 | spin_unlock_irqrestore(&host->lock, flags); | 1322 | MMC_SEND_TUNING_BLOCK_HS200 : |
1323 | sdhci_execute_tuning(mmc, tuning_opcode); | 1323 | MMC_SEND_TUNING_BLOCK; |
1324 | spin_lock_irqsave(&host->lock, flags); | 1324 | spin_unlock_irqrestore(&host->lock, flags); |
1325 | 1325 | sdhci_execute_tuning(mmc, tuning_opcode); | |
1326 | /* Restore original mmc_request structure */ | 1326 | spin_lock_irqsave(&host->lock, flags); |
1327 | host->mrq = mrq; | 1327 | |
1328 | /* Restore original mmc_request structure */ | ||
1329 | host->mrq = mrq; | ||
1330 | } | ||
1328 | } | 1331 | } |
1329 | 1332 | ||
1330 | if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) | 1333 | if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) |
@@ -2837,6 +2840,9 @@ int sdhci_add_host(struct sdhci_host *host) | |||
2837 | if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) | 2840 | if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) |
2838 | mmc->caps |= MMC_CAP_4_BIT_DATA; | 2841 | mmc->caps |= MMC_CAP_4_BIT_DATA; |
2839 | 2842 | ||
2843 | if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23) | ||
2844 | mmc->caps &= ~MMC_CAP_CMD23; | ||
2845 | |||
2840 | if (caps[0] & SDHCI_CAN_DO_HISPD) | 2846 | if (caps[0] & SDHCI_CAN_DO_HISPD) |
2841 | mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; | 2847 | mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; |
2842 | 2848 | ||
@@ -2846,9 +2852,12 @@ int sdhci_add_host(struct sdhci_host *host) | |||
2846 | 2852 | ||
2847 | /* If vqmmc regulator and no 1.8V signalling, then there's no UHS */ | 2853 | /* If vqmmc regulator and no 1.8V signalling, then there's no UHS */ |
2848 | host->vqmmc = regulator_get(mmc_dev(mmc), "vqmmc"); | 2854 | host->vqmmc = regulator_get(mmc_dev(mmc), "vqmmc"); |
2849 | if (IS_ERR(host->vqmmc)) { | 2855 | if (IS_ERR_OR_NULL(host->vqmmc)) { |
2850 | pr_info("%s: no vqmmc regulator found\n", mmc_hostname(mmc)); | 2856 | if (PTR_ERR(host->vqmmc) < 0) { |
2851 | host->vqmmc = NULL; | 2857 | pr_info("%s: no vqmmc regulator found\n", |
2858 | mmc_hostname(mmc)); | ||
2859 | host->vqmmc = NULL; | ||
2860 | } | ||
2852 | } | 2861 | } |
2853 | else if (regulator_is_supported_voltage(host->vqmmc, 1800000, 1800000)) | 2862 | else if (regulator_is_supported_voltage(host->vqmmc, 1800000, 1800000)) |
2854 | regulator_enable(host->vqmmc); | 2863 | regulator_enable(host->vqmmc); |
@@ -2904,9 +2913,12 @@ int sdhci_add_host(struct sdhci_host *host) | |||
2904 | ocr_avail = 0; | 2913 | ocr_avail = 0; |
2905 | 2914 | ||
2906 | host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); | 2915 | host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); |
2907 | if (IS_ERR(host->vmmc)) { | 2916 | if (IS_ERR_OR_NULL(host->vmmc)) { |
2908 | pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); | 2917 | if (PTR_ERR(host->vmmc) < 0) { |
2909 | host->vmmc = NULL; | 2918 | pr_info("%s: no vmmc regulator found\n", |
2919 | mmc_hostname(mmc)); | ||
2920 | host->vmmc = NULL; | ||
2921 | } | ||
2910 | } else | 2922 | } else |
2911 | regulator_enable(host->vmmc); | 2923 | regulator_enable(host->vmmc); |
2912 | 2924 | ||
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 97653ea8942b..71a4a7ed46c5 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h | |||
@@ -278,6 +278,7 @@ struct sdhci_ops { | |||
278 | void (*hw_reset)(struct sdhci_host *host); | 278 | void (*hw_reset)(struct sdhci_host *host); |
279 | void (*platform_suspend)(struct sdhci_host *host); | 279 | void (*platform_suspend)(struct sdhci_host *host); |
280 | void (*platform_resume)(struct sdhci_host *host); | 280 | void (*platform_resume)(struct sdhci_host *host); |
281 | void (*platform_init)(struct sdhci_host *host); | ||
281 | }; | 282 | }; |
282 | 283 | ||
283 | #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS | 284 | #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS |
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c index 11d2bc3b51d5..d25bc97dc5c6 100644 --- a/drivers/mmc/host/sh_mmcif.c +++ b/drivers/mmc/host/sh_mmcif.c | |||
@@ -1466,9 +1466,9 @@ static int __devexit sh_mmcif_remove(struct platform_device *pdev) | |||
1466 | 1466 | ||
1467 | platform_set_drvdata(pdev, NULL); | 1467 | platform_set_drvdata(pdev, NULL); |
1468 | 1468 | ||
1469 | clk_disable(host->hclk); | ||
1469 | mmc_free_host(host->mmc); | 1470 | mmc_free_host(host->mmc); |
1470 | pm_runtime_put_sync(&pdev->dev); | 1471 | pm_runtime_put_sync(&pdev->dev); |
1471 | clk_disable(host->hclk); | ||
1472 | pm_runtime_disable(&pdev->dev); | 1472 | pm_runtime_disable(&pdev->dev); |
1473 | 1473 | ||
1474 | return 0; | 1474 | return 0; |
diff --git a/drivers/net/ethernet/jme.c b/drivers/net/ethernet/jme.c index 92317e9c0f73..60ac46f4ac08 100644 --- a/drivers/net/ethernet/jme.c +++ b/drivers/net/ethernet/jme.c | |||
@@ -1860,10 +1860,14 @@ jme_open(struct net_device *netdev) | |||
1860 | jme_clear_pm(jme); | 1860 | jme_clear_pm(jme); |
1861 | JME_NAPI_ENABLE(jme); | 1861 | JME_NAPI_ENABLE(jme); |
1862 | 1862 | ||
1863 | tasklet_enable(&jme->linkch_task); | 1863 | tasklet_init(&jme->linkch_task, jme_link_change_tasklet, |
1864 | tasklet_enable(&jme->txclean_task); | 1864 | (unsigned long) jme); |
1865 | tasklet_hi_enable(&jme->rxclean_task); | 1865 | tasklet_init(&jme->txclean_task, jme_tx_clean_tasklet, |
1866 | tasklet_hi_enable(&jme->rxempty_task); | 1866 | (unsigned long) jme); |
1867 | tasklet_init(&jme->rxclean_task, jme_rx_clean_tasklet, | ||
1868 | (unsigned long) jme); | ||
1869 | tasklet_init(&jme->rxempty_task, jme_rx_empty_tasklet, | ||
1870 | (unsigned long) jme); | ||
1867 | 1871 | ||
1868 | rc = jme_request_irq(jme); | 1872 | rc = jme_request_irq(jme); |
1869 | if (rc) | 1873 | if (rc) |
@@ -3079,22 +3083,6 @@ jme_init_one(struct pci_dev *pdev, | |||
3079 | tasklet_init(&jme->pcc_task, | 3083 | tasklet_init(&jme->pcc_task, |
3080 | jme_pcc_tasklet, | 3084 | jme_pcc_tasklet, |
3081 | (unsigned long) jme); | 3085 | (unsigned long) jme); |
3082 | tasklet_init(&jme->linkch_task, | ||
3083 | jme_link_change_tasklet, | ||
3084 | (unsigned long) jme); | ||
3085 | tasklet_init(&jme->txclean_task, | ||
3086 | jme_tx_clean_tasklet, | ||
3087 | (unsigned long) jme); | ||
3088 | tasklet_init(&jme->rxclean_task, | ||
3089 | jme_rx_clean_tasklet, | ||
3090 | (unsigned long) jme); | ||
3091 | tasklet_init(&jme->rxempty_task, | ||
3092 | jme_rx_empty_tasklet, | ||
3093 | (unsigned long) jme); | ||
3094 | tasklet_disable_nosync(&jme->linkch_task); | ||
3095 | tasklet_disable_nosync(&jme->txclean_task); | ||
3096 | tasklet_disable_nosync(&jme->rxclean_task); | ||
3097 | tasklet_disable_nosync(&jme->rxempty_task); | ||
3098 | jme->dpi.cur = PCC_P1; | 3086 | jme->dpi.cur = PCC_P1; |
3099 | 3087 | ||
3100 | jme->reg_ghc = 0; | 3088 | jme->reg_ghc = 0; |
diff --git a/drivers/net/ethernet/micrel/ksz884x.c b/drivers/net/ethernet/micrel/ksz884x.c index e4ba868e232c..d16ef24e622f 100644 --- a/drivers/net/ethernet/micrel/ksz884x.c +++ b/drivers/net/ethernet/micrel/ksz884x.c | |||
@@ -5459,8 +5459,10 @@ static int prepare_hardware(struct net_device *dev) | |||
5459 | rc = request_irq(dev->irq, netdev_intr, IRQF_SHARED, dev->name, dev); | 5459 | rc = request_irq(dev->irq, netdev_intr, IRQF_SHARED, dev->name, dev); |
5460 | if (rc) | 5460 | if (rc) |
5461 | return rc; | 5461 | return rc; |
5462 | tasklet_enable(&hw_priv->rx_tasklet); | 5462 | tasklet_init(&hw_priv->rx_tasklet, rx_proc_task, |
5463 | tasklet_enable(&hw_priv->tx_tasklet); | 5463 | (unsigned long) hw_priv); |
5464 | tasklet_init(&hw_priv->tx_tasklet, tx_proc_task, | ||
5465 | (unsigned long) hw_priv); | ||
5464 | 5466 | ||
5465 | hw->promiscuous = 0; | 5467 | hw->promiscuous = 0; |
5466 | hw->all_multi = 0; | 5468 | hw->all_multi = 0; |
@@ -7033,16 +7035,6 @@ static int __devinit pcidev_init(struct pci_dev *pdev, | |||
7033 | spin_lock_init(&hw_priv->hwlock); | 7035 | spin_lock_init(&hw_priv->hwlock); |
7034 | mutex_init(&hw_priv->lock); | 7036 | mutex_init(&hw_priv->lock); |
7035 | 7037 | ||
7036 | /* tasklet is enabled. */ | ||
7037 | tasklet_init(&hw_priv->rx_tasklet, rx_proc_task, | ||
7038 | (unsigned long) hw_priv); | ||
7039 | tasklet_init(&hw_priv->tx_tasklet, tx_proc_task, | ||
7040 | (unsigned long) hw_priv); | ||
7041 | |||
7042 | /* tasklet_enable will decrement the atomic counter. */ | ||
7043 | tasklet_disable(&hw_priv->rx_tasklet); | ||
7044 | tasklet_disable(&hw_priv->tx_tasklet); | ||
7045 | |||
7046 | for (i = 0; i < TOTAL_PORT_NUM; i++) | 7038 | for (i = 0; i < TOTAL_PORT_NUM; i++) |
7047 | init_waitqueue_head(&hw_priv->counter[i].counter); | 7039 | init_waitqueue_head(&hw_priv->counter[i].counter); |
7048 | 7040 | ||
diff --git a/drivers/net/ethernet/smsc/smsc911x.c b/drivers/net/ethernet/smsc/smsc911x.c index 62d1baf111ea..c53c0f4e2ce3 100644 --- a/drivers/net/ethernet/smsc/smsc911x.c +++ b/drivers/net/ethernet/smsc/smsc911x.c | |||
@@ -2110,7 +2110,7 @@ static void __devinit smsc911x_read_mac_address(struct net_device *dev) | |||
2110 | static int __devinit smsc911x_init(struct net_device *dev) | 2110 | static int __devinit smsc911x_init(struct net_device *dev) |
2111 | { | 2111 | { |
2112 | struct smsc911x_data *pdata = netdev_priv(dev); | 2112 | struct smsc911x_data *pdata = netdev_priv(dev); |
2113 | unsigned int byte_test; | 2113 | unsigned int byte_test, mask; |
2114 | unsigned int to = 100; | 2114 | unsigned int to = 100; |
2115 | 2115 | ||
2116 | SMSC_TRACE(pdata, probe, "Driver Parameters:"); | 2116 | SMSC_TRACE(pdata, probe, "Driver Parameters:"); |
@@ -2130,9 +2130,22 @@ static int __devinit smsc911x_init(struct net_device *dev) | |||
2130 | /* | 2130 | /* |
2131 | * poll the READY bit in PMT_CTRL. Any other access to the device is | 2131 | * poll the READY bit in PMT_CTRL. Any other access to the device is |
2132 | * forbidden while this bit isn't set. Try for 100ms | 2132 | * forbidden while this bit isn't set. Try for 100ms |
2133 | * | ||
2134 | * Note that this test is done before the WORD_SWAP register is | ||
2135 | * programmed. So in some configurations the READY bit is at 16 before | ||
2136 | * WORD_SWAP is written to. This issue is worked around by waiting | ||
2137 | * until either bit 0 or bit 16 gets set in PMT_CTRL. | ||
2138 | * | ||
2139 | * SMSC has confirmed that checking bit 16 (marked as reserved in | ||
2140 | * the datasheet) is fine since these bits "will either never be set | ||
2141 | * or can only go high after READY does (so also indicate the device | ||
2142 | * is ready)". | ||
2133 | */ | 2143 | */ |
2134 | while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to) | 2144 | |
2145 | mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_); | ||
2146 | while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to) | ||
2135 | udelay(1000); | 2147 | udelay(1000); |
2148 | |||
2136 | if (to == 0) { | 2149 | if (to == 0) { |
2137 | pr_err("Device not READY in 100ms aborting\n"); | 2150 | pr_err("Device not READY in 100ms aborting\n"); |
2138 | return -ENODEV; | 2151 | return -ENODEV; |
diff --git a/drivers/net/ethernet/tile/tilegx.c b/drivers/net/ethernet/tile/tilegx.c index 4e9810013850..66e025ad5df1 100644 --- a/drivers/net/ethernet/tile/tilegx.c +++ b/drivers/net/ethernet/tile/tilegx.c | |||
@@ -917,7 +917,7 @@ static int tile_net_setup_interrupts(struct net_device *dev) | |||
917 | ingress_irq = rc; | 917 | ingress_irq = rc; |
918 | tile_irq_activate(ingress_irq, TILE_IRQ_PERCPU); | 918 | tile_irq_activate(ingress_irq, TILE_IRQ_PERCPU); |
919 | rc = request_irq(ingress_irq, tile_net_handle_ingress_irq, | 919 | rc = request_irq(ingress_irq, tile_net_handle_ingress_irq, |
920 | 0, NULL, NULL); | 920 | 0, "tile_net", NULL); |
921 | if (rc != 0) { | 921 | if (rc != 0) { |
922 | netdev_err(dev, "request_irq failed: %d\n", rc); | 922 | netdev_err(dev, "request_irq failed: %d\n", rc); |
923 | destroy_irq(ingress_irq); | 923 | destroy_irq(ingress_irq); |
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c index 1d04754a6637..77e6db9dcfed 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c | |||
@@ -942,6 +942,10 @@ static int axienet_open(struct net_device *ndev) | |||
942 | phy_start(lp->phy_dev); | 942 | phy_start(lp->phy_dev); |
943 | } | 943 | } |
944 | 944 | ||
945 | /* Enable tasklets for Axi DMA error handling */ | ||
946 | tasklet_init(&lp->dma_err_tasklet, axienet_dma_err_handler, | ||
947 | (unsigned long) lp); | ||
948 | |||
945 | /* Enable interrupts for Axi DMA Tx */ | 949 | /* Enable interrupts for Axi DMA Tx */ |
946 | ret = request_irq(lp->tx_irq, axienet_tx_irq, 0, ndev->name, ndev); | 950 | ret = request_irq(lp->tx_irq, axienet_tx_irq, 0, ndev->name, ndev); |
947 | if (ret) | 951 | if (ret) |
@@ -950,8 +954,7 @@ static int axienet_open(struct net_device *ndev) | |||
950 | ret = request_irq(lp->rx_irq, axienet_rx_irq, 0, ndev->name, ndev); | 954 | ret = request_irq(lp->rx_irq, axienet_rx_irq, 0, ndev->name, ndev); |
951 | if (ret) | 955 | if (ret) |
952 | goto err_rx_irq; | 956 | goto err_rx_irq; |
953 | /* Enable tasklets for Axi DMA error handling */ | 957 | |
954 | tasklet_enable(&lp->dma_err_tasklet); | ||
955 | return 0; | 958 | return 0; |
956 | 959 | ||
957 | err_rx_irq: | 960 | err_rx_irq: |
@@ -960,6 +963,7 @@ err_tx_irq: | |||
960 | if (lp->phy_dev) | 963 | if (lp->phy_dev) |
961 | phy_disconnect(lp->phy_dev); | 964 | phy_disconnect(lp->phy_dev); |
962 | lp->phy_dev = NULL; | 965 | lp->phy_dev = NULL; |
966 | tasklet_kill(&lp->dma_err_tasklet); | ||
963 | dev_err(lp->dev, "request_irq() failed\n"); | 967 | dev_err(lp->dev, "request_irq() failed\n"); |
964 | return ret; | 968 | return ret; |
965 | } | 969 | } |
@@ -1613,10 +1617,6 @@ static int __devinit axienet_of_probe(struct platform_device *op) | |||
1613 | goto err_iounmap_2; | 1617 | goto err_iounmap_2; |
1614 | } | 1618 | } |
1615 | 1619 | ||
1616 | tasklet_init(&lp->dma_err_tasklet, axienet_dma_err_handler, | ||
1617 | (unsigned long) lp); | ||
1618 | tasklet_disable(&lp->dma_err_tasklet); | ||
1619 | |||
1620 | return 0; | 1620 | return 0; |
1621 | 1621 | ||
1622 | err_iounmap_2: | 1622 | err_iounmap_2: |
diff --git a/drivers/net/phy/mdio-bitbang.c b/drivers/net/phy/mdio-bitbang.c index 6428fcbbdd4b..daec9b05d168 100644 --- a/drivers/net/phy/mdio-bitbang.c +++ b/drivers/net/phy/mdio-bitbang.c | |||
@@ -234,7 +234,6 @@ void free_mdio_bitbang(struct mii_bus *bus) | |||
234 | struct mdiobb_ctrl *ctrl = bus->priv; | 234 | struct mdiobb_ctrl *ctrl = bus->priv; |
235 | 235 | ||
236 | module_put(ctrl->ops->owner); | 236 | module_put(ctrl->ops->owner); |
237 | mdiobus_unregister(bus); | ||
238 | mdiobus_free(bus); | 237 | mdiobus_free(bus); |
239 | } | 238 | } |
240 | EXPORT_SYMBOL(free_mdio_bitbang); | 239 | EXPORT_SYMBOL(free_mdio_bitbang); |
diff --git a/drivers/net/usb/cdc_ncm.c b/drivers/net/usb/cdc_ncm.c index ddc7b8880f60..d38bc20a60e2 100644 --- a/drivers/net/usb/cdc_ncm.c +++ b/drivers/net/usb/cdc_ncm.c | |||
@@ -440,10 +440,12 @@ advance: | |||
440 | ((!ctx->mbim_desc) && ((ctx->ether_desc == NULL) || (ctx->control != intf)))) | 440 | ((!ctx->mbim_desc) && ((ctx->ether_desc == NULL) || (ctx->control != intf)))) |
441 | goto error; | 441 | goto error; |
442 | 442 | ||
443 | /* claim interfaces, if any */ | 443 | /* claim data interface, if different from control */ |
444 | temp = usb_driver_claim_interface(driver, ctx->data, dev); | 444 | if (ctx->data != ctx->control) { |
445 | if (temp) | 445 | temp = usb_driver_claim_interface(driver, ctx->data, dev); |
446 | goto error; | 446 | if (temp) |
447 | goto error; | ||
448 | } | ||
447 | 449 | ||
448 | iface_no = ctx->data->cur_altsetting->desc.bInterfaceNumber; | 450 | iface_no = ctx->data->cur_altsetting->desc.bInterfaceNumber; |
449 | 451 | ||
@@ -519,6 +521,10 @@ void cdc_ncm_unbind(struct usbnet *dev, struct usb_interface *intf) | |||
519 | 521 | ||
520 | tasklet_kill(&ctx->bh); | 522 | tasklet_kill(&ctx->bh); |
521 | 523 | ||
524 | /* handle devices with combined control and data interface */ | ||
525 | if (ctx->control == ctx->data) | ||
526 | ctx->data = NULL; | ||
527 | |||
522 | /* disconnect master --> disconnect slave */ | 528 | /* disconnect master --> disconnect slave */ |
523 | if (intf == ctx->control && ctx->data) { | 529 | if (intf == ctx->control && ctx->data) { |
524 | usb_set_intfdata(ctx->data, NULL); | 530 | usb_set_intfdata(ctx->data, NULL); |
@@ -1186,6 +1192,14 @@ static const struct usb_device_id cdc_devs[] = { | |||
1186 | .driver_info = (unsigned long) &wwan_info, | 1192 | .driver_info = (unsigned long) &wwan_info, |
1187 | }, | 1193 | }, |
1188 | 1194 | ||
1195 | /* Huawei NCM devices disguised as vendor specific */ | ||
1196 | { USB_VENDOR_AND_INTERFACE_INFO(0x12d1, 0xff, 0x02, 0x16), | ||
1197 | .driver_info = (unsigned long)&wwan_info, | ||
1198 | }, | ||
1199 | { USB_VENDOR_AND_INTERFACE_INFO(0x12d1, 0xff, 0x02, 0x46), | ||
1200 | .driver_info = (unsigned long)&wwan_info, | ||
1201 | }, | ||
1202 | |||
1189 | /* Generic CDC-NCM devices */ | 1203 | /* Generic CDC-NCM devices */ |
1190 | { USB_INTERFACE_INFO(USB_CLASS_COMM, | 1204 | { USB_INTERFACE_INFO(USB_CLASS_COMM, |
1191 | USB_CDC_SUBCLASS_NCM, USB_CDC_PROTO_NONE), | 1205 | USB_CDC_SUBCLASS_NCM, USB_CDC_PROTO_NONE), |
diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c index e07f70b5f39c..e083f5371136 100644 --- a/drivers/net/usb/smsc95xx.c +++ b/drivers/net/usb/smsc95xx.c | |||
@@ -203,7 +203,7 @@ static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) | |||
203 | /* set the address, index & direction (read from PHY) */ | 203 | /* set the address, index & direction (read from PHY) */ |
204 | phy_id &= dev->mii.phy_id_mask; | 204 | phy_id &= dev->mii.phy_id_mask; |
205 | idx &= dev->mii.reg_num_mask; | 205 | idx &= dev->mii.reg_num_mask; |
206 | addr = (phy_id << 11) | (idx << 6) | MII_READ_; | 206 | addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_; |
207 | ret = smsc95xx_write_reg(dev, MII_ADDR, addr); | 207 | ret = smsc95xx_write_reg(dev, MII_ADDR, addr); |
208 | check_warn_goto_done(ret, "Error writing MII_ADDR"); | 208 | check_warn_goto_done(ret, "Error writing MII_ADDR"); |
209 | 209 | ||
@@ -240,7 +240,7 @@ static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, | |||
240 | /* set the address, index & direction (write to PHY) */ | 240 | /* set the address, index & direction (write to PHY) */ |
241 | phy_id &= dev->mii.phy_id_mask; | 241 | phy_id &= dev->mii.phy_id_mask; |
242 | idx &= dev->mii.reg_num_mask; | 242 | idx &= dev->mii.reg_num_mask; |
243 | addr = (phy_id << 11) | (idx << 6) | MII_WRITE_; | 243 | addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_; |
244 | ret = smsc95xx_write_reg(dev, MII_ADDR, addr); | 244 | ret = smsc95xx_write_reg(dev, MII_ADDR, addr); |
245 | check_warn_goto_done(ret, "Error writing MII_ADDR"); | 245 | check_warn_goto_done(ret, "Error writing MII_ADDR"); |
246 | 246 | ||
diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c index 9814d67237f1..6898a7932cff 100644 --- a/drivers/net/vxlan.c +++ b/drivers/net/vxlan.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * VXLAN: Virtual eXtensiable Local Area Network | 2 | * VXLAN: Virtual eXtensible Local Area Network |
3 | * | 3 | * |
4 | * Copyright (c) 2012 Vyatta Inc. | 4 | * Copyright (c) 2012 Vyatta Inc. |
5 | * | 5 | * |
@@ -50,8 +50,8 @@ | |||
50 | 50 | ||
51 | #define VXLAN_N_VID (1u << 24) | 51 | #define VXLAN_N_VID (1u << 24) |
52 | #define VXLAN_VID_MASK (VXLAN_N_VID - 1) | 52 | #define VXLAN_VID_MASK (VXLAN_N_VID - 1) |
53 | /* VLAN + IP header + UDP + VXLAN */ | 53 | /* IP header + UDP + VXLAN + Ethernet header */ |
54 | #define VXLAN_HEADROOM (4 + 20 + 8 + 8) | 54 | #define VXLAN_HEADROOM (20 + 8 + 8 + 14) |
55 | 55 | ||
56 | #define VXLAN_FLAGS 0x08000000 /* struct vxlanhdr.vx_flags required value. */ | 56 | #define VXLAN_FLAGS 0x08000000 /* struct vxlanhdr.vx_flags required value. */ |
57 | 57 | ||
@@ -1102,6 +1102,10 @@ static int vxlan_newlink(struct net *net, struct net_device *dev, | |||
1102 | 1102 | ||
1103 | if (!tb[IFLA_MTU]) | 1103 | if (!tb[IFLA_MTU]) |
1104 | dev->mtu = lowerdev->mtu - VXLAN_HEADROOM; | 1104 | dev->mtu = lowerdev->mtu - VXLAN_HEADROOM; |
1105 | |||
1106 | /* update header length based on lower device */ | ||
1107 | dev->hard_header_len = lowerdev->hard_header_len + | ||
1108 | VXLAN_HEADROOM; | ||
1105 | } | 1109 | } |
1106 | 1110 | ||
1107 | if (data[IFLA_VXLAN_TOS]) | 1111 | if (data[IFLA_VXLAN_TOS]) |
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c b/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c index cb30feaa565b..6d554249394f 100644 --- a/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c +++ b/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c | |||
@@ -4197,7 +4197,7 @@ static s32 brcmf_mode_to_nl80211_iftype(s32 mode) | |||
4197 | 4197 | ||
4198 | static void brcmf_wiphy_pno_params(struct wiphy *wiphy) | 4198 | static void brcmf_wiphy_pno_params(struct wiphy *wiphy) |
4199 | { | 4199 | { |
4200 | #ifndef CONFIG_BRCMFISCAN | 4200 | #ifndef CONFIG_BRCMISCAN |
4201 | /* scheduled scan settings */ | 4201 | /* scheduled scan settings */ |
4202 | wiphy->max_sched_scan_ssids = BRCMF_PNO_MAX_PFN_COUNT; | 4202 | wiphy->max_sched_scan_ssids = BRCMF_PNO_MAX_PFN_COUNT; |
4203 | wiphy->max_match_sets = BRCMF_PNO_MAX_PFN_COUNT; | 4203 | wiphy->max_match_sets = BRCMF_PNO_MAX_PFN_COUNT; |
diff --git a/drivers/net/wireless/iwlwifi/dvm/mac80211.c b/drivers/net/wireless/iwlwifi/dvm/mac80211.c index ff8162d4c454..fa4d1b8cd9f6 100644 --- a/drivers/net/wireless/iwlwifi/dvm/mac80211.c +++ b/drivers/net/wireless/iwlwifi/dvm/mac80211.c | |||
@@ -521,7 +521,7 @@ static void iwlagn_mac_tx(struct ieee80211_hw *hw, | |||
521 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); | 521 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); |
522 | 522 | ||
523 | if (iwlagn_tx_skb(priv, control->sta, skb)) | 523 | if (iwlagn_tx_skb(priv, control->sta, skb)) |
524 | dev_kfree_skb_any(skb); | 524 | ieee80211_free_txskb(hw, skb); |
525 | } | 525 | } |
526 | 526 | ||
527 | static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw, | 527 | static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw, |
diff --git a/drivers/net/wireless/iwlwifi/dvm/main.c b/drivers/net/wireless/iwlwifi/dvm/main.c index 475df45c8320..30e761d31e98 100644 --- a/drivers/net/wireless/iwlwifi/dvm/main.c +++ b/drivers/net/wireless/iwlwifi/dvm/main.c | |||
@@ -2113,7 +2113,7 @@ static void iwl_free_skb(struct iwl_op_mode *op_mode, struct sk_buff *skb) | |||
2113 | 2113 | ||
2114 | info = IEEE80211_SKB_CB(skb); | 2114 | info = IEEE80211_SKB_CB(skb); |
2115 | iwl_trans_free_tx_cmd(priv->trans, info->driver_data[1]); | 2115 | iwl_trans_free_tx_cmd(priv->trans, info->driver_data[1]); |
2116 | dev_kfree_skb_any(skb); | 2116 | ieee80211_free_txskb(priv->hw, skb); |
2117 | } | 2117 | } |
2118 | 2118 | ||
2119 | static void iwl_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state) | 2119 | static void iwl_set_hw_rfkill_state(struct iwl_op_mode *op_mode, bool state) |
diff --git a/drivers/net/wireless/iwlwifi/pcie/rx.c b/drivers/net/wireless/iwlwifi/pcie/rx.c index 137af4c46a6c..41d821fbdb92 100644 --- a/drivers/net/wireless/iwlwifi/pcie/rx.c +++ b/drivers/net/wireless/iwlwifi/pcie/rx.c | |||
@@ -321,6 +321,14 @@ static void iwl_rx_allocate(struct iwl_trans *trans, gfp_t priority) | |||
321 | dma_map_page(trans->dev, page, 0, | 321 | dma_map_page(trans->dev, page, 0, |
322 | PAGE_SIZE << trans_pcie->rx_page_order, | 322 | PAGE_SIZE << trans_pcie->rx_page_order, |
323 | DMA_FROM_DEVICE); | 323 | DMA_FROM_DEVICE); |
324 | if (dma_mapping_error(trans->dev, rxb->page_dma)) { | ||
325 | rxb->page = NULL; | ||
326 | spin_lock_irqsave(&rxq->lock, flags); | ||
327 | list_add(&rxb->list, &rxq->rx_used); | ||
328 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
329 | __free_pages(page, trans_pcie->rx_page_order); | ||
330 | return; | ||
331 | } | ||
324 | /* dma address must be no more than 36 bits */ | 332 | /* dma address must be no more than 36 bits */ |
325 | BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36)); | 333 | BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36)); |
326 | /* and also 256 byte aligned! */ | 334 | /* and also 256 byte aligned! */ |
@@ -489,8 +497,19 @@ static void iwl_rx_handle_rxbuf(struct iwl_trans *trans, | |||
489 | dma_map_page(trans->dev, rxb->page, 0, | 497 | dma_map_page(trans->dev, rxb->page, 0, |
490 | PAGE_SIZE << trans_pcie->rx_page_order, | 498 | PAGE_SIZE << trans_pcie->rx_page_order, |
491 | DMA_FROM_DEVICE); | 499 | DMA_FROM_DEVICE); |
492 | list_add_tail(&rxb->list, &rxq->rx_free); | 500 | if (dma_mapping_error(trans->dev, rxb->page_dma)) { |
493 | rxq->free_count++; | 501 | /* |
502 | * free the page(s) as well to not break | ||
503 | * the invariant that the items on the used | ||
504 | * list have no page(s) | ||
505 | */ | ||
506 | __free_pages(rxb->page, trans_pcie->rx_page_order); | ||
507 | rxb->page = NULL; | ||
508 | list_add_tail(&rxb->list, &rxq->rx_used); | ||
509 | } else { | ||
510 | list_add_tail(&rxb->list, &rxq->rx_free); | ||
511 | rxq->free_count++; | ||
512 | } | ||
494 | } else | 513 | } else |
495 | list_add_tail(&rxb->list, &rxq->rx_used); | 514 | list_add_tail(&rxb->list, &rxq->rx_used); |
496 | spin_unlock_irqrestore(&rxq->lock, flags); | 515 | spin_unlock_irqrestore(&rxq->lock, flags); |
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 6241fd05bd41..a543746fb354 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c | |||
@@ -320,10 +320,7 @@ void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), | |||
320 | } else | 320 | } else |
321 | next = dev->bus_list.next; | 321 | next = dev->bus_list.next; |
322 | 322 | ||
323 | /* Run device routines with the device locked */ | ||
324 | device_lock(&dev->dev); | ||
325 | retval = cb(dev, userdata); | 323 | retval = cb(dev, userdata); |
326 | device_unlock(&dev->dev); | ||
327 | if (retval) | 324 | if (retval) |
328 | break; | 325 | break; |
329 | } | 326 | } |
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c index 94c6e2aa03d6..6c94fc9489e7 100644 --- a/drivers/pci/pci-driver.c +++ b/drivers/pci/pci-driver.c | |||
@@ -398,6 +398,8 @@ static void pci_device_shutdown(struct device *dev) | |||
398 | struct pci_dev *pci_dev = to_pci_dev(dev); | 398 | struct pci_dev *pci_dev = to_pci_dev(dev); |
399 | struct pci_driver *drv = pci_dev->driver; | 399 | struct pci_driver *drv = pci_dev->driver; |
400 | 400 | ||
401 | pm_runtime_resume(dev); | ||
402 | |||
401 | if (drv && drv->shutdown) | 403 | if (drv && drv->shutdown) |
402 | drv->shutdown(pci_dev); | 404 | drv->shutdown(pci_dev); |
403 | pci_msi_shutdown(pci_dev); | 405 | pci_msi_shutdown(pci_dev); |
@@ -408,16 +410,6 @@ static void pci_device_shutdown(struct device *dev) | |||
408 | * continue to do DMA | 410 | * continue to do DMA |
409 | */ | 411 | */ |
410 | pci_disable_device(pci_dev); | 412 | pci_disable_device(pci_dev); |
411 | |||
412 | /* | ||
413 | * Devices may be enabled to wake up by runtime PM, but they need not | ||
414 | * be supposed to wake up the system from its "power off" state (e.g. | ||
415 | * ACPI S5). Therefore disable wakeup for all devices that aren't | ||
416 | * supposed to wake up the system at this point. The state argument | ||
417 | * will be ignored by pci_enable_wake(). | ||
418 | */ | ||
419 | if (!device_may_wakeup(dev)) | ||
420 | pci_enable_wake(pci_dev, PCI_UNKNOWN, false); | ||
421 | } | 413 | } |
422 | 414 | ||
423 | #ifdef CONFIG_PM | 415 | #ifdef CONFIG_PM |
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 02d107b15281..f39378d9da15 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c | |||
@@ -458,40 +458,6 @@ boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf) | |||
458 | } | 458 | } |
459 | struct device_attribute vga_attr = __ATTR_RO(boot_vga); | 459 | struct device_attribute vga_attr = __ATTR_RO(boot_vga); |
460 | 460 | ||
461 | static void | ||
462 | pci_config_pm_runtime_get(struct pci_dev *pdev) | ||
463 | { | ||
464 | struct device *dev = &pdev->dev; | ||
465 | struct device *parent = dev->parent; | ||
466 | |||
467 | if (parent) | ||
468 | pm_runtime_get_sync(parent); | ||
469 | pm_runtime_get_noresume(dev); | ||
470 | /* | ||
471 | * pdev->current_state is set to PCI_D3cold during suspending, | ||
472 | * so wait until suspending completes | ||
473 | */ | ||
474 | pm_runtime_barrier(dev); | ||
475 | /* | ||
476 | * Only need to resume devices in D3cold, because config | ||
477 | * registers are still accessible for devices suspended but | ||
478 | * not in D3cold. | ||
479 | */ | ||
480 | if (pdev->current_state == PCI_D3cold) | ||
481 | pm_runtime_resume(dev); | ||
482 | } | ||
483 | |||
484 | static void | ||
485 | pci_config_pm_runtime_put(struct pci_dev *pdev) | ||
486 | { | ||
487 | struct device *dev = &pdev->dev; | ||
488 | struct device *parent = dev->parent; | ||
489 | |||
490 | pm_runtime_put(dev); | ||
491 | if (parent) | ||
492 | pm_runtime_put_sync(parent); | ||
493 | } | ||
494 | |||
495 | static ssize_t | 461 | static ssize_t |
496 | pci_read_config(struct file *filp, struct kobject *kobj, | 462 | pci_read_config(struct file *filp, struct kobject *kobj, |
497 | struct bin_attribute *bin_attr, | 463 | struct bin_attribute *bin_attr, |
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 54858838f098..aabf64798bda 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -1858,6 +1858,38 @@ bool pci_dev_run_wake(struct pci_dev *dev) | |||
1858 | } | 1858 | } |
1859 | EXPORT_SYMBOL_GPL(pci_dev_run_wake); | 1859 | EXPORT_SYMBOL_GPL(pci_dev_run_wake); |
1860 | 1860 | ||
1861 | void pci_config_pm_runtime_get(struct pci_dev *pdev) | ||
1862 | { | ||
1863 | struct device *dev = &pdev->dev; | ||
1864 | struct device *parent = dev->parent; | ||
1865 | |||
1866 | if (parent) | ||
1867 | pm_runtime_get_sync(parent); | ||
1868 | pm_runtime_get_noresume(dev); | ||
1869 | /* | ||
1870 | * pdev->current_state is set to PCI_D3cold during suspending, | ||
1871 | * so wait until suspending completes | ||
1872 | */ | ||
1873 | pm_runtime_barrier(dev); | ||
1874 | /* | ||
1875 | * Only need to resume devices in D3cold, because config | ||
1876 | * registers are still accessible for devices suspended but | ||
1877 | * not in D3cold. | ||
1878 | */ | ||
1879 | if (pdev->current_state == PCI_D3cold) | ||
1880 | pm_runtime_resume(dev); | ||
1881 | } | ||
1882 | |||
1883 | void pci_config_pm_runtime_put(struct pci_dev *pdev) | ||
1884 | { | ||
1885 | struct device *dev = &pdev->dev; | ||
1886 | struct device *parent = dev->parent; | ||
1887 | |||
1888 | pm_runtime_put(dev); | ||
1889 | if (parent) | ||
1890 | pm_runtime_put_sync(parent); | ||
1891 | } | ||
1892 | |||
1861 | /** | 1893 | /** |
1862 | * pci_pm_init - Initialize PM functions of given PCI device | 1894 | * pci_pm_init - Initialize PM functions of given PCI device |
1863 | * @dev: PCI device to handle. | 1895 | * @dev: PCI device to handle. |
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index bacbcba69cf3..fd92aab9904b 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h | |||
@@ -72,6 +72,8 @@ extern void pci_disable_enabled_device(struct pci_dev *dev); | |||
72 | extern int pci_finish_runtime_suspend(struct pci_dev *dev); | 72 | extern int pci_finish_runtime_suspend(struct pci_dev *dev); |
73 | extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); | 73 | extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); |
74 | extern void pci_wakeup_bus(struct pci_bus *bus); | 74 | extern void pci_wakeup_bus(struct pci_bus *bus); |
75 | extern void pci_config_pm_runtime_get(struct pci_dev *dev); | ||
76 | extern void pci_config_pm_runtime_put(struct pci_dev *dev); | ||
75 | extern void pci_pm_init(struct pci_dev *dev); | 77 | extern void pci_pm_init(struct pci_dev *dev); |
76 | extern void platform_pci_wakeup_init(struct pci_dev *dev); | 78 | extern void platform_pci_wakeup_init(struct pci_dev *dev); |
77 | extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); | 79 | extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); |
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c index 06bad96af415..af4e31cd3a3b 100644 --- a/drivers/pci/pcie/aer/aerdrv_core.c +++ b/drivers/pci/pcie/aer/aerdrv_core.c | |||
@@ -213,6 +213,7 @@ static int report_error_detected(struct pci_dev *dev, void *data) | |||
213 | struct aer_broadcast_data *result_data; | 213 | struct aer_broadcast_data *result_data; |
214 | result_data = (struct aer_broadcast_data *) data; | 214 | result_data = (struct aer_broadcast_data *) data; |
215 | 215 | ||
216 | device_lock(&dev->dev); | ||
216 | dev->error_state = result_data->state; | 217 | dev->error_state = result_data->state; |
217 | 218 | ||
218 | if (!dev->driver || | 219 | if (!dev->driver || |
@@ -231,12 +232,14 @@ static int report_error_detected(struct pci_dev *dev, void *data) | |||
231 | dev->driver ? | 232 | dev->driver ? |
232 | "no AER-aware driver" : "no driver"); | 233 | "no AER-aware driver" : "no driver"); |
233 | } | 234 | } |
234 | return 0; | 235 | goto out; |
235 | } | 236 | } |
236 | 237 | ||
237 | err_handler = dev->driver->err_handler; | 238 | err_handler = dev->driver->err_handler; |
238 | vote = err_handler->error_detected(dev, result_data->state); | 239 | vote = err_handler->error_detected(dev, result_data->state); |
239 | result_data->result = merge_result(result_data->result, vote); | 240 | result_data->result = merge_result(result_data->result, vote); |
241 | out: | ||
242 | device_unlock(&dev->dev); | ||
240 | return 0; | 243 | return 0; |
241 | } | 244 | } |
242 | 245 | ||
@@ -247,14 +250,17 @@ static int report_mmio_enabled(struct pci_dev *dev, void *data) | |||
247 | struct aer_broadcast_data *result_data; | 250 | struct aer_broadcast_data *result_data; |
248 | result_data = (struct aer_broadcast_data *) data; | 251 | result_data = (struct aer_broadcast_data *) data; |
249 | 252 | ||
253 | device_lock(&dev->dev); | ||
250 | if (!dev->driver || | 254 | if (!dev->driver || |
251 | !dev->driver->err_handler || | 255 | !dev->driver->err_handler || |
252 | !dev->driver->err_handler->mmio_enabled) | 256 | !dev->driver->err_handler->mmio_enabled) |
253 | return 0; | 257 | goto out; |
254 | 258 | ||
255 | err_handler = dev->driver->err_handler; | 259 | err_handler = dev->driver->err_handler; |
256 | vote = err_handler->mmio_enabled(dev); | 260 | vote = err_handler->mmio_enabled(dev); |
257 | result_data->result = merge_result(result_data->result, vote); | 261 | result_data->result = merge_result(result_data->result, vote); |
262 | out: | ||
263 | device_unlock(&dev->dev); | ||
258 | return 0; | 264 | return 0; |
259 | } | 265 | } |
260 | 266 | ||
@@ -265,14 +271,17 @@ static int report_slot_reset(struct pci_dev *dev, void *data) | |||
265 | struct aer_broadcast_data *result_data; | 271 | struct aer_broadcast_data *result_data; |
266 | result_data = (struct aer_broadcast_data *) data; | 272 | result_data = (struct aer_broadcast_data *) data; |
267 | 273 | ||
274 | device_lock(&dev->dev); | ||
268 | if (!dev->driver || | 275 | if (!dev->driver || |
269 | !dev->driver->err_handler || | 276 | !dev->driver->err_handler || |
270 | !dev->driver->err_handler->slot_reset) | 277 | !dev->driver->err_handler->slot_reset) |
271 | return 0; | 278 | goto out; |
272 | 279 | ||
273 | err_handler = dev->driver->err_handler; | 280 | err_handler = dev->driver->err_handler; |
274 | vote = err_handler->slot_reset(dev); | 281 | vote = err_handler->slot_reset(dev); |
275 | result_data->result = merge_result(result_data->result, vote); | 282 | result_data->result = merge_result(result_data->result, vote); |
283 | out: | ||
284 | device_unlock(&dev->dev); | ||
276 | return 0; | 285 | return 0; |
277 | } | 286 | } |
278 | 287 | ||
@@ -280,15 +289,18 @@ static int report_resume(struct pci_dev *dev, void *data) | |||
280 | { | 289 | { |
281 | const struct pci_error_handlers *err_handler; | 290 | const struct pci_error_handlers *err_handler; |
282 | 291 | ||
292 | device_lock(&dev->dev); | ||
283 | dev->error_state = pci_channel_io_normal; | 293 | dev->error_state = pci_channel_io_normal; |
284 | 294 | ||
285 | if (!dev->driver || | 295 | if (!dev->driver || |
286 | !dev->driver->err_handler || | 296 | !dev->driver->err_handler || |
287 | !dev->driver->err_handler->resume) | 297 | !dev->driver->err_handler->resume) |
288 | return 0; | 298 | goto out; |
289 | 299 | ||
290 | err_handler = dev->driver->err_handler; | 300 | err_handler = dev->driver->err_handler; |
291 | err_handler->resume(dev); | 301 | err_handler->resume(dev); |
302 | out: | ||
303 | device_unlock(&dev->dev); | ||
292 | return 0; | 304 | return 0; |
293 | } | 305 | } |
294 | 306 | ||
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index d03a7a39b2d8..ed129b414624 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c | |||
@@ -272,7 +272,8 @@ static int get_port_device_capability(struct pci_dev *dev) | |||
272 | } | 272 | } |
273 | 273 | ||
274 | /* Hot-Plug Capable */ | 274 | /* Hot-Plug Capable */ |
275 | if (cap_mask & PCIE_PORT_SERVICE_HP) { | 275 | if ((cap_mask & PCIE_PORT_SERVICE_HP) && |
276 | dev->pcie_flags_reg & PCI_EXP_FLAGS_SLOT) { | ||
276 | pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32); | 277 | pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32); |
277 | if (reg32 & PCI_EXP_SLTCAP_HPC) { | 278 | if (reg32 & PCI_EXP_SLTCAP_HPC) { |
278 | services |= PCIE_PORT_SERVICE_HP; | 279 | services |= PCIE_PORT_SERVICE_HP; |
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c index eb907a8faf2a..9b8505ccc56d 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c | |||
@@ -76,6 +76,8 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp | |||
76 | if (!access_ok(VERIFY_WRITE, buf, cnt)) | 76 | if (!access_ok(VERIFY_WRITE, buf, cnt)) |
77 | return -EINVAL; | 77 | return -EINVAL; |
78 | 78 | ||
79 | pci_config_pm_runtime_get(dev); | ||
80 | |||
79 | if ((pos & 1) && cnt) { | 81 | if ((pos & 1) && cnt) { |
80 | unsigned char val; | 82 | unsigned char val; |
81 | pci_user_read_config_byte(dev, pos, &val); | 83 | pci_user_read_config_byte(dev, pos, &val); |
@@ -121,6 +123,8 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp | |||
121 | cnt--; | 123 | cnt--; |
122 | } | 124 | } |
123 | 125 | ||
126 | pci_config_pm_runtime_put(dev); | ||
127 | |||
124 | *ppos = pos; | 128 | *ppos = pos; |
125 | return nbytes; | 129 | return nbytes; |
126 | } | 130 | } |
@@ -146,6 +150,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof | |||
146 | if (!access_ok(VERIFY_READ, buf, cnt)) | 150 | if (!access_ok(VERIFY_READ, buf, cnt)) |
147 | return -EINVAL; | 151 | return -EINVAL; |
148 | 152 | ||
153 | pci_config_pm_runtime_get(dev); | ||
154 | |||
149 | if ((pos & 1) && cnt) { | 155 | if ((pos & 1) && cnt) { |
150 | unsigned char val; | 156 | unsigned char val; |
151 | __get_user(val, buf); | 157 | __get_user(val, buf); |
@@ -191,6 +197,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof | |||
191 | cnt--; | 197 | cnt--; |
192 | } | 198 | } |
193 | 199 | ||
200 | pci_config_pm_runtime_put(dev); | ||
201 | |||
194 | *ppos = pos; | 202 | *ppos = pos; |
195 | i_size_write(ino, dp->size); | 203 | i_size_write(ino, dp->size); |
196 | return nbytes; | 204 | return nbytes; |
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 7bf914df6e91..d96caefd914a 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig | |||
@@ -179,11 +179,13 @@ config PINCTRL_COH901 | |||
179 | 179 | ||
180 | config PINCTRL_SAMSUNG | 180 | config PINCTRL_SAMSUNG |
181 | bool "Samsung pinctrl driver" | 181 | bool "Samsung pinctrl driver" |
182 | depends on OF && GPIOLIB | ||
182 | select PINMUX | 183 | select PINMUX |
183 | select PINCONF | 184 | select PINCONF |
184 | 185 | ||
185 | config PINCTRL_EXYNOS4 | 186 | config PINCTRL_EXYNOS4 |
186 | bool "Pinctrl driver data for Exynos4 SoC" | 187 | bool "Pinctrl driver data for Exynos4 SoC" |
188 | depends on OF && GPIOLIB | ||
187 | select PINCTRL_SAMSUNG | 189 | select PINCTRL_SAMSUNG |
188 | 190 | ||
189 | config PINCTRL_MVEBU | 191 | config PINCTRL_MVEBU |
diff --git a/drivers/pinctrl/spear/pinctrl-spear.c b/drivers/pinctrl/spear/pinctrl-spear.c index 5d4f44f462f0..b1fd6ee33c6c 100644 --- a/drivers/pinctrl/spear/pinctrl-spear.c +++ b/drivers/pinctrl/spear/pinctrl-spear.c | |||
@@ -244,7 +244,7 @@ static int spear_pinctrl_endisable(struct pinctrl_dev *pctldev, | |||
244 | else | 244 | else |
245 | temp = ~muxreg->val; | 245 | temp = ~muxreg->val; |
246 | 246 | ||
247 | val |= temp; | 247 | val |= muxreg->mask & temp; |
248 | pmx_writel(pmx, val, muxreg->reg); | 248 | pmx_writel(pmx, val, muxreg->reg); |
249 | } | 249 | } |
250 | } | 250 | } |
diff --git a/drivers/pinctrl/spear/pinctrl-spear1310.c b/drivers/pinctrl/spear/pinctrl-spear1310.c index d6cca8c81b92..0436fc7895d6 100644 --- a/drivers/pinctrl/spear/pinctrl-spear1310.c +++ b/drivers/pinctrl/spear/pinctrl-spear1310.c | |||
@@ -25,8 +25,8 @@ static const struct pinctrl_pin_desc spear1310_pins[] = { | |||
25 | }; | 25 | }; |
26 | 26 | ||
27 | /* registers */ | 27 | /* registers */ |
28 | #define PERIP_CFG 0x32C | 28 | #define PERIP_CFG 0x3B0 |
29 | #define MCIF_SEL_SHIFT 3 | 29 | #define MCIF_SEL_SHIFT 5 |
30 | #define MCIF_SEL_SD (0x1 << MCIF_SEL_SHIFT) | 30 | #define MCIF_SEL_SD (0x1 << MCIF_SEL_SHIFT) |
31 | #define MCIF_SEL_CF (0x2 << MCIF_SEL_SHIFT) | 31 | #define MCIF_SEL_CF (0x2 << MCIF_SEL_SHIFT) |
32 | #define MCIF_SEL_XD (0x3 << MCIF_SEL_SHIFT) | 32 | #define MCIF_SEL_XD (0x3 << MCIF_SEL_SHIFT) |
@@ -164,6 +164,10 @@ static const struct pinctrl_pin_desc spear1310_pins[] = { | |||
164 | #define PMX_SSP0_CS0_MASK (1 << 29) | 164 | #define PMX_SSP0_CS0_MASK (1 << 29) |
165 | #define PMX_SSP0_CS1_2_MASK (1 << 30) | 165 | #define PMX_SSP0_CS1_2_MASK (1 << 30) |
166 | 166 | ||
167 | #define PAD_DIRECTION_SEL_0 0x65C | ||
168 | #define PAD_DIRECTION_SEL_1 0x660 | ||
169 | #define PAD_DIRECTION_SEL_2 0x664 | ||
170 | |||
167 | /* combined macros */ | 171 | /* combined macros */ |
168 | #define PMX_GMII_MASK (PMX_GMIICLK_MASK | \ | 172 | #define PMX_GMII_MASK (PMX_GMIICLK_MASK | \ |
169 | PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK | \ | 173 | PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK | \ |
@@ -237,6 +241,10 @@ static struct spear_muxreg i2c0_muxreg[] = { | |||
237 | .reg = PAD_FUNCTION_EN_0, | 241 | .reg = PAD_FUNCTION_EN_0, |
238 | .mask = PMX_I2C0_MASK, | 242 | .mask = PMX_I2C0_MASK, |
239 | .val = PMX_I2C0_MASK, | 243 | .val = PMX_I2C0_MASK, |
244 | }, { | ||
245 | .reg = PAD_DIRECTION_SEL_0, | ||
246 | .mask = PMX_I2C0_MASK, | ||
247 | .val = PMX_I2C0_MASK, | ||
240 | }, | 248 | }, |
241 | }; | 249 | }; |
242 | 250 | ||
@@ -269,6 +277,10 @@ static struct spear_muxreg ssp0_muxreg[] = { | |||
269 | .reg = PAD_FUNCTION_EN_0, | 277 | .reg = PAD_FUNCTION_EN_0, |
270 | .mask = PMX_SSP0_MASK, | 278 | .mask = PMX_SSP0_MASK, |
271 | .val = PMX_SSP0_MASK, | 279 | .val = PMX_SSP0_MASK, |
280 | }, { | ||
281 | .reg = PAD_DIRECTION_SEL_0, | ||
282 | .mask = PMX_SSP0_MASK, | ||
283 | .val = PMX_SSP0_MASK, | ||
272 | }, | 284 | }, |
273 | }; | 285 | }; |
274 | 286 | ||
@@ -294,6 +306,10 @@ static struct spear_muxreg ssp0_cs0_muxreg[] = { | |||
294 | .reg = PAD_FUNCTION_EN_2, | 306 | .reg = PAD_FUNCTION_EN_2, |
295 | .mask = PMX_SSP0_CS0_MASK, | 307 | .mask = PMX_SSP0_CS0_MASK, |
296 | .val = PMX_SSP0_CS0_MASK, | 308 | .val = PMX_SSP0_CS0_MASK, |
309 | }, { | ||
310 | .reg = PAD_DIRECTION_SEL_2, | ||
311 | .mask = PMX_SSP0_CS0_MASK, | ||
312 | .val = PMX_SSP0_CS0_MASK, | ||
297 | }, | 313 | }, |
298 | }; | 314 | }; |
299 | 315 | ||
@@ -319,6 +335,10 @@ static struct spear_muxreg ssp0_cs1_2_muxreg[] = { | |||
319 | .reg = PAD_FUNCTION_EN_2, | 335 | .reg = PAD_FUNCTION_EN_2, |
320 | .mask = PMX_SSP0_CS1_2_MASK, | 336 | .mask = PMX_SSP0_CS1_2_MASK, |
321 | .val = PMX_SSP0_CS1_2_MASK, | 337 | .val = PMX_SSP0_CS1_2_MASK, |
338 | }, { | ||
339 | .reg = PAD_DIRECTION_SEL_2, | ||
340 | .mask = PMX_SSP0_CS1_2_MASK, | ||
341 | .val = PMX_SSP0_CS1_2_MASK, | ||
322 | }, | 342 | }, |
323 | }; | 343 | }; |
324 | 344 | ||
@@ -352,6 +372,10 @@ static struct spear_muxreg i2s0_muxreg[] = { | |||
352 | .reg = PAD_FUNCTION_EN_0, | 372 | .reg = PAD_FUNCTION_EN_0, |
353 | .mask = PMX_I2S0_MASK, | 373 | .mask = PMX_I2S0_MASK, |
354 | .val = PMX_I2S0_MASK, | 374 | .val = PMX_I2S0_MASK, |
375 | }, { | ||
376 | .reg = PAD_DIRECTION_SEL_0, | ||
377 | .mask = PMX_I2S0_MASK, | ||
378 | .val = PMX_I2S0_MASK, | ||
355 | }, | 379 | }, |
356 | }; | 380 | }; |
357 | 381 | ||
@@ -384,6 +408,10 @@ static struct spear_muxreg i2s1_muxreg[] = { | |||
384 | .reg = PAD_FUNCTION_EN_1, | 408 | .reg = PAD_FUNCTION_EN_1, |
385 | .mask = PMX_I2S1_MASK, | 409 | .mask = PMX_I2S1_MASK, |
386 | .val = PMX_I2S1_MASK, | 410 | .val = PMX_I2S1_MASK, |
411 | }, { | ||
412 | .reg = PAD_DIRECTION_SEL_1, | ||
413 | .mask = PMX_I2S1_MASK, | ||
414 | .val = PMX_I2S1_MASK, | ||
387 | }, | 415 | }, |
388 | }; | 416 | }; |
389 | 417 | ||
@@ -418,6 +446,10 @@ static struct spear_muxreg clcd_muxreg[] = { | |||
418 | .reg = PAD_FUNCTION_EN_0, | 446 | .reg = PAD_FUNCTION_EN_0, |
419 | .mask = PMX_CLCD1_MASK, | 447 | .mask = PMX_CLCD1_MASK, |
420 | .val = PMX_CLCD1_MASK, | 448 | .val = PMX_CLCD1_MASK, |
449 | }, { | ||
450 | .reg = PAD_DIRECTION_SEL_0, | ||
451 | .mask = PMX_CLCD1_MASK, | ||
452 | .val = PMX_CLCD1_MASK, | ||
421 | }, | 453 | }, |
422 | }; | 454 | }; |
423 | 455 | ||
@@ -443,6 +475,10 @@ static struct spear_muxreg clcd_high_res_muxreg[] = { | |||
443 | .reg = PAD_FUNCTION_EN_1, | 475 | .reg = PAD_FUNCTION_EN_1, |
444 | .mask = PMX_CLCD2_MASK, | 476 | .mask = PMX_CLCD2_MASK, |
445 | .val = PMX_CLCD2_MASK, | 477 | .val = PMX_CLCD2_MASK, |
478 | }, { | ||
479 | .reg = PAD_DIRECTION_SEL_1, | ||
480 | .mask = PMX_CLCD2_MASK, | ||
481 | .val = PMX_CLCD2_MASK, | ||
446 | }, | 482 | }, |
447 | }; | 483 | }; |
448 | 484 | ||
@@ -461,7 +497,7 @@ static struct spear_pingroup clcd_high_res_pingroup = { | |||
461 | .nmodemuxs = ARRAY_SIZE(clcd_high_res_modemux), | 497 | .nmodemuxs = ARRAY_SIZE(clcd_high_res_modemux), |
462 | }; | 498 | }; |
463 | 499 | ||
464 | static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res" }; | 500 | static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res_grp" }; |
465 | static struct spear_function clcd_function = { | 501 | static struct spear_function clcd_function = { |
466 | .name = "clcd", | 502 | .name = "clcd", |
467 | .groups = clcd_grps, | 503 | .groups = clcd_grps, |
@@ -479,6 +515,14 @@ static struct spear_muxreg arm_gpio_muxreg[] = { | |||
479 | .reg = PAD_FUNCTION_EN_1, | 515 | .reg = PAD_FUNCTION_EN_1, |
480 | .mask = PMX_EGPIO_1_GRP_MASK, | 516 | .mask = PMX_EGPIO_1_GRP_MASK, |
481 | .val = PMX_EGPIO_1_GRP_MASK, | 517 | .val = PMX_EGPIO_1_GRP_MASK, |
518 | }, { | ||
519 | .reg = PAD_DIRECTION_SEL_0, | ||
520 | .mask = PMX_EGPIO_0_GRP_MASK, | ||
521 | .val = PMX_EGPIO_0_GRP_MASK, | ||
522 | }, { | ||
523 | .reg = PAD_DIRECTION_SEL_1, | ||
524 | .mask = PMX_EGPIO_1_GRP_MASK, | ||
525 | .val = PMX_EGPIO_1_GRP_MASK, | ||
482 | }, | 526 | }, |
483 | }; | 527 | }; |
484 | 528 | ||
@@ -511,6 +555,10 @@ static struct spear_muxreg smi_2_chips_muxreg[] = { | |||
511 | .reg = PAD_FUNCTION_EN_0, | 555 | .reg = PAD_FUNCTION_EN_0, |
512 | .mask = PMX_SMI_MASK, | 556 | .mask = PMX_SMI_MASK, |
513 | .val = PMX_SMI_MASK, | 557 | .val = PMX_SMI_MASK, |
558 | }, { | ||
559 | .reg = PAD_DIRECTION_SEL_0, | ||
560 | .mask = PMX_SMI_MASK, | ||
561 | .val = PMX_SMI_MASK, | ||
514 | }, | 562 | }, |
515 | }; | 563 | }; |
516 | 564 | ||
@@ -539,6 +587,14 @@ static struct spear_muxreg smi_4_chips_muxreg[] = { | |||
539 | .reg = PAD_FUNCTION_EN_1, | 587 | .reg = PAD_FUNCTION_EN_1, |
540 | .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, | 588 | .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, |
541 | .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, | 589 | .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, |
590 | }, { | ||
591 | .reg = PAD_DIRECTION_SEL_0, | ||
592 | .mask = PMX_SMI_MASK, | ||
593 | .val = PMX_SMI_MASK, | ||
594 | }, { | ||
595 | .reg = PAD_DIRECTION_SEL_1, | ||
596 | .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, | ||
597 | .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, | ||
542 | }, | 598 | }, |
543 | }; | 599 | }; |
544 | 600 | ||
@@ -573,6 +629,10 @@ static struct spear_muxreg gmii_muxreg[] = { | |||
573 | .reg = PAD_FUNCTION_EN_0, | 629 | .reg = PAD_FUNCTION_EN_0, |
574 | .mask = PMX_GMII_MASK, | 630 | .mask = PMX_GMII_MASK, |
575 | .val = PMX_GMII_MASK, | 631 | .val = PMX_GMII_MASK, |
632 | }, { | ||
633 | .reg = PAD_DIRECTION_SEL_0, | ||
634 | .mask = PMX_GMII_MASK, | ||
635 | .val = PMX_GMII_MASK, | ||
576 | }, | 636 | }, |
577 | }; | 637 | }; |
578 | 638 | ||
@@ -615,6 +675,18 @@ static struct spear_muxreg rgmii_muxreg[] = { | |||
615 | .reg = PAD_FUNCTION_EN_2, | 675 | .reg = PAD_FUNCTION_EN_2, |
616 | .mask = PMX_RGMII_REG2_MASK, | 676 | .mask = PMX_RGMII_REG2_MASK, |
617 | .val = 0, | 677 | .val = 0, |
678 | }, { | ||
679 | .reg = PAD_DIRECTION_SEL_0, | ||
680 | .mask = PMX_RGMII_REG0_MASK, | ||
681 | .val = PMX_RGMII_REG0_MASK, | ||
682 | }, { | ||
683 | .reg = PAD_DIRECTION_SEL_1, | ||
684 | .mask = PMX_RGMII_REG1_MASK, | ||
685 | .val = PMX_RGMII_REG1_MASK, | ||
686 | }, { | ||
687 | .reg = PAD_DIRECTION_SEL_2, | ||
688 | .mask = PMX_RGMII_REG2_MASK, | ||
689 | .val = PMX_RGMII_REG2_MASK, | ||
618 | }, | 690 | }, |
619 | }; | 691 | }; |
620 | 692 | ||
@@ -649,6 +721,10 @@ static struct spear_muxreg smii_0_1_2_muxreg[] = { | |||
649 | .reg = PAD_FUNCTION_EN_1, | 721 | .reg = PAD_FUNCTION_EN_1, |
650 | .mask = PMX_SMII_0_1_2_MASK, | 722 | .mask = PMX_SMII_0_1_2_MASK, |
651 | .val = 0, | 723 | .val = 0, |
724 | }, { | ||
725 | .reg = PAD_DIRECTION_SEL_1, | ||
726 | .mask = PMX_SMII_0_1_2_MASK, | ||
727 | .val = PMX_SMII_0_1_2_MASK, | ||
652 | }, | 728 | }, |
653 | }; | 729 | }; |
654 | 730 | ||
@@ -681,6 +757,10 @@ static struct spear_muxreg ras_mii_txclk_muxreg[] = { | |||
681 | .reg = PAD_FUNCTION_EN_1, | 757 | .reg = PAD_FUNCTION_EN_1, |
682 | .mask = PMX_NFCE2_MASK, | 758 | .mask = PMX_NFCE2_MASK, |
683 | .val = 0, | 759 | .val = 0, |
760 | }, { | ||
761 | .reg = PAD_DIRECTION_SEL_1, | ||
762 | .mask = PMX_NFCE2_MASK, | ||
763 | .val = PMX_NFCE2_MASK, | ||
684 | }, | 764 | }, |
685 | }; | 765 | }; |
686 | 766 | ||
@@ -721,6 +801,14 @@ static struct spear_muxreg nand_8bit_muxreg[] = { | |||
721 | .reg = PAD_FUNCTION_EN_1, | 801 | .reg = PAD_FUNCTION_EN_1, |
722 | .mask = PMX_NAND8BIT_1_MASK, | 802 | .mask = PMX_NAND8BIT_1_MASK, |
723 | .val = PMX_NAND8BIT_1_MASK, | 803 | .val = PMX_NAND8BIT_1_MASK, |
804 | }, { | ||
805 | .reg = PAD_DIRECTION_SEL_0, | ||
806 | .mask = PMX_NAND8BIT_0_MASK, | ||
807 | .val = PMX_NAND8BIT_0_MASK, | ||
808 | }, { | ||
809 | .reg = PAD_DIRECTION_SEL_1, | ||
810 | .mask = PMX_NAND8BIT_1_MASK, | ||
811 | .val = PMX_NAND8BIT_1_MASK, | ||
724 | }, | 812 | }, |
725 | }; | 813 | }; |
726 | 814 | ||
@@ -747,6 +835,10 @@ static struct spear_muxreg nand_16bit_muxreg[] = { | |||
747 | .reg = PAD_FUNCTION_EN_1, | 835 | .reg = PAD_FUNCTION_EN_1, |
748 | .mask = PMX_NAND16BIT_1_MASK, | 836 | .mask = PMX_NAND16BIT_1_MASK, |
749 | .val = PMX_NAND16BIT_1_MASK, | 837 | .val = PMX_NAND16BIT_1_MASK, |
838 | }, { | ||
839 | .reg = PAD_DIRECTION_SEL_1, | ||
840 | .mask = PMX_NAND16BIT_1_MASK, | ||
841 | .val = PMX_NAND16BIT_1_MASK, | ||
750 | }, | 842 | }, |
751 | }; | 843 | }; |
752 | 844 | ||
@@ -772,6 +864,10 @@ static struct spear_muxreg nand_4_chips_muxreg[] = { | |||
772 | .reg = PAD_FUNCTION_EN_1, | 864 | .reg = PAD_FUNCTION_EN_1, |
773 | .mask = PMX_NAND_4CHIPS_MASK, | 865 | .mask = PMX_NAND_4CHIPS_MASK, |
774 | .val = PMX_NAND_4CHIPS_MASK, | 866 | .val = PMX_NAND_4CHIPS_MASK, |
867 | }, { | ||
868 | .reg = PAD_DIRECTION_SEL_1, | ||
869 | .mask = PMX_NAND_4CHIPS_MASK, | ||
870 | .val = PMX_NAND_4CHIPS_MASK, | ||
775 | }, | 871 | }, |
776 | }; | 872 | }; |
777 | 873 | ||
@@ -833,6 +929,10 @@ static struct spear_muxreg keyboard_rowcol6_8_muxreg[] = { | |||
833 | .reg = PAD_FUNCTION_EN_1, | 929 | .reg = PAD_FUNCTION_EN_1, |
834 | .mask = PMX_KBD_ROWCOL68_MASK, | 930 | .mask = PMX_KBD_ROWCOL68_MASK, |
835 | .val = PMX_KBD_ROWCOL68_MASK, | 931 | .val = PMX_KBD_ROWCOL68_MASK, |
932 | }, { | ||
933 | .reg = PAD_DIRECTION_SEL_1, | ||
934 | .mask = PMX_KBD_ROWCOL68_MASK, | ||
935 | .val = PMX_KBD_ROWCOL68_MASK, | ||
836 | }, | 936 | }, |
837 | }; | 937 | }; |
838 | 938 | ||
@@ -866,6 +966,10 @@ static struct spear_muxreg uart0_muxreg[] = { | |||
866 | .reg = PAD_FUNCTION_EN_0, | 966 | .reg = PAD_FUNCTION_EN_0, |
867 | .mask = PMX_UART0_MASK, | 967 | .mask = PMX_UART0_MASK, |
868 | .val = PMX_UART0_MASK, | 968 | .val = PMX_UART0_MASK, |
969 | }, { | ||
970 | .reg = PAD_DIRECTION_SEL_0, | ||
971 | .mask = PMX_UART0_MASK, | ||
972 | .val = PMX_UART0_MASK, | ||
869 | }, | 973 | }, |
870 | }; | 974 | }; |
871 | 975 | ||
@@ -891,6 +995,10 @@ static struct spear_muxreg uart0_modem_muxreg[] = { | |||
891 | .reg = PAD_FUNCTION_EN_1, | 995 | .reg = PAD_FUNCTION_EN_1, |
892 | .mask = PMX_UART0_MODEM_MASK, | 996 | .mask = PMX_UART0_MODEM_MASK, |
893 | .val = PMX_UART0_MODEM_MASK, | 997 | .val = PMX_UART0_MODEM_MASK, |
998 | }, { | ||
999 | .reg = PAD_DIRECTION_SEL_1, | ||
1000 | .mask = PMX_UART0_MODEM_MASK, | ||
1001 | .val = PMX_UART0_MODEM_MASK, | ||
894 | }, | 1002 | }, |
895 | }; | 1003 | }; |
896 | 1004 | ||
@@ -923,6 +1031,10 @@ static struct spear_muxreg gpt0_tmr0_muxreg[] = { | |||
923 | .reg = PAD_FUNCTION_EN_1, | 1031 | .reg = PAD_FUNCTION_EN_1, |
924 | .mask = PMX_GPT0_TMR0_MASK, | 1032 | .mask = PMX_GPT0_TMR0_MASK, |
925 | .val = PMX_GPT0_TMR0_MASK, | 1033 | .val = PMX_GPT0_TMR0_MASK, |
1034 | }, { | ||
1035 | .reg = PAD_DIRECTION_SEL_1, | ||
1036 | .mask = PMX_GPT0_TMR0_MASK, | ||
1037 | .val = PMX_GPT0_TMR0_MASK, | ||
926 | }, | 1038 | }, |
927 | }; | 1039 | }; |
928 | 1040 | ||
@@ -948,6 +1060,10 @@ static struct spear_muxreg gpt0_tmr1_muxreg[] = { | |||
948 | .reg = PAD_FUNCTION_EN_1, | 1060 | .reg = PAD_FUNCTION_EN_1, |
949 | .mask = PMX_GPT0_TMR1_MASK, | 1061 | .mask = PMX_GPT0_TMR1_MASK, |
950 | .val = PMX_GPT0_TMR1_MASK, | 1062 | .val = PMX_GPT0_TMR1_MASK, |
1063 | }, { | ||
1064 | .reg = PAD_DIRECTION_SEL_1, | ||
1065 | .mask = PMX_GPT0_TMR1_MASK, | ||
1066 | .val = PMX_GPT0_TMR1_MASK, | ||
951 | }, | 1067 | }, |
952 | }; | 1068 | }; |
953 | 1069 | ||
@@ -980,6 +1096,10 @@ static struct spear_muxreg gpt1_tmr0_muxreg[] = { | |||
980 | .reg = PAD_FUNCTION_EN_1, | 1096 | .reg = PAD_FUNCTION_EN_1, |
981 | .mask = PMX_GPT1_TMR0_MASK, | 1097 | .mask = PMX_GPT1_TMR0_MASK, |
982 | .val = PMX_GPT1_TMR0_MASK, | 1098 | .val = PMX_GPT1_TMR0_MASK, |
1099 | }, { | ||
1100 | .reg = PAD_DIRECTION_SEL_1, | ||
1101 | .mask = PMX_GPT1_TMR0_MASK, | ||
1102 | .val = PMX_GPT1_TMR0_MASK, | ||
983 | }, | 1103 | }, |
984 | }; | 1104 | }; |
985 | 1105 | ||
@@ -1005,6 +1125,10 @@ static struct spear_muxreg gpt1_tmr1_muxreg[] = { | |||
1005 | .reg = PAD_FUNCTION_EN_1, | 1125 | .reg = PAD_FUNCTION_EN_1, |
1006 | .mask = PMX_GPT1_TMR1_MASK, | 1126 | .mask = PMX_GPT1_TMR1_MASK, |
1007 | .val = PMX_GPT1_TMR1_MASK, | 1127 | .val = PMX_GPT1_TMR1_MASK, |
1128 | }, { | ||
1129 | .reg = PAD_DIRECTION_SEL_1, | ||
1130 | .mask = PMX_GPT1_TMR1_MASK, | ||
1131 | .val = PMX_GPT1_TMR1_MASK, | ||
1008 | }, | 1132 | }, |
1009 | }; | 1133 | }; |
1010 | 1134 | ||
@@ -1049,6 +1173,20 @@ static const unsigned mcif_pins[] = { 86, 87, 88, 89, 90, 91, 92, 93, 213, 214, | |||
1049 | .reg = PAD_FUNCTION_EN_2, \ | 1173 | .reg = PAD_FUNCTION_EN_2, \ |
1050 | .mask = PMX_MCIFALL_2_MASK, \ | 1174 | .mask = PMX_MCIFALL_2_MASK, \ |
1051 | .val = PMX_MCIFALL_2_MASK, \ | 1175 | .val = PMX_MCIFALL_2_MASK, \ |
1176 | }, { \ | ||
1177 | .reg = PAD_DIRECTION_SEL_0, \ | ||
1178 | .mask = PMX_MCI_DATA8_15_MASK, \ | ||
1179 | .val = PMX_MCI_DATA8_15_MASK, \ | ||
1180 | }, { \ | ||
1181 | .reg = PAD_DIRECTION_SEL_1, \ | ||
1182 | .mask = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK | \ | ||
1183 | PMX_NFWPRT2_MASK, \ | ||
1184 | .val = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK | \ | ||
1185 | PMX_NFWPRT2_MASK, \ | ||
1186 | }, { \ | ||
1187 | .reg = PAD_DIRECTION_SEL_2, \ | ||
1188 | .mask = PMX_MCIFALL_2_MASK, \ | ||
1189 | .val = PMX_MCIFALL_2_MASK, \ | ||
1052 | } | 1190 | } |
1053 | 1191 | ||
1054 | /* sdhci device */ | 1192 | /* sdhci device */ |
@@ -1154,6 +1292,10 @@ static struct spear_muxreg touch_xy_muxreg[] = { | |||
1154 | .reg = PAD_FUNCTION_EN_2, | 1292 | .reg = PAD_FUNCTION_EN_2, |
1155 | .mask = PMX_TOUCH_XY_MASK, | 1293 | .mask = PMX_TOUCH_XY_MASK, |
1156 | .val = PMX_TOUCH_XY_MASK, | 1294 | .val = PMX_TOUCH_XY_MASK, |
1295 | }, { | ||
1296 | .reg = PAD_DIRECTION_SEL_2, | ||
1297 | .mask = PMX_TOUCH_XY_MASK, | ||
1298 | .val = PMX_TOUCH_XY_MASK, | ||
1157 | }, | 1299 | }, |
1158 | }; | 1300 | }; |
1159 | 1301 | ||
@@ -1187,6 +1329,10 @@ static struct spear_muxreg uart1_dis_i2c_muxreg[] = { | |||
1187 | .reg = PAD_FUNCTION_EN_0, | 1329 | .reg = PAD_FUNCTION_EN_0, |
1188 | .mask = PMX_I2C0_MASK, | 1330 | .mask = PMX_I2C0_MASK, |
1189 | .val = 0, | 1331 | .val = 0, |
1332 | }, { | ||
1333 | .reg = PAD_DIRECTION_SEL_0, | ||
1334 | .mask = PMX_I2C0_MASK, | ||
1335 | .val = PMX_I2C0_MASK, | ||
1190 | }, | 1336 | }, |
1191 | }; | 1337 | }; |
1192 | 1338 | ||
@@ -1213,6 +1359,12 @@ static struct spear_muxreg uart1_dis_sd_muxreg[] = { | |||
1213 | .mask = PMX_MCIDATA1_MASK | | 1359 | .mask = PMX_MCIDATA1_MASK | |
1214 | PMX_MCIDATA2_MASK, | 1360 | PMX_MCIDATA2_MASK, |
1215 | .val = 0, | 1361 | .val = 0, |
1362 | }, { | ||
1363 | .reg = PAD_DIRECTION_SEL_1, | ||
1364 | .mask = PMX_MCIDATA1_MASK | | ||
1365 | PMX_MCIDATA2_MASK, | ||
1366 | .val = PMX_MCIDATA1_MASK | | ||
1367 | PMX_MCIDATA2_MASK, | ||
1216 | }, | 1368 | }, |
1217 | }; | 1369 | }; |
1218 | 1370 | ||
@@ -1246,6 +1398,10 @@ static struct spear_muxreg uart2_3_muxreg[] = { | |||
1246 | .reg = PAD_FUNCTION_EN_0, | 1398 | .reg = PAD_FUNCTION_EN_0, |
1247 | .mask = PMX_I2S0_MASK, | 1399 | .mask = PMX_I2S0_MASK, |
1248 | .val = 0, | 1400 | .val = 0, |
1401 | }, { | ||
1402 | .reg = PAD_DIRECTION_SEL_0, | ||
1403 | .mask = PMX_I2S0_MASK, | ||
1404 | .val = PMX_I2S0_MASK, | ||
1249 | }, | 1405 | }, |
1250 | }; | 1406 | }; |
1251 | 1407 | ||
@@ -1278,6 +1434,10 @@ static struct spear_muxreg uart4_muxreg[] = { | |||
1278 | .reg = PAD_FUNCTION_EN_0, | 1434 | .reg = PAD_FUNCTION_EN_0, |
1279 | .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK, | 1435 | .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK, |
1280 | .val = 0, | 1436 | .val = 0, |
1437 | }, { | ||
1438 | .reg = PAD_DIRECTION_SEL_0, | ||
1439 | .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK, | ||
1440 | .val = PMX_I2S0_MASK | PMX_CLCD1_MASK, | ||
1281 | }, | 1441 | }, |
1282 | }; | 1442 | }; |
1283 | 1443 | ||
@@ -1310,6 +1470,10 @@ static struct spear_muxreg uart5_muxreg[] = { | |||
1310 | .reg = PAD_FUNCTION_EN_0, | 1470 | .reg = PAD_FUNCTION_EN_0, |
1311 | .mask = PMX_CLCD1_MASK, | 1471 | .mask = PMX_CLCD1_MASK, |
1312 | .val = 0, | 1472 | .val = 0, |
1473 | }, { | ||
1474 | .reg = PAD_DIRECTION_SEL_0, | ||
1475 | .mask = PMX_CLCD1_MASK, | ||
1476 | .val = PMX_CLCD1_MASK, | ||
1313 | }, | 1477 | }, |
1314 | }; | 1478 | }; |
1315 | 1479 | ||
@@ -1344,6 +1508,10 @@ static struct spear_muxreg rs485_0_1_tdm_0_1_muxreg[] = { | |||
1344 | .reg = PAD_FUNCTION_EN_0, | 1508 | .reg = PAD_FUNCTION_EN_0, |
1345 | .mask = PMX_CLCD1_MASK, | 1509 | .mask = PMX_CLCD1_MASK, |
1346 | .val = 0, | 1510 | .val = 0, |
1511 | }, { | ||
1512 | .reg = PAD_DIRECTION_SEL_0, | ||
1513 | .mask = PMX_CLCD1_MASK, | ||
1514 | .val = PMX_CLCD1_MASK, | ||
1347 | }, | 1515 | }, |
1348 | }; | 1516 | }; |
1349 | 1517 | ||
@@ -1376,6 +1544,10 @@ static struct spear_muxreg i2c_1_2_muxreg[] = { | |||
1376 | .reg = PAD_FUNCTION_EN_0, | 1544 | .reg = PAD_FUNCTION_EN_0, |
1377 | .mask = PMX_CLCD1_MASK, | 1545 | .mask = PMX_CLCD1_MASK, |
1378 | .val = 0, | 1546 | .val = 0, |
1547 | }, { | ||
1548 | .reg = PAD_DIRECTION_SEL_0, | ||
1549 | .mask = PMX_CLCD1_MASK, | ||
1550 | .val = PMX_CLCD1_MASK, | ||
1379 | }, | 1551 | }, |
1380 | }; | 1552 | }; |
1381 | 1553 | ||
@@ -1409,6 +1581,10 @@ static struct spear_muxreg i2c3_dis_smi_clcd_muxreg[] = { | |||
1409 | .reg = PAD_FUNCTION_EN_0, | 1581 | .reg = PAD_FUNCTION_EN_0, |
1410 | .mask = PMX_CLCD1_MASK | PMX_SMI_MASK, | 1582 | .mask = PMX_CLCD1_MASK | PMX_SMI_MASK, |
1411 | .val = 0, | 1583 | .val = 0, |
1584 | }, { | ||
1585 | .reg = PAD_DIRECTION_SEL_0, | ||
1586 | .mask = PMX_CLCD1_MASK | PMX_SMI_MASK, | ||
1587 | .val = PMX_CLCD1_MASK | PMX_SMI_MASK, | ||
1412 | }, | 1588 | }, |
1413 | }; | 1589 | }; |
1414 | 1590 | ||
@@ -1435,6 +1611,10 @@ static struct spear_muxreg i2c3_dis_sd_i2s0_muxreg[] = { | |||
1435 | .reg = PAD_FUNCTION_EN_1, | 1611 | .reg = PAD_FUNCTION_EN_1, |
1436 | .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, | 1612 | .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, |
1437 | .val = 0, | 1613 | .val = 0, |
1614 | }, { | ||
1615 | .reg = PAD_DIRECTION_SEL_1, | ||
1616 | .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, | ||
1617 | .val = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, | ||
1438 | }, | 1618 | }, |
1439 | }; | 1619 | }; |
1440 | 1620 | ||
@@ -1469,6 +1649,10 @@ static struct spear_muxreg i2c_4_5_dis_smi_muxreg[] = { | |||
1469 | .reg = PAD_FUNCTION_EN_0, | 1649 | .reg = PAD_FUNCTION_EN_0, |
1470 | .mask = PMX_SMI_MASK, | 1650 | .mask = PMX_SMI_MASK, |
1471 | .val = 0, | 1651 | .val = 0, |
1652 | }, { | ||
1653 | .reg = PAD_DIRECTION_SEL_0, | ||
1654 | .mask = PMX_SMI_MASK, | ||
1655 | .val = PMX_SMI_MASK, | ||
1472 | }, | 1656 | }, |
1473 | }; | 1657 | }; |
1474 | 1658 | ||
@@ -1499,6 +1683,14 @@ static struct spear_muxreg i2c4_dis_sd_muxreg[] = { | |||
1499 | .reg = PAD_FUNCTION_EN_2, | 1683 | .reg = PAD_FUNCTION_EN_2, |
1500 | .mask = PMX_MCIDATA5_MASK, | 1684 | .mask = PMX_MCIDATA5_MASK, |
1501 | .val = 0, | 1685 | .val = 0, |
1686 | }, { | ||
1687 | .reg = PAD_DIRECTION_SEL_1, | ||
1688 | .mask = PMX_MCIDATA4_MASK, | ||
1689 | .val = PMX_MCIDATA4_MASK, | ||
1690 | }, { | ||
1691 | .reg = PAD_DIRECTION_SEL_2, | ||
1692 | .mask = PMX_MCIDATA5_MASK, | ||
1693 | .val = PMX_MCIDATA5_MASK, | ||
1502 | }, | 1694 | }, |
1503 | }; | 1695 | }; |
1504 | 1696 | ||
@@ -1526,6 +1718,12 @@ static struct spear_muxreg i2c5_dis_sd_muxreg[] = { | |||
1526 | .mask = PMX_MCIDATA6_MASK | | 1718 | .mask = PMX_MCIDATA6_MASK | |
1527 | PMX_MCIDATA7_MASK, | 1719 | PMX_MCIDATA7_MASK, |
1528 | .val = 0, | 1720 | .val = 0, |
1721 | }, { | ||
1722 | .reg = PAD_DIRECTION_SEL_2, | ||
1723 | .mask = PMX_MCIDATA6_MASK | | ||
1724 | PMX_MCIDATA7_MASK, | ||
1725 | .val = PMX_MCIDATA6_MASK | | ||
1726 | PMX_MCIDATA7_MASK, | ||
1529 | }, | 1727 | }, |
1530 | }; | 1728 | }; |
1531 | 1729 | ||
@@ -1560,6 +1758,10 @@ static struct spear_muxreg i2c_6_7_dis_kbd_muxreg[] = { | |||
1560 | .reg = PAD_FUNCTION_EN_1, | 1758 | .reg = PAD_FUNCTION_EN_1, |
1561 | .mask = PMX_KBD_ROWCOL25_MASK, | 1759 | .mask = PMX_KBD_ROWCOL25_MASK, |
1562 | .val = 0, | 1760 | .val = 0, |
1761 | }, { | ||
1762 | .reg = PAD_DIRECTION_SEL_1, | ||
1763 | .mask = PMX_KBD_ROWCOL25_MASK, | ||
1764 | .val = PMX_KBD_ROWCOL25_MASK, | ||
1563 | }, | 1765 | }, |
1564 | }; | 1766 | }; |
1565 | 1767 | ||
@@ -1587,6 +1789,12 @@ static struct spear_muxreg i2c6_dis_sd_muxreg[] = { | |||
1587 | .mask = PMX_MCIIORDRE_MASK | | 1789 | .mask = PMX_MCIIORDRE_MASK | |
1588 | PMX_MCIIOWRWE_MASK, | 1790 | PMX_MCIIOWRWE_MASK, |
1589 | .val = 0, | 1791 | .val = 0, |
1792 | }, { | ||
1793 | .reg = PAD_DIRECTION_SEL_2, | ||
1794 | .mask = PMX_MCIIORDRE_MASK | | ||
1795 | PMX_MCIIOWRWE_MASK, | ||
1796 | .val = PMX_MCIIORDRE_MASK | | ||
1797 | PMX_MCIIOWRWE_MASK, | ||
1590 | }, | 1798 | }, |
1591 | }; | 1799 | }; |
1592 | 1800 | ||
@@ -1613,6 +1821,12 @@ static struct spear_muxreg i2c7_dis_sd_muxreg[] = { | |||
1613 | .mask = PMX_MCIRESETCF_MASK | | 1821 | .mask = PMX_MCIRESETCF_MASK | |
1614 | PMX_MCICS0CE_MASK, | 1822 | PMX_MCICS0CE_MASK, |
1615 | .val = 0, | 1823 | .val = 0, |
1824 | }, { | ||
1825 | .reg = PAD_DIRECTION_SEL_2, | ||
1826 | .mask = PMX_MCIRESETCF_MASK | | ||
1827 | PMX_MCICS0CE_MASK, | ||
1828 | .val = PMX_MCIRESETCF_MASK | | ||
1829 | PMX_MCICS0CE_MASK, | ||
1616 | }, | 1830 | }, |
1617 | }; | 1831 | }; |
1618 | 1832 | ||
@@ -1651,6 +1865,14 @@ static struct spear_muxreg can0_dis_nor_muxreg[] = { | |||
1651 | .reg = PAD_FUNCTION_EN_1, | 1865 | .reg = PAD_FUNCTION_EN_1, |
1652 | .mask = PMX_NFRSTPWDWN3_MASK, | 1866 | .mask = PMX_NFRSTPWDWN3_MASK, |
1653 | .val = 0, | 1867 | .val = 0, |
1868 | }, { | ||
1869 | .reg = PAD_DIRECTION_SEL_0, | ||
1870 | .mask = PMX_NFRSTPWDWN2_MASK, | ||
1871 | .val = PMX_NFRSTPWDWN2_MASK, | ||
1872 | }, { | ||
1873 | .reg = PAD_DIRECTION_SEL_1, | ||
1874 | .mask = PMX_NFRSTPWDWN3_MASK, | ||
1875 | .val = PMX_NFRSTPWDWN3_MASK, | ||
1654 | }, | 1876 | }, |
1655 | }; | 1877 | }; |
1656 | 1878 | ||
@@ -1677,6 +1899,10 @@ static struct spear_muxreg can0_dis_sd_muxreg[] = { | |||
1677 | .reg = PAD_FUNCTION_EN_2, | 1899 | .reg = PAD_FUNCTION_EN_2, |
1678 | .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, | 1900 | .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, |
1679 | .val = 0, | 1901 | .val = 0, |
1902 | }, { | ||
1903 | .reg = PAD_DIRECTION_SEL_2, | ||
1904 | .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, | ||
1905 | .val = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, | ||
1680 | }, | 1906 | }, |
1681 | }; | 1907 | }; |
1682 | 1908 | ||
@@ -1711,6 +1937,10 @@ static struct spear_muxreg can1_dis_sd_muxreg[] = { | |||
1711 | .reg = PAD_FUNCTION_EN_2, | 1937 | .reg = PAD_FUNCTION_EN_2, |
1712 | .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, | 1938 | .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, |
1713 | .val = 0, | 1939 | .val = 0, |
1940 | }, { | ||
1941 | .reg = PAD_DIRECTION_SEL_2, | ||
1942 | .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, | ||
1943 | .val = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, | ||
1714 | }, | 1944 | }, |
1715 | }; | 1945 | }; |
1716 | 1946 | ||
@@ -1737,6 +1967,10 @@ static struct spear_muxreg can1_dis_kbd_muxreg[] = { | |||
1737 | .reg = PAD_FUNCTION_EN_1, | 1967 | .reg = PAD_FUNCTION_EN_1, |
1738 | .mask = PMX_KBD_ROWCOL25_MASK, | 1968 | .mask = PMX_KBD_ROWCOL25_MASK, |
1739 | .val = 0, | 1969 | .val = 0, |
1970 | }, { | ||
1971 | .reg = PAD_DIRECTION_SEL_1, | ||
1972 | .mask = PMX_KBD_ROWCOL25_MASK, | ||
1973 | .val = PMX_KBD_ROWCOL25_MASK, | ||
1740 | }, | 1974 | }, |
1741 | }; | 1975 | }; |
1742 | 1976 | ||
@@ -1763,29 +1997,64 @@ static struct spear_function can1_function = { | |||
1763 | .ngroups = ARRAY_SIZE(can1_grps), | 1997 | .ngroups = ARRAY_SIZE(can1_grps), |
1764 | }; | 1998 | }; |
1765 | 1999 | ||
1766 | /* Pad multiplexing for pci device */ | 2000 | /* Pad multiplexing for (ras-ip) pci device */ |
1767 | static const unsigned pci_sata_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18, | 2001 | static const unsigned pci_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18, |
1768 | 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, | 2002 | 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, |
1769 | 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, | 2003 | 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, |
1770 | 55, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 }; | 2004 | 55, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 }; |
1771 | #define PCI_SATA_MUXREG \ | ||
1772 | { \ | ||
1773 | .reg = PAD_FUNCTION_EN_0, \ | ||
1774 | .mask = PMX_MCI_DATA8_15_MASK, \ | ||
1775 | .val = 0, \ | ||
1776 | }, { \ | ||
1777 | .reg = PAD_FUNCTION_EN_1, \ | ||
1778 | .mask = PMX_PCI_REG1_MASK, \ | ||
1779 | .val = 0, \ | ||
1780 | }, { \ | ||
1781 | .reg = PAD_FUNCTION_EN_2, \ | ||
1782 | .mask = PMX_PCI_REG2_MASK, \ | ||
1783 | .val = 0, \ | ||
1784 | } | ||
1785 | 2005 | ||
1786 | /* pad multiplexing for pcie0 device */ | 2006 | static struct spear_muxreg pci_muxreg[] = { |
2007 | { | ||
2008 | .reg = PAD_FUNCTION_EN_0, | ||
2009 | .mask = PMX_MCI_DATA8_15_MASK, | ||
2010 | .val = 0, | ||
2011 | }, { | ||
2012 | .reg = PAD_FUNCTION_EN_1, | ||
2013 | .mask = PMX_PCI_REG1_MASK, | ||
2014 | .val = 0, | ||
2015 | }, { | ||
2016 | .reg = PAD_FUNCTION_EN_2, | ||
2017 | .mask = PMX_PCI_REG2_MASK, | ||
2018 | .val = 0, | ||
2019 | }, { | ||
2020 | .reg = PAD_DIRECTION_SEL_0, | ||
2021 | .mask = PMX_MCI_DATA8_15_MASK, | ||
2022 | .val = PMX_MCI_DATA8_15_MASK, | ||
2023 | }, { | ||
2024 | .reg = PAD_DIRECTION_SEL_1, | ||
2025 | .mask = PMX_PCI_REG1_MASK, | ||
2026 | .val = PMX_PCI_REG1_MASK, | ||
2027 | }, { | ||
2028 | .reg = PAD_DIRECTION_SEL_2, | ||
2029 | .mask = PMX_PCI_REG2_MASK, | ||
2030 | .val = PMX_PCI_REG2_MASK, | ||
2031 | }, | ||
2032 | }; | ||
2033 | |||
2034 | static struct spear_modemux pci_modemux[] = { | ||
2035 | { | ||
2036 | .muxregs = pci_muxreg, | ||
2037 | .nmuxregs = ARRAY_SIZE(pci_muxreg), | ||
2038 | }, | ||
2039 | }; | ||
2040 | |||
2041 | static struct spear_pingroup pci_pingroup = { | ||
2042 | .name = "pci_grp", | ||
2043 | .pins = pci_pins, | ||
2044 | .npins = ARRAY_SIZE(pci_pins), | ||
2045 | .modemuxs = pci_modemux, | ||
2046 | .nmodemuxs = ARRAY_SIZE(pci_modemux), | ||
2047 | }; | ||
2048 | |||
2049 | static const char *const pci_grps[] = { "pci_grp" }; | ||
2050 | static struct spear_function pci_function = { | ||
2051 | .name = "pci", | ||
2052 | .groups = pci_grps, | ||
2053 | .ngroups = ARRAY_SIZE(pci_grps), | ||
2054 | }; | ||
2055 | |||
2056 | /* pad multiplexing for (fix-part) pcie0 device */ | ||
1787 | static struct spear_muxreg pcie0_muxreg[] = { | 2057 | static struct spear_muxreg pcie0_muxreg[] = { |
1788 | PCI_SATA_MUXREG, | ||
1789 | { | 2058 | { |
1790 | .reg = PCIE_SATA_CFG, | 2059 | .reg = PCIE_SATA_CFG, |
1791 | .mask = PCIE_CFG_VAL(0), | 2060 | .mask = PCIE_CFG_VAL(0), |
@@ -1802,15 +2071,12 @@ static struct spear_modemux pcie0_modemux[] = { | |||
1802 | 2071 | ||
1803 | static struct spear_pingroup pcie0_pingroup = { | 2072 | static struct spear_pingroup pcie0_pingroup = { |
1804 | .name = "pcie0_grp", | 2073 | .name = "pcie0_grp", |
1805 | .pins = pci_sata_pins, | ||
1806 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
1807 | .modemuxs = pcie0_modemux, | 2074 | .modemuxs = pcie0_modemux, |
1808 | .nmodemuxs = ARRAY_SIZE(pcie0_modemux), | 2075 | .nmodemuxs = ARRAY_SIZE(pcie0_modemux), |
1809 | }; | 2076 | }; |
1810 | 2077 | ||
1811 | /* pad multiplexing for pcie1 device */ | 2078 | /* pad multiplexing for (fix-part) pcie1 device */ |
1812 | static struct spear_muxreg pcie1_muxreg[] = { | 2079 | static struct spear_muxreg pcie1_muxreg[] = { |
1813 | PCI_SATA_MUXREG, | ||
1814 | { | 2080 | { |
1815 | .reg = PCIE_SATA_CFG, | 2081 | .reg = PCIE_SATA_CFG, |
1816 | .mask = PCIE_CFG_VAL(1), | 2082 | .mask = PCIE_CFG_VAL(1), |
@@ -1827,15 +2093,12 @@ static struct spear_modemux pcie1_modemux[] = { | |||
1827 | 2093 | ||
1828 | static struct spear_pingroup pcie1_pingroup = { | 2094 | static struct spear_pingroup pcie1_pingroup = { |
1829 | .name = "pcie1_grp", | 2095 | .name = "pcie1_grp", |
1830 | .pins = pci_sata_pins, | ||
1831 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
1832 | .modemuxs = pcie1_modemux, | 2096 | .modemuxs = pcie1_modemux, |
1833 | .nmodemuxs = ARRAY_SIZE(pcie1_modemux), | 2097 | .nmodemuxs = ARRAY_SIZE(pcie1_modemux), |
1834 | }; | 2098 | }; |
1835 | 2099 | ||
1836 | /* pad multiplexing for pcie2 device */ | 2100 | /* pad multiplexing for (fix-part) pcie2 device */ |
1837 | static struct spear_muxreg pcie2_muxreg[] = { | 2101 | static struct spear_muxreg pcie2_muxreg[] = { |
1838 | PCI_SATA_MUXREG, | ||
1839 | { | 2102 | { |
1840 | .reg = PCIE_SATA_CFG, | 2103 | .reg = PCIE_SATA_CFG, |
1841 | .mask = PCIE_CFG_VAL(2), | 2104 | .mask = PCIE_CFG_VAL(2), |
@@ -1852,22 +2115,20 @@ static struct spear_modemux pcie2_modemux[] = { | |||
1852 | 2115 | ||
1853 | static struct spear_pingroup pcie2_pingroup = { | 2116 | static struct spear_pingroup pcie2_pingroup = { |
1854 | .name = "pcie2_grp", | 2117 | .name = "pcie2_grp", |
1855 | .pins = pci_sata_pins, | ||
1856 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
1857 | .modemuxs = pcie2_modemux, | 2118 | .modemuxs = pcie2_modemux, |
1858 | .nmodemuxs = ARRAY_SIZE(pcie2_modemux), | 2119 | .nmodemuxs = ARRAY_SIZE(pcie2_modemux), |
1859 | }; | 2120 | }; |
1860 | 2121 | ||
1861 | static const char *const pci_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp" }; | 2122 | static const char *const pcie_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp" |
1862 | static struct spear_function pci_function = { | 2123 | }; |
1863 | .name = "pci", | 2124 | static struct spear_function pcie_function = { |
1864 | .groups = pci_grps, | 2125 | .name = "pci_express", |
1865 | .ngroups = ARRAY_SIZE(pci_grps), | 2126 | .groups = pcie_grps, |
2127 | .ngroups = ARRAY_SIZE(pcie_grps), | ||
1866 | }; | 2128 | }; |
1867 | 2129 | ||
1868 | /* pad multiplexing for sata0 device */ | 2130 | /* pad multiplexing for sata0 device */ |
1869 | static struct spear_muxreg sata0_muxreg[] = { | 2131 | static struct spear_muxreg sata0_muxreg[] = { |
1870 | PCI_SATA_MUXREG, | ||
1871 | { | 2132 | { |
1872 | .reg = PCIE_SATA_CFG, | 2133 | .reg = PCIE_SATA_CFG, |
1873 | .mask = SATA_CFG_VAL(0), | 2134 | .mask = SATA_CFG_VAL(0), |
@@ -1884,15 +2145,12 @@ static struct spear_modemux sata0_modemux[] = { | |||
1884 | 2145 | ||
1885 | static struct spear_pingroup sata0_pingroup = { | 2146 | static struct spear_pingroup sata0_pingroup = { |
1886 | .name = "sata0_grp", | 2147 | .name = "sata0_grp", |
1887 | .pins = pci_sata_pins, | ||
1888 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
1889 | .modemuxs = sata0_modemux, | 2148 | .modemuxs = sata0_modemux, |
1890 | .nmodemuxs = ARRAY_SIZE(sata0_modemux), | 2149 | .nmodemuxs = ARRAY_SIZE(sata0_modemux), |
1891 | }; | 2150 | }; |
1892 | 2151 | ||
1893 | /* pad multiplexing for sata1 device */ | 2152 | /* pad multiplexing for sata1 device */ |
1894 | static struct spear_muxreg sata1_muxreg[] = { | 2153 | static struct spear_muxreg sata1_muxreg[] = { |
1895 | PCI_SATA_MUXREG, | ||
1896 | { | 2154 | { |
1897 | .reg = PCIE_SATA_CFG, | 2155 | .reg = PCIE_SATA_CFG, |
1898 | .mask = SATA_CFG_VAL(1), | 2156 | .mask = SATA_CFG_VAL(1), |
@@ -1909,15 +2167,12 @@ static struct spear_modemux sata1_modemux[] = { | |||
1909 | 2167 | ||
1910 | static struct spear_pingroup sata1_pingroup = { | 2168 | static struct spear_pingroup sata1_pingroup = { |
1911 | .name = "sata1_grp", | 2169 | .name = "sata1_grp", |
1912 | .pins = pci_sata_pins, | ||
1913 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
1914 | .modemuxs = sata1_modemux, | 2170 | .modemuxs = sata1_modemux, |
1915 | .nmodemuxs = ARRAY_SIZE(sata1_modemux), | 2171 | .nmodemuxs = ARRAY_SIZE(sata1_modemux), |
1916 | }; | 2172 | }; |
1917 | 2173 | ||
1918 | /* pad multiplexing for sata2 device */ | 2174 | /* pad multiplexing for sata2 device */ |
1919 | static struct spear_muxreg sata2_muxreg[] = { | 2175 | static struct spear_muxreg sata2_muxreg[] = { |
1920 | PCI_SATA_MUXREG, | ||
1921 | { | 2176 | { |
1922 | .reg = PCIE_SATA_CFG, | 2177 | .reg = PCIE_SATA_CFG, |
1923 | .mask = SATA_CFG_VAL(2), | 2178 | .mask = SATA_CFG_VAL(2), |
@@ -1934,8 +2189,6 @@ static struct spear_modemux sata2_modemux[] = { | |||
1934 | 2189 | ||
1935 | static struct spear_pingroup sata2_pingroup = { | 2190 | static struct spear_pingroup sata2_pingroup = { |
1936 | .name = "sata2_grp", | 2191 | .name = "sata2_grp", |
1937 | .pins = pci_sata_pins, | ||
1938 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
1939 | .modemuxs = sata2_modemux, | 2192 | .modemuxs = sata2_modemux, |
1940 | .nmodemuxs = ARRAY_SIZE(sata2_modemux), | 2193 | .nmodemuxs = ARRAY_SIZE(sata2_modemux), |
1941 | }; | 2194 | }; |
@@ -1957,6 +2210,14 @@ static struct spear_muxreg ssp1_dis_kbd_muxreg[] = { | |||
1957 | PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | | 2210 | PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | |
1958 | PMX_NFCE2_MASK, | 2211 | PMX_NFCE2_MASK, |
1959 | .val = 0, | 2212 | .val = 0, |
2213 | }, { | ||
2214 | .reg = PAD_DIRECTION_SEL_1, | ||
2215 | .mask = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK | | ||
2216 | PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | | ||
2217 | PMX_NFCE2_MASK, | ||
2218 | .val = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK | | ||
2219 | PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | | ||
2220 | PMX_NFCE2_MASK, | ||
1960 | }, | 2221 | }, |
1961 | }; | 2222 | }; |
1962 | 2223 | ||
@@ -1983,6 +2244,12 @@ static struct spear_muxreg ssp1_dis_sd_muxreg[] = { | |||
1983 | .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | | 2244 | .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | |
1984 | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, | 2245 | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, |
1985 | .val = 0, | 2246 | .val = 0, |
2247 | }, { | ||
2248 | .reg = PAD_DIRECTION_SEL_2, | ||
2249 | .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | | ||
2250 | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, | ||
2251 | .val = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | | ||
2252 | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, | ||
1986 | }, | 2253 | }, |
1987 | }; | 2254 | }; |
1988 | 2255 | ||
@@ -2017,6 +2284,12 @@ static struct spear_muxreg gpt64_muxreg[] = { | |||
2017 | .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK | 2284 | .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK |
2018 | | PMX_MCILEDS_MASK, | 2285 | | PMX_MCILEDS_MASK, |
2019 | .val = 0, | 2286 | .val = 0, |
2287 | }, { | ||
2288 | .reg = PAD_DIRECTION_SEL_2, | ||
2289 | .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK | ||
2290 | | PMX_MCILEDS_MASK, | ||
2291 | .val = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK | ||
2292 | | PMX_MCILEDS_MASK, | ||
2020 | }, | 2293 | }, |
2021 | }; | 2294 | }; |
2022 | 2295 | ||
@@ -2093,6 +2366,7 @@ static struct spear_pingroup *spear1310_pingroups[] = { | |||
2093 | &can0_dis_sd_pingroup, | 2366 | &can0_dis_sd_pingroup, |
2094 | &can1_dis_sd_pingroup, | 2367 | &can1_dis_sd_pingroup, |
2095 | &can1_dis_kbd_pingroup, | 2368 | &can1_dis_kbd_pingroup, |
2369 | &pci_pingroup, | ||
2096 | &pcie0_pingroup, | 2370 | &pcie0_pingroup, |
2097 | &pcie1_pingroup, | 2371 | &pcie1_pingroup, |
2098 | &pcie2_pingroup, | 2372 | &pcie2_pingroup, |
@@ -2138,6 +2412,7 @@ static struct spear_function *spear1310_functions[] = { | |||
2138 | &can0_function, | 2412 | &can0_function, |
2139 | &can1_function, | 2413 | &can1_function, |
2140 | &pci_function, | 2414 | &pci_function, |
2415 | &pcie_function, | ||
2141 | &sata_function, | 2416 | &sata_function, |
2142 | &ssp1_function, | 2417 | &ssp1_function, |
2143 | &gpt64_function, | 2418 | &gpt64_function, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear1340.c b/drivers/pinctrl/spear/pinctrl-spear1340.c index a0eb057e55bd..0606b8cf3f2c 100644 --- a/drivers/pinctrl/spear/pinctrl-spear1340.c +++ b/drivers/pinctrl/spear/pinctrl-spear1340.c | |||
@@ -213,7 +213,7 @@ static const struct pinctrl_pin_desc spear1340_pins[] = { | |||
213 | * Pad multiplexing for making all pads as gpio's. This is done to override the | 213 | * Pad multiplexing for making all pads as gpio's. This is done to override the |
214 | * values passed from bootloader and start from scratch. | 214 | * values passed from bootloader and start from scratch. |
215 | */ | 215 | */ |
216 | static const unsigned pads_as_gpio_pins[] = { 251 }; | 216 | static const unsigned pads_as_gpio_pins[] = { 12, 88, 89, 251 }; |
217 | static struct spear_muxreg pads_as_gpio_muxreg[] = { | 217 | static struct spear_muxreg pads_as_gpio_muxreg[] = { |
218 | { | 218 | { |
219 | .reg = PAD_FUNCTION_EN_1, | 219 | .reg = PAD_FUNCTION_EN_1, |
@@ -1692,7 +1692,43 @@ static struct spear_pingroup clcd_pingroup = { | |||
1692 | .nmodemuxs = ARRAY_SIZE(clcd_modemux), | 1692 | .nmodemuxs = ARRAY_SIZE(clcd_modemux), |
1693 | }; | 1693 | }; |
1694 | 1694 | ||
1695 | static const char *const clcd_grps[] = { "clcd_grp" }; | 1695 | /* Disable cld runtime to save panel damage */ |
1696 | static struct spear_muxreg clcd_sleep_muxreg[] = { | ||
1697 | { | ||
1698 | .reg = PAD_SHARED_IP_EN_1, | ||
1699 | .mask = ARM_TRACE_MASK | MIPHY_DBG_MASK, | ||
1700 | .val = 0, | ||
1701 | }, { | ||
1702 | .reg = PAD_FUNCTION_EN_5, | ||
1703 | .mask = CLCD_REG4_MASK | CLCD_AND_ARM_TRACE_REG4_MASK, | ||
1704 | .val = 0x0, | ||
1705 | }, { | ||
1706 | .reg = PAD_FUNCTION_EN_6, | ||
1707 | .mask = CLCD_AND_ARM_TRACE_REG5_MASK, | ||
1708 | .val = 0x0, | ||
1709 | }, { | ||
1710 | .reg = PAD_FUNCTION_EN_7, | ||
1711 | .mask = CLCD_AND_ARM_TRACE_REG6_MASK, | ||
1712 | .val = 0x0, | ||
1713 | }, | ||
1714 | }; | ||
1715 | |||
1716 | static struct spear_modemux clcd_sleep_modemux[] = { | ||
1717 | { | ||
1718 | .muxregs = clcd_sleep_muxreg, | ||
1719 | .nmuxregs = ARRAY_SIZE(clcd_sleep_muxreg), | ||
1720 | }, | ||
1721 | }; | ||
1722 | |||
1723 | static struct spear_pingroup clcd_sleep_pingroup = { | ||
1724 | .name = "clcd_sleep_grp", | ||
1725 | .pins = clcd_pins, | ||
1726 | .npins = ARRAY_SIZE(clcd_pins), | ||
1727 | .modemuxs = clcd_sleep_modemux, | ||
1728 | .nmodemuxs = ARRAY_SIZE(clcd_sleep_modemux), | ||
1729 | }; | ||
1730 | |||
1731 | static const char *const clcd_grps[] = { "clcd_grp", "clcd_sleep_grp" }; | ||
1696 | static struct spear_function clcd_function = { | 1732 | static struct spear_function clcd_function = { |
1697 | .name = "clcd", | 1733 | .name = "clcd", |
1698 | .groups = clcd_grps, | 1734 | .groups = clcd_grps, |
@@ -1893,6 +1929,7 @@ static struct spear_pingroup *spear1340_pingroups[] = { | |||
1893 | &sdhci_pingroup, | 1929 | &sdhci_pingroup, |
1894 | &cf_pingroup, | 1930 | &cf_pingroup, |
1895 | &xd_pingroup, | 1931 | &xd_pingroup, |
1932 | &clcd_sleep_pingroup, | ||
1896 | &clcd_pingroup, | 1933 | &clcd_pingroup, |
1897 | &arm_trace_pingroup, | 1934 | &arm_trace_pingroup, |
1898 | &miphy_dbg_pingroup, | 1935 | &miphy_dbg_pingroup, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear320.c b/drivers/pinctrl/spear/pinctrl-spear320.c index 020b1e0bdb3e..ca47b0e50780 100644 --- a/drivers/pinctrl/spear/pinctrl-spear320.c +++ b/drivers/pinctrl/spear/pinctrl-spear320.c | |||
@@ -2240,6 +2240,10 @@ static struct spear_muxreg pwm2_pin_34_muxreg[] = { | |||
2240 | .mask = PMX_SSP_CS_MASK, | 2240 | .mask = PMX_SSP_CS_MASK, |
2241 | .val = 0, | 2241 | .val = 0, |
2242 | }, { | 2242 | }, { |
2243 | .reg = MODE_CONFIG_REG, | ||
2244 | .mask = PMX_PWM_MASK, | ||
2245 | .val = PMX_PWM_MASK, | ||
2246 | }, { | ||
2243 | .reg = IP_SEL_PAD_30_39_REG, | 2247 | .reg = IP_SEL_PAD_30_39_REG, |
2244 | .mask = PMX_PL_34_MASK, | 2248 | .mask = PMX_PL_34_MASK, |
2245 | .val = PMX_PWM2_PL_34_VAL, | 2249 | .val = PMX_PWM2_PL_34_VAL, |
@@ -2956,9 +2960,9 @@ static struct spear_function mii2_function = { | |||
2956 | }; | 2960 | }; |
2957 | 2961 | ||
2958 | /* Pad multiplexing for cadence mii 1_2 as smii or rmii device */ | 2962 | /* Pad multiplexing for cadence mii 1_2 as smii or rmii device */ |
2959 | static const unsigned smii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20, | 2963 | static const unsigned rmii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20, |
2960 | 21, 22, 23, 24, 25, 26, 27 }; | 2964 | 21, 22, 23, 24, 25, 26, 27 }; |
2961 | static const unsigned rmii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 }; | 2965 | static const unsigned smii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 }; |
2962 | static struct spear_muxreg mii0_1_muxreg[] = { | 2966 | static struct spear_muxreg mii0_1_muxreg[] = { |
2963 | { | 2967 | { |
2964 | .reg = PMX_CONFIG_REG, | 2968 | .reg = PMX_CONFIG_REG, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear3xx.h b/drivers/pinctrl/spear/pinctrl-spear3xx.h index 31f44347f17c..7860b36053c4 100644 --- a/drivers/pinctrl/spear/pinctrl-spear3xx.h +++ b/drivers/pinctrl/spear/pinctrl-spear3xx.h | |||
@@ -15,6 +15,7 @@ | |||
15 | #include "pinctrl-spear.h" | 15 | #include "pinctrl-spear.h" |
16 | 16 | ||
17 | /* pad mux declarations */ | 17 | /* pad mux declarations */ |
18 | #define PMX_PWM_MASK (1 << 16) | ||
18 | #define PMX_FIRDA_MASK (1 << 14) | 19 | #define PMX_FIRDA_MASK (1 << 14) |
19 | #define PMX_I2C_MASK (1 << 13) | 20 | #define PMX_I2C_MASK (1 << 13) |
20 | #define PMX_SSP_CS_MASK (1 << 12) | 21 | #define PMX_SSP_CS_MASK (1 << 12) |
diff --git a/drivers/rapidio/rio.c b/drivers/rapidio/rio.c index c17ae22567e0..0c6fcb461faf 100644 --- a/drivers/rapidio/rio.c +++ b/drivers/rapidio/rio.c | |||
@@ -401,7 +401,7 @@ EXPORT_SYMBOL_GPL(rio_release_inb_pwrite); | |||
401 | /** | 401 | /** |
402 | * rio_map_inb_region -- Map inbound memory region. | 402 | * rio_map_inb_region -- Map inbound memory region. |
403 | * @mport: Master port. | 403 | * @mport: Master port. |
404 | * @lstart: physical address of memory region to be mapped | 404 | * @local: physical address of memory region to be mapped |
405 | * @rbase: RIO base address assigned to this window | 405 | * @rbase: RIO base address assigned to this window |
406 | * @size: Size of the memory region | 406 | * @size: Size of the memory region |
407 | * @rflags: Flags for mapping. | 407 | * @rflags: Flags for mapping. |
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c index 5c4829cba6a6..e872c8be080e 100644 --- a/drivers/regulator/core.c +++ b/drivers/regulator/core.c | |||
@@ -1381,22 +1381,14 @@ struct regulator *regulator_get_exclusive(struct device *dev, const char *id) | |||
1381 | } | 1381 | } |
1382 | EXPORT_SYMBOL_GPL(regulator_get_exclusive); | 1382 | EXPORT_SYMBOL_GPL(regulator_get_exclusive); |
1383 | 1383 | ||
1384 | /** | 1384 | /* Locks held by regulator_put() */ |
1385 | * regulator_put - "free" the regulator source | 1385 | static void _regulator_put(struct regulator *regulator) |
1386 | * @regulator: regulator source | ||
1387 | * | ||
1388 | * Note: drivers must ensure that all regulator_enable calls made on this | ||
1389 | * regulator source are balanced by regulator_disable calls prior to calling | ||
1390 | * this function. | ||
1391 | */ | ||
1392 | void regulator_put(struct regulator *regulator) | ||
1393 | { | 1386 | { |
1394 | struct regulator_dev *rdev; | 1387 | struct regulator_dev *rdev; |
1395 | 1388 | ||
1396 | if (regulator == NULL || IS_ERR(regulator)) | 1389 | if (regulator == NULL || IS_ERR(regulator)) |
1397 | return; | 1390 | return; |
1398 | 1391 | ||
1399 | mutex_lock(®ulator_list_mutex); | ||
1400 | rdev = regulator->rdev; | 1392 | rdev = regulator->rdev; |
1401 | 1393 | ||
1402 | debugfs_remove_recursive(regulator->debugfs); | 1394 | debugfs_remove_recursive(regulator->debugfs); |
@@ -1412,6 +1404,20 @@ void regulator_put(struct regulator *regulator) | |||
1412 | rdev->exclusive = 0; | 1404 | rdev->exclusive = 0; |
1413 | 1405 | ||
1414 | module_put(rdev->owner); | 1406 | module_put(rdev->owner); |
1407 | } | ||
1408 | |||
1409 | /** | ||
1410 | * regulator_put - "free" the regulator source | ||
1411 | * @regulator: regulator source | ||
1412 | * | ||
1413 | * Note: drivers must ensure that all regulator_enable calls made on this | ||
1414 | * regulator source are balanced by regulator_disable calls prior to calling | ||
1415 | * this function. | ||
1416 | */ | ||
1417 | void regulator_put(struct regulator *regulator) | ||
1418 | { | ||
1419 | mutex_lock(®ulator_list_mutex); | ||
1420 | _regulator_put(regulator); | ||
1415 | mutex_unlock(®ulator_list_mutex); | 1421 | mutex_unlock(®ulator_list_mutex); |
1416 | } | 1422 | } |
1417 | EXPORT_SYMBOL_GPL(regulator_put); | 1423 | EXPORT_SYMBOL_GPL(regulator_put); |
@@ -1974,7 +1980,7 @@ int regulator_is_supported_voltage(struct regulator *regulator, | |||
1974 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) { | 1980 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) { |
1975 | ret = regulator_get_voltage(regulator); | 1981 | ret = regulator_get_voltage(regulator); |
1976 | if (ret >= 0) | 1982 | if (ret >= 0) |
1977 | return (min_uV >= ret && ret <= max_uV); | 1983 | return (min_uV <= ret && ret <= max_uV); |
1978 | else | 1984 | else |
1979 | return ret; | 1985 | return ret; |
1980 | } | 1986 | } |
@@ -3365,7 +3371,7 @@ regulator_register(const struct regulator_desc *regulator_desc, | |||
3365 | if (ret != 0) { | 3371 | if (ret != 0) { |
3366 | rdev_err(rdev, "Failed to request enable GPIO%d: %d\n", | 3372 | rdev_err(rdev, "Failed to request enable GPIO%d: %d\n", |
3367 | config->ena_gpio, ret); | 3373 | config->ena_gpio, ret); |
3368 | goto clean; | 3374 | goto wash; |
3369 | } | 3375 | } |
3370 | 3376 | ||
3371 | rdev->ena_gpio = config->ena_gpio; | 3377 | rdev->ena_gpio = config->ena_gpio; |
@@ -3445,10 +3451,11 @@ unset_supplies: | |||
3445 | 3451 | ||
3446 | scrub: | 3452 | scrub: |
3447 | if (rdev->supply) | 3453 | if (rdev->supply) |
3448 | regulator_put(rdev->supply); | 3454 | _regulator_put(rdev->supply); |
3449 | if (rdev->ena_gpio) | 3455 | if (rdev->ena_gpio) |
3450 | gpio_free(rdev->ena_gpio); | 3456 | gpio_free(rdev->ena_gpio); |
3451 | kfree(rdev->constraints); | 3457 | kfree(rdev->constraints); |
3458 | wash: | ||
3452 | device_unregister(&rdev->dev); | 3459 | device_unregister(&rdev->dev); |
3453 | /* device core frees rdev */ | 3460 | /* device core frees rdev */ |
3454 | rdev = ERR_PTR(ret); | 3461 | rdev = ERR_PTR(ret); |
diff --git a/drivers/s390/char/con3215.c b/drivers/s390/char/con3215.c index 9ffb6d5f17aa..4ed343e4eb41 100644 --- a/drivers/s390/char/con3215.c +++ b/drivers/s390/char/con3215.c | |||
@@ -44,7 +44,6 @@ | |||
44 | #define RAW3215_NR_CCWS 3 | 44 | #define RAW3215_NR_CCWS 3 |
45 | #define RAW3215_TIMEOUT HZ/10 /* time for delayed output */ | 45 | #define RAW3215_TIMEOUT HZ/10 /* time for delayed output */ |
46 | 46 | ||
47 | #define RAW3215_FIXED 1 /* 3215 console device is not be freed */ | ||
48 | #define RAW3215_WORKING 4 /* set if a request is being worked on */ | 47 | #define RAW3215_WORKING 4 /* set if a request is being worked on */ |
49 | #define RAW3215_THROTTLED 8 /* set if reading is disabled */ | 48 | #define RAW3215_THROTTLED 8 /* set if reading is disabled */ |
50 | #define RAW3215_STOPPED 16 /* set if writing is disabled */ | 49 | #define RAW3215_STOPPED 16 /* set if writing is disabled */ |
@@ -339,8 +338,10 @@ static void raw3215_wakeup(unsigned long data) | |||
339 | struct tty_struct *tty; | 338 | struct tty_struct *tty; |
340 | 339 | ||
341 | tty = tty_port_tty_get(&raw->port); | 340 | tty = tty_port_tty_get(&raw->port); |
342 | tty_wakeup(tty); | 341 | if (tty) { |
343 | tty_kref_put(tty); | 342 | tty_wakeup(tty); |
343 | tty_kref_put(tty); | ||
344 | } | ||
344 | } | 345 | } |
345 | 346 | ||
346 | /* | 347 | /* |
@@ -629,8 +630,7 @@ static void raw3215_shutdown(struct raw3215_info *raw) | |||
629 | DECLARE_WAITQUEUE(wait, current); | 630 | DECLARE_WAITQUEUE(wait, current); |
630 | unsigned long flags; | 631 | unsigned long flags; |
631 | 632 | ||
632 | if (!(raw->port.flags & ASYNC_INITIALIZED) || | 633 | if (!(raw->port.flags & ASYNC_INITIALIZED)) |
633 | (raw->flags & RAW3215_FIXED)) | ||
634 | return; | 634 | return; |
635 | /* Wait for outstanding requests, then free irq */ | 635 | /* Wait for outstanding requests, then free irq */ |
636 | spin_lock_irqsave(get_ccwdev_lock(raw->cdev), flags); | 636 | spin_lock_irqsave(get_ccwdev_lock(raw->cdev), flags); |
@@ -926,8 +926,6 @@ static int __init con3215_init(void) | |||
926 | dev_set_drvdata(&cdev->dev, raw); | 926 | dev_set_drvdata(&cdev->dev, raw); |
927 | cdev->handler = raw3215_irq; | 927 | cdev->handler = raw3215_irq; |
928 | 928 | ||
929 | raw->flags |= RAW3215_FIXED; | ||
930 | |||
931 | /* Request the console irq */ | 929 | /* Request the console irq */ |
932 | if (raw3215_startup(raw) != 0) { | 930 | if (raw3215_startup(raw) != 0) { |
933 | raw3215_free_info(raw); | 931 | raw3215_free_info(raw); |
diff --git a/drivers/s390/cio/css.h b/drivers/s390/cio/css.h index 33bb4d891e16..4af3dfe70ef5 100644 --- a/drivers/s390/cio/css.h +++ b/drivers/s390/cio/css.h | |||
@@ -112,9 +112,6 @@ extern int for_each_subchannel(int(*fn)(struct subchannel_id, void *), void *); | |||
112 | extern void css_reiterate_subchannels(void); | 112 | extern void css_reiterate_subchannels(void); |
113 | void css_update_ssd_info(struct subchannel *sch); | 113 | void css_update_ssd_info(struct subchannel *sch); |
114 | 114 | ||
115 | #define __MAX_SUBCHANNEL 65535 | ||
116 | #define __MAX_SSID 3 | ||
117 | |||
118 | struct channel_subsystem { | 115 | struct channel_subsystem { |
119 | u8 cssid; | 116 | u8 cssid; |
120 | int valid; | 117 | int valid; |
diff --git a/drivers/s390/cio/device.c b/drivers/s390/cio/device.c index fc916f5d7314..fd3143c291c6 100644 --- a/drivers/s390/cio/device.c +++ b/drivers/s390/cio/device.c | |||
@@ -1424,7 +1424,7 @@ static enum io_sch_action sch_get_action(struct subchannel *sch) | |||
1424 | } | 1424 | } |
1425 | if (device_is_disconnected(cdev)) | 1425 | if (device_is_disconnected(cdev)) |
1426 | return IO_SCH_REPROBE; | 1426 | return IO_SCH_REPROBE; |
1427 | if (cdev->online) | 1427 | if (cdev->online && !cdev->private->flags.resuming) |
1428 | return IO_SCH_VERIFY; | 1428 | return IO_SCH_VERIFY; |
1429 | if (cdev->private->state == DEV_STATE_NOT_OPER) | 1429 | if (cdev->private->state == DEV_STATE_NOT_OPER) |
1430 | return IO_SCH_UNREG_ATTACH; | 1430 | return IO_SCH_UNREG_ATTACH; |
@@ -1469,12 +1469,6 @@ static int io_subchannel_sch_event(struct subchannel *sch, int process) | |||
1469 | rc = 0; | 1469 | rc = 0; |
1470 | goto out_unlock; | 1470 | goto out_unlock; |
1471 | case IO_SCH_VERIFY: | 1471 | case IO_SCH_VERIFY: |
1472 | if (cdev->private->flags.resuming == 1) { | ||
1473 | if (cio_enable_subchannel(sch, (u32)(addr_t)sch)) { | ||
1474 | ccw_device_set_notoper(cdev); | ||
1475 | break; | ||
1476 | } | ||
1477 | } | ||
1478 | /* Trigger path verification. */ | 1472 | /* Trigger path verification. */ |
1479 | io_subchannel_verify(sch); | 1473 | io_subchannel_verify(sch); |
1480 | rc = 0; | 1474 | rc = 0; |
diff --git a/drivers/s390/cio/idset.c b/drivers/s390/cio/idset.c index 199bc6791177..65d13e38803f 100644 --- a/drivers/s390/cio/idset.c +++ b/drivers/s390/cio/idset.c | |||
@@ -125,8 +125,7 @@ int idset_is_empty(struct idset *set) | |||
125 | 125 | ||
126 | void idset_add_set(struct idset *to, struct idset *from) | 126 | void idset_add_set(struct idset *to, struct idset *from) |
127 | { | 127 | { |
128 | int len = min(__BITOPS_WORDS(to->num_ssid * to->num_id), | 128 | int len = min(to->num_ssid * to->num_id, from->num_ssid * from->num_id); |
129 | __BITOPS_WORDS(from->num_ssid * from->num_id)); | ||
130 | 129 | ||
131 | bitmap_or(to->bitmap, to->bitmap, from->bitmap, len); | 130 | bitmap_or(to->bitmap, to->bitmap, from->bitmap, len); |
132 | } | 131 | } |
diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c index 3e25d3150456..4d6ba00d0047 100644 --- a/drivers/s390/net/qeth_core_main.c +++ b/drivers/s390/net/qeth_core_main.c | |||
@@ -2942,13 +2942,33 @@ static int qeth_query_ipassists_cb(struct qeth_card *card, | |||
2942 | QETH_DBF_TEXT(SETUP, 2, "qipasscb"); | 2942 | QETH_DBF_TEXT(SETUP, 2, "qipasscb"); |
2943 | 2943 | ||
2944 | cmd = (struct qeth_ipa_cmd *) data; | 2944 | cmd = (struct qeth_ipa_cmd *) data; |
2945 | |||
2946 | switch (cmd->hdr.return_code) { | ||
2947 | case IPA_RC_NOTSUPP: | ||
2948 | case IPA_RC_L2_UNSUPPORTED_CMD: | ||
2949 | QETH_DBF_TEXT(SETUP, 2, "ipaunsup"); | ||
2950 | card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS; | ||
2951 | card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS; | ||
2952 | return -0; | ||
2953 | default: | ||
2954 | if (cmd->hdr.return_code) { | ||
2955 | QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled " | ||
2956 | "rc=%d\n", | ||
2957 | dev_name(&card->gdev->dev), | ||
2958 | cmd->hdr.return_code); | ||
2959 | return 0; | ||
2960 | } | ||
2961 | } | ||
2962 | |||
2945 | if (cmd->hdr.prot_version == QETH_PROT_IPV4) { | 2963 | if (cmd->hdr.prot_version == QETH_PROT_IPV4) { |
2946 | card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; | 2964 | card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; |
2947 | card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; | 2965 | card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; |
2948 | } else { | 2966 | } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) { |
2949 | card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; | 2967 | card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; |
2950 | card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; | 2968 | card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; |
2951 | } | 2969 | } else |
2970 | QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected" | ||
2971 | "\n", dev_name(&card->gdev->dev)); | ||
2952 | QETH_DBF_TEXT(SETUP, 2, "suppenbl"); | 2972 | QETH_DBF_TEXT(SETUP, 2, "suppenbl"); |
2953 | QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_supported); | 2973 | QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_supported); |
2954 | QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_enabled); | 2974 | QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_enabled); |
diff --git a/drivers/s390/net/qeth_l2_main.c b/drivers/s390/net/qeth_l2_main.c index e67e0258aec5..fddb62654b6a 100644 --- a/drivers/s390/net/qeth_l2_main.c +++ b/drivers/s390/net/qeth_l2_main.c | |||
@@ -626,10 +626,13 @@ static int qeth_l2_request_initial_mac(struct qeth_card *card) | |||
626 | QETH_DBF_TEXT(SETUP, 2, "doL2init"); | 626 | QETH_DBF_TEXT(SETUP, 2, "doL2init"); |
627 | QETH_DBF_TEXT_(SETUP, 2, "doL2%s", CARD_BUS_ID(card)); | 627 | QETH_DBF_TEXT_(SETUP, 2, "doL2%s", CARD_BUS_ID(card)); |
628 | 628 | ||
629 | rc = qeth_query_setadapterparms(card); | 629 | if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) { |
630 | if (rc) { | 630 | rc = qeth_query_setadapterparms(card); |
631 | QETH_DBF_MESSAGE(2, "could not query adapter parameters on " | 631 | if (rc) { |
632 | "device %s: x%x\n", CARD_BUS_ID(card), rc); | 632 | QETH_DBF_MESSAGE(2, "could not query adapter " |
633 | "parameters on device %s: x%x\n", | ||
634 | CARD_BUS_ID(card), rc); | ||
635 | } | ||
633 | } | 636 | } |
634 | 637 | ||
635 | if (card->info.type == QETH_CARD_TYPE_IQD || | 638 | if (card->info.type == QETH_CARD_TYPE_IQD || |
@@ -676,7 +679,7 @@ static int qeth_l2_set_mac_address(struct net_device *dev, void *p) | |||
676 | return -ERESTARTSYS; | 679 | return -ERESTARTSYS; |
677 | } | 680 | } |
678 | rc = qeth_l2_send_delmac(card, &card->dev->dev_addr[0]); | 681 | rc = qeth_l2_send_delmac(card, &card->dev->dev_addr[0]); |
679 | if (!rc) | 682 | if (!rc || (rc == IPA_RC_L2_MAC_NOT_FOUND)) |
680 | rc = qeth_l2_send_setmac(card, addr->sa_data); | 683 | rc = qeth_l2_send_setmac(card, addr->sa_data); |
681 | return rc ? -EINVAL : 0; | 684 | return rc ? -EINVAL : 0; |
682 | } | 685 | } |
diff --git a/drivers/scsi/qlogicpti.c b/drivers/scsi/qlogicpti.c index b191dd549207..71fddbc60f18 100644 --- a/drivers/scsi/qlogicpti.c +++ b/drivers/scsi/qlogicpti.c | |||
@@ -1294,26 +1294,19 @@ static struct scsi_host_template qpti_template = { | |||
1294 | static const struct of_device_id qpti_match[]; | 1294 | static const struct of_device_id qpti_match[]; |
1295 | static int __devinit qpti_sbus_probe(struct platform_device *op) | 1295 | static int __devinit qpti_sbus_probe(struct platform_device *op) |
1296 | { | 1296 | { |
1297 | const struct of_device_id *match; | ||
1298 | struct scsi_host_template *tpnt; | ||
1299 | struct device_node *dp = op->dev.of_node; | 1297 | struct device_node *dp = op->dev.of_node; |
1300 | struct Scsi_Host *host; | 1298 | struct Scsi_Host *host; |
1301 | struct qlogicpti *qpti; | 1299 | struct qlogicpti *qpti; |
1302 | static int nqptis; | 1300 | static int nqptis; |
1303 | const char *fcode; | 1301 | const char *fcode; |
1304 | 1302 | ||
1305 | match = of_match_device(qpti_match, &op->dev); | ||
1306 | if (!match) | ||
1307 | return -EINVAL; | ||
1308 | tpnt = match->data; | ||
1309 | |||
1310 | /* Sometimes Antares cards come up not completely | 1303 | /* Sometimes Antares cards come up not completely |
1311 | * setup, and we get a report of a zero IRQ. | 1304 | * setup, and we get a report of a zero IRQ. |
1312 | */ | 1305 | */ |
1313 | if (op->archdata.irqs[0] == 0) | 1306 | if (op->archdata.irqs[0] == 0) |
1314 | return -ENODEV; | 1307 | return -ENODEV; |
1315 | 1308 | ||
1316 | host = scsi_host_alloc(tpnt, sizeof(struct qlogicpti)); | 1309 | host = scsi_host_alloc(&qpti_template, sizeof(struct qlogicpti)); |
1317 | if (!host) | 1310 | if (!host) |
1318 | return -ENOMEM; | 1311 | return -ENOMEM; |
1319 | 1312 | ||
@@ -1445,19 +1438,15 @@ static int __devexit qpti_sbus_remove(struct platform_device *op) | |||
1445 | static const struct of_device_id qpti_match[] = { | 1438 | static const struct of_device_id qpti_match[] = { |
1446 | { | 1439 | { |
1447 | .name = "ptisp", | 1440 | .name = "ptisp", |
1448 | .data = &qpti_template, | ||
1449 | }, | 1441 | }, |
1450 | { | 1442 | { |
1451 | .name = "PTI,ptisp", | 1443 | .name = "PTI,ptisp", |
1452 | .data = &qpti_template, | ||
1453 | }, | 1444 | }, |
1454 | { | 1445 | { |
1455 | .name = "QLGC,isp", | 1446 | .name = "QLGC,isp", |
1456 | .data = &qpti_template, | ||
1457 | }, | 1447 | }, |
1458 | { | 1448 | { |
1459 | .name = "SUNW,isp", | 1449 | .name = "SUNW,isp", |
1460 | .data = &qpti_template, | ||
1461 | }, | 1450 | }, |
1462 | {}, | 1451 | {}, |
1463 | }; | 1452 | }; |
diff --git a/drivers/staging/android/android_alarm.h b/drivers/staging/android/android_alarm.h index f2ffd963f1c3..d0cafd637199 100644 --- a/drivers/staging/android/android_alarm.h +++ b/drivers/staging/android/android_alarm.h | |||
@@ -51,12 +51,10 @@ enum android_alarm_return_flags { | |||
51 | #define ANDROID_ALARM_WAIT _IO('a', 1) | 51 | #define ANDROID_ALARM_WAIT _IO('a', 1) |
52 | 52 | ||
53 | #define ALARM_IOW(c, type, size) _IOW('a', (c) | ((type) << 4), size) | 53 | #define ALARM_IOW(c, type, size) _IOW('a', (c) | ((type) << 4), size) |
54 | #define ALARM_IOR(c, type, size) _IOR('a', (c) | ((type) << 4), size) | ||
55 | |||
56 | /* Set alarm */ | 54 | /* Set alarm */ |
57 | #define ANDROID_ALARM_SET(type) ALARM_IOW(2, type, struct timespec) | 55 | #define ANDROID_ALARM_SET(type) ALARM_IOW(2, type, struct timespec) |
58 | #define ANDROID_ALARM_SET_AND_WAIT(type) ALARM_IOW(3, type, struct timespec) | 56 | #define ANDROID_ALARM_SET_AND_WAIT(type) ALARM_IOW(3, type, struct timespec) |
59 | #define ANDROID_ALARM_GET_TIME(type) ALARM_IOR(4, type, struct timespec) | 57 | #define ANDROID_ALARM_GET_TIME(type) ALARM_IOW(4, type, struct timespec) |
60 | #define ANDROID_ALARM_SET_RTC _IOW('a', 5, struct timespec) | 58 | #define ANDROID_ALARM_SET_RTC _IOW('a', 5, struct timespec) |
61 | #define ANDROID_ALARM_BASE_CMD(cmd) (cmd & ~(_IOC(0, 0, 0xf0, 0))) | 59 | #define ANDROID_ALARM_BASE_CMD(cmd) (cmd & ~(_IOC(0, 0, 0xf0, 0))) |
62 | #define ANDROID_ALARM_IOCTL_TO_TYPE(cmd) (_IOC_NR(cmd) >> 4) | 60 | #define ANDROID_ALARM_IOCTL_TO_TYPE(cmd) (_IOC_NR(cmd) >> 4) |
diff --git a/drivers/thermal/exynos_thermal.c b/drivers/thermal/exynos_thermal.c index fd03e8581afc..6dd29e4ce36b 100644 --- a/drivers/thermal/exynos_thermal.c +++ b/drivers/thermal/exynos_thermal.c | |||
@@ -815,7 +815,7 @@ static struct platform_device_id exynos_tmu_driver_ids[] = { | |||
815 | }, | 815 | }, |
816 | { }, | 816 | { }, |
817 | }; | 817 | }; |
818 | MODULE_DEVICE_TABLE(platform, exynos4_tmu_driver_ids); | 818 | MODULE_DEVICE_TABLE(platform, exynos_tmu_driver_ids); |
819 | 819 | ||
820 | static inline struct exynos_tmu_platform_data *exynos_get_driver_data( | 820 | static inline struct exynos_tmu_platform_data *exynos_get_driver_data( |
821 | struct platform_device *pdev) | 821 | struct platform_device *pdev) |
diff --git a/drivers/thermal/rcar_thermal.c b/drivers/thermal/rcar_thermal.c index d4452716aaab..f7a1b574a304 100644 --- a/drivers/thermal/rcar_thermal.c +++ b/drivers/thermal/rcar_thermal.c | |||
@@ -210,7 +210,7 @@ static int rcar_thermal_probe(struct platform_device *pdev) | |||
210 | goto error_free_priv; | 210 | goto error_free_priv; |
211 | } | 211 | } |
212 | 212 | ||
213 | zone = thermal_zone_device_register("rcar_thermal", 0, priv, | 213 | zone = thermal_zone_device_register("rcar_thermal", 0, 0, priv, |
214 | &rcar_thermal_zone_ops, 0, 0); | 214 | &rcar_thermal_zone_ops, 0, 0); |
215 | if (IS_ERR(zone)) { | 215 | if (IS_ERR(zone)) { |
216 | dev_err(&pdev->dev, "thermal zone device is NULL\n"); | 216 | dev_err(&pdev->dev, "thermal zone device is NULL\n"); |
diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c index a5dec1ca1b82..13ee53bd0bf6 100644 --- a/drivers/tty/hvc/hvc_console.c +++ b/drivers/tty/hvc/hvc_console.c | |||
@@ -424,7 +424,6 @@ static void hvc_hangup(struct tty_struct *tty) | |||
424 | { | 424 | { |
425 | struct hvc_struct *hp = tty->driver_data; | 425 | struct hvc_struct *hp = tty->driver_data; |
426 | unsigned long flags; | 426 | unsigned long flags; |
427 | int temp_open_count; | ||
428 | 427 | ||
429 | if (!hp) | 428 | if (!hp) |
430 | return; | 429 | return; |
@@ -444,7 +443,6 @@ static void hvc_hangup(struct tty_struct *tty) | |||
444 | return; | 443 | return; |
445 | } | 444 | } |
446 | 445 | ||
447 | temp_open_count = hp->port.count; | ||
448 | hp->port.count = 0; | 446 | hp->port.count = 0; |
449 | spin_unlock_irqrestore(&hp->port.lock, flags); | 447 | spin_unlock_irqrestore(&hp->port.lock, flags); |
450 | tty_port_tty_set(&hp->port, NULL); | 448 | tty_port_tty_set(&hp->port, NULL); |
@@ -453,11 +451,6 @@ static void hvc_hangup(struct tty_struct *tty) | |||
453 | 451 | ||
454 | if (hp->ops->notifier_hangup) | 452 | if (hp->ops->notifier_hangup) |
455 | hp->ops->notifier_hangup(hp, hp->data); | 453 | hp->ops->notifier_hangup(hp, hp->data); |
456 | |||
457 | while(temp_open_count) { | ||
458 | --temp_open_count; | ||
459 | tty_port_put(&hp->port); | ||
460 | } | ||
461 | } | 454 | } |
462 | 455 | ||
463 | /* | 456 | /* |
diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c index 2bc28a59d385..1ab1d2c66de4 100644 --- a/drivers/tty/serial/max310x.c +++ b/drivers/tty/serial/max310x.c | |||
@@ -1239,6 +1239,7 @@ static int __devexit max310x_remove(struct spi_device *spi) | |||
1239 | static const struct spi_device_id max310x_id_table[] = { | 1239 | static const struct spi_device_id max310x_id_table[] = { |
1240 | { "max3107", MAX310X_TYPE_MAX3107 }, | 1240 | { "max3107", MAX310X_TYPE_MAX3107 }, |
1241 | { "max3108", MAX310X_TYPE_MAX3108 }, | 1241 | { "max3108", MAX310X_TYPE_MAX3108 }, |
1242 | { } | ||
1242 | }; | 1243 | }; |
1243 | MODULE_DEVICE_TABLE(spi, max310x_id_table); | 1244 | MODULE_DEVICE_TABLE(spi, max310x_id_table); |
1244 | 1245 | ||
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c index 1e741bca0265..f034716190ff 100644 --- a/drivers/usb/core/hcd.c +++ b/drivers/usb/core/hcd.c | |||
@@ -2151,8 +2151,15 @@ EXPORT_SYMBOL_GPL(usb_bus_start_enum); | |||
2151 | irqreturn_t usb_hcd_irq (int irq, void *__hcd) | 2151 | irqreturn_t usb_hcd_irq (int irq, void *__hcd) |
2152 | { | 2152 | { |
2153 | struct usb_hcd *hcd = __hcd; | 2153 | struct usb_hcd *hcd = __hcd; |
2154 | unsigned long flags; | ||
2154 | irqreturn_t rc; | 2155 | irqreturn_t rc; |
2155 | 2156 | ||
2157 | /* IRQF_DISABLED doesn't work correctly with shared IRQs | ||
2158 | * when the first handler doesn't use it. So let's just | ||
2159 | * assume it's never used. | ||
2160 | */ | ||
2161 | local_irq_save(flags); | ||
2162 | |||
2156 | if (unlikely(HCD_DEAD(hcd) || !HCD_HW_ACCESSIBLE(hcd))) | 2163 | if (unlikely(HCD_DEAD(hcd) || !HCD_HW_ACCESSIBLE(hcd))) |
2157 | rc = IRQ_NONE; | 2164 | rc = IRQ_NONE; |
2158 | else if (hcd->driver->irq(hcd) == IRQ_NONE) | 2165 | else if (hcd->driver->irq(hcd) == IRQ_NONE) |
@@ -2160,6 +2167,7 @@ irqreturn_t usb_hcd_irq (int irq, void *__hcd) | |||
2160 | else | 2167 | else |
2161 | rc = IRQ_HANDLED; | 2168 | rc = IRQ_HANDLED; |
2162 | 2169 | ||
2170 | local_irq_restore(flags); | ||
2163 | return rc; | 2171 | return rc; |
2164 | } | 2172 | } |
2165 | EXPORT_SYMBOL_GPL(usb_hcd_irq); | 2173 | EXPORT_SYMBOL_GPL(usb_hcd_irq); |
@@ -2347,6 +2355,14 @@ static int usb_hcd_request_irqs(struct usb_hcd *hcd, | |||
2347 | int retval; | 2355 | int retval; |
2348 | 2356 | ||
2349 | if (hcd->driver->irq) { | 2357 | if (hcd->driver->irq) { |
2358 | |||
2359 | /* IRQF_DISABLED doesn't work as advertised when used together | ||
2360 | * with IRQF_SHARED. As usb_hcd_irq() will always disable | ||
2361 | * interrupts we can remove it here. | ||
2362 | */ | ||
2363 | if (irqflags & IRQF_SHARED) | ||
2364 | irqflags &= ~IRQF_DISABLED; | ||
2365 | |||
2350 | snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d", | 2366 | snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d", |
2351 | hcd->driver->description, hcd->self.busnum); | 2367 | hcd->driver->description, hcd->self.busnum); |
2352 | retval = request_irq(irqnum, &usb_hcd_irq, irqflags, | 2368 | retval = request_irq(irqnum, &usb_hcd_irq, irqflags, |
diff --git a/drivers/usb/early/ehci-dbgp.c b/drivers/usb/early/ehci-dbgp.c index e426ad626d74..4bfa78af379c 100644 --- a/drivers/usb/early/ehci-dbgp.c +++ b/drivers/usb/early/ehci-dbgp.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/usb/ehci_def.h> | 20 | #include <linux/usb/ehci_def.h> |
21 | #include <linux/delay.h> | 21 | #include <linux/delay.h> |
22 | #include <linux/serial_core.h> | 22 | #include <linux/serial_core.h> |
23 | #include <linux/kconfig.h> | ||
23 | #include <linux/kgdb.h> | 24 | #include <linux/kgdb.h> |
24 | #include <linux/kthread.h> | 25 | #include <linux/kthread.h> |
25 | #include <asm/io.h> | 26 | #include <asm/io.h> |
@@ -614,12 +615,6 @@ err: | |||
614 | return -ENODEV; | 615 | return -ENODEV; |
615 | } | 616 | } |
616 | 617 | ||
617 | int dbgp_external_startup(struct usb_hcd *hcd) | ||
618 | { | ||
619 | return xen_dbgp_external_startup(hcd) ?: _dbgp_external_startup(); | ||
620 | } | ||
621 | EXPORT_SYMBOL_GPL(dbgp_external_startup); | ||
622 | |||
623 | static int ehci_reset_port(int port) | 618 | static int ehci_reset_port(int port) |
624 | { | 619 | { |
625 | u32 portsc; | 620 | u32 portsc; |
@@ -979,6 +974,7 @@ struct console early_dbgp_console = { | |||
979 | .index = -1, | 974 | .index = -1, |
980 | }; | 975 | }; |
981 | 976 | ||
977 | #if IS_ENABLED(CONFIG_USB_EHCI_HCD) | ||
982 | int dbgp_reset_prep(struct usb_hcd *hcd) | 978 | int dbgp_reset_prep(struct usb_hcd *hcd) |
983 | { | 979 | { |
984 | int ret = xen_dbgp_reset_prep(hcd); | 980 | int ret = xen_dbgp_reset_prep(hcd); |
@@ -1007,6 +1003,13 @@ int dbgp_reset_prep(struct usb_hcd *hcd) | |||
1007 | } | 1003 | } |
1008 | EXPORT_SYMBOL_GPL(dbgp_reset_prep); | 1004 | EXPORT_SYMBOL_GPL(dbgp_reset_prep); |
1009 | 1005 | ||
1006 | int dbgp_external_startup(struct usb_hcd *hcd) | ||
1007 | { | ||
1008 | return xen_dbgp_external_startup(hcd) ?: _dbgp_external_startup(); | ||
1009 | } | ||
1010 | EXPORT_SYMBOL_GPL(dbgp_external_startup); | ||
1011 | #endif /* USB_EHCI_HCD */ | ||
1012 | |||
1010 | #ifdef CONFIG_KGDB | 1013 | #ifdef CONFIG_KGDB |
1011 | 1014 | ||
1012 | static char kgdbdbgp_buf[DBGP_MAX_PACKET]; | 1015 | static char kgdbdbgp_buf[DBGP_MAX_PACKET]; |
diff --git a/drivers/usb/host/ehci-ls1x.c b/drivers/usb/host/ehci-ls1x.c index ca759652626b..aa0f328922df 100644 --- a/drivers/usb/host/ehci-ls1x.c +++ b/drivers/usb/host/ehci-ls1x.c | |||
@@ -113,7 +113,7 @@ static int ehci_hcd_ls1x_probe(struct platform_device *pdev) | |||
113 | goto err_put_hcd; | 113 | goto err_put_hcd; |
114 | } | 114 | } |
115 | 115 | ||
116 | ret = usb_add_hcd(hcd, irq, IRQF_SHARED); | 116 | ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); |
117 | if (ret) | 117 | if (ret) |
118 | goto err_put_hcd; | 118 | goto err_put_hcd; |
119 | 119 | ||
diff --git a/drivers/usb/host/ohci-xls.c b/drivers/usb/host/ohci-xls.c index 84201cd1a472..41e378f17c66 100644 --- a/drivers/usb/host/ohci-xls.c +++ b/drivers/usb/host/ohci-xls.c | |||
@@ -56,7 +56,7 @@ static int ohci_xls_probe_internal(const struct hc_driver *driver, | |||
56 | goto err3; | 56 | goto err3; |
57 | } | 57 | } |
58 | 58 | ||
59 | retval = usb_add_hcd(hcd, irq, IRQF_SHARED); | 59 | retval = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); |
60 | if (retval != 0) | 60 | if (retval != 0) |
61 | goto err4; | 61 | goto err4; |
62 | return retval; | 62 | return retval; |
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c index d0b87e7b4abf..b6b84dacc791 100644 --- a/drivers/usb/musb/musb_gadget.c +++ b/drivers/usb/musb/musb_gadget.c | |||
@@ -707,11 +707,12 @@ static void rxstate(struct musb *musb, struct musb_request *req) | |||
707 | fifo_count = musb_readw(epio, MUSB_RXCOUNT); | 707 | fifo_count = musb_readw(epio, MUSB_RXCOUNT); |
708 | 708 | ||
709 | /* | 709 | /* |
710 | * use mode 1 only if we expect data of at least ep packet_sz | 710 | * Enable Mode 1 on RX transfers only when short_not_ok flag |
711 | * and have not yet received a short packet | 711 | * is set. Currently short_not_ok flag is set only from |
712 | * file_storage and f_mass_storage drivers | ||
712 | */ | 713 | */ |
713 | if ((request->length - request->actual >= musb_ep->packet_sz) && | 714 | |
714 | (fifo_count >= musb_ep->packet_sz)) | 715 | if (request->short_not_ok && fifo_count == musb_ep->packet_sz) |
715 | use_mode_1 = 1; | 716 | use_mode_1 = 1; |
716 | else | 717 | else |
717 | use_mode_1 = 0; | 718 | use_mode_1 = 0; |
@@ -727,6 +728,27 @@ static void rxstate(struct musb *musb, struct musb_request *req) | |||
727 | c = musb->dma_controller; | 728 | c = musb->dma_controller; |
728 | channel = musb_ep->dma; | 729 | channel = musb_ep->dma; |
729 | 730 | ||
731 | /* We use DMA Req mode 0 in rx_csr, and DMA controller operates in | ||
732 | * mode 0 only. So we do not get endpoint interrupts due to DMA | ||
733 | * completion. We only get interrupts from DMA controller. | ||
734 | * | ||
735 | * We could operate in DMA mode 1 if we knew the size of the tranfer | ||
736 | * in advance. For mass storage class, request->length = what the host | ||
737 | * sends, so that'd work. But for pretty much everything else, | ||
738 | * request->length is routinely more than what the host sends. For | ||
739 | * most these gadgets, end of is signified either by a short packet, | ||
740 | * or filling the last byte of the buffer. (Sending extra data in | ||
741 | * that last pckate should trigger an overflow fault.) But in mode 1, | ||
742 | * we don't get DMA completion interrupt for short packets. | ||
743 | * | ||
744 | * Theoretically, we could enable DMAReq irq (MUSB_RXCSR_DMAMODE = 1), | ||
745 | * to get endpoint interrupt on every DMA req, but that didn't seem | ||
746 | * to work reliably. | ||
747 | * | ||
748 | * REVISIT an updated g_file_storage can set req->short_not_ok, which | ||
749 | * then becomes usable as a runtime "use mode 1" hint... | ||
750 | */ | ||
751 | |||
730 | /* Experimental: Mode1 works with mass storage use cases */ | 752 | /* Experimental: Mode1 works with mass storage use cases */ |
731 | if (use_mode_1) { | 753 | if (use_mode_1) { |
732 | csr |= MUSB_RXCSR_AUTOCLEAR; | 754 | csr |= MUSB_RXCSR_AUTOCLEAR; |
diff --git a/drivers/usb/musb/ux500.c b/drivers/usb/musb/ux500.c index d62a91fedc22..0e62f504410e 100644 --- a/drivers/usb/musb/ux500.c +++ b/drivers/usb/musb/ux500.c | |||
@@ -65,7 +65,7 @@ static int __devinit ux500_probe(struct platform_device *pdev) | |||
65 | struct platform_device *musb; | 65 | struct platform_device *musb; |
66 | struct ux500_glue *glue; | 66 | struct ux500_glue *glue; |
67 | struct clk *clk; | 67 | struct clk *clk; |
68 | 68 | int musbid; | |
69 | int ret = -ENOMEM; | 69 | int ret = -ENOMEM; |
70 | 70 | ||
71 | glue = kzalloc(sizeof(*glue), GFP_KERNEL); | 71 | glue = kzalloc(sizeof(*glue), GFP_KERNEL); |
diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig index d8c8a42bff3e..6223062d5d1b 100644 --- a/drivers/usb/otg/Kconfig +++ b/drivers/usb/otg/Kconfig | |||
@@ -58,7 +58,7 @@ config USB_ULPI_VIEWPORT | |||
58 | 58 | ||
59 | config TWL4030_USB | 59 | config TWL4030_USB |
60 | tristate "TWL4030 USB Transceiver Driver" | 60 | tristate "TWL4030 USB Transceiver Driver" |
61 | depends on TWL4030_CORE && REGULATOR_TWL4030 | 61 | depends on TWL4030_CORE && REGULATOR_TWL4030 && USB_MUSB_OMAP2PLUS |
62 | select USB_OTG_UTILS | 62 | select USB_OTG_UTILS |
63 | help | 63 | help |
64 | Enable this to support the USB OTG transceiver on TWL4030 | 64 | Enable this to support the USB OTG transceiver on TWL4030 |
@@ -68,7 +68,7 @@ config TWL4030_USB | |||
68 | 68 | ||
69 | config TWL6030_USB | 69 | config TWL6030_USB |
70 | tristate "TWL6030 USB Transceiver Driver" | 70 | tristate "TWL6030 USB Transceiver Driver" |
71 | depends on TWL4030_CORE && OMAP_USB2 | 71 | depends on TWL4030_CORE && OMAP_USB2 && USB_MUSB_OMAP2PLUS |
72 | select USB_OTG_UTILS | 72 | select USB_OTG_UTILS |
73 | help | 73 | help |
74 | Enable this to support the USB OTG transceiver on TWL6030 | 74 | Enable this to support the USB OTG transceiver on TWL6030 |
diff --git a/drivers/usb/serial/keyspan.c b/drivers/usb/serial/keyspan.c index 7179b0c5f814..cff8dd5b462d 100644 --- a/drivers/usb/serial/keyspan.c +++ b/drivers/usb/serial/keyspan.c | |||
@@ -2430,7 +2430,7 @@ static void keyspan_release(struct usb_serial *serial) | |||
2430 | static int keyspan_port_probe(struct usb_serial_port *port) | 2430 | static int keyspan_port_probe(struct usb_serial_port *port) |
2431 | { | 2431 | { |
2432 | struct usb_serial *serial = port->serial; | 2432 | struct usb_serial *serial = port->serial; |
2433 | struct keyspan_port_private *s_priv; | 2433 | struct keyspan_serial_private *s_priv; |
2434 | struct keyspan_port_private *p_priv; | 2434 | struct keyspan_port_private *p_priv; |
2435 | const struct keyspan_device_details *d_details; | 2435 | const struct keyspan_device_details *d_details; |
2436 | struct callbacks *cback; | 2436 | struct callbacks *cback; |
@@ -2445,7 +2445,6 @@ static int keyspan_port_probe(struct usb_serial_port *port) | |||
2445 | if (!p_priv) | 2445 | if (!p_priv) |
2446 | return -ENOMEM; | 2446 | return -ENOMEM; |
2447 | 2447 | ||
2448 | s_priv = usb_get_serial_data(port->serial); | ||
2449 | p_priv->device_details = d_details; | 2448 | p_priv->device_details = d_details; |
2450 | 2449 | ||
2451 | /* Setup values for the various callback routines */ | 2450 | /* Setup values for the various callback routines */ |
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c index 5dee7d61241e..edc64bb6f457 100644 --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c | |||
@@ -158,6 +158,7 @@ static void option_instat_callback(struct urb *urb); | |||
158 | #define NOVATELWIRELESS_PRODUCT_EVDO_EMBEDDED_HIGHSPEED 0x8001 | 158 | #define NOVATELWIRELESS_PRODUCT_EVDO_EMBEDDED_HIGHSPEED 0x8001 |
159 | #define NOVATELWIRELESS_PRODUCT_HSPA_EMBEDDED_FULLSPEED 0x9000 | 159 | #define NOVATELWIRELESS_PRODUCT_HSPA_EMBEDDED_FULLSPEED 0x9000 |
160 | #define NOVATELWIRELESS_PRODUCT_HSPA_EMBEDDED_HIGHSPEED 0x9001 | 160 | #define NOVATELWIRELESS_PRODUCT_HSPA_EMBEDDED_HIGHSPEED 0x9001 |
161 | #define NOVATELWIRELESS_PRODUCT_E362 0x9010 | ||
161 | #define NOVATELWIRELESS_PRODUCT_G1 0xA001 | 162 | #define NOVATELWIRELESS_PRODUCT_G1 0xA001 |
162 | #define NOVATELWIRELESS_PRODUCT_G1_M 0xA002 | 163 | #define NOVATELWIRELESS_PRODUCT_G1_M 0xA002 |
163 | #define NOVATELWIRELESS_PRODUCT_G2 0xA010 | 164 | #define NOVATELWIRELESS_PRODUCT_G2 0xA010 |
@@ -193,6 +194,9 @@ static void option_instat_callback(struct urb *urb); | |||
193 | #define DELL_PRODUCT_5730_MINICARD_TELUS 0x8181 | 194 | #define DELL_PRODUCT_5730_MINICARD_TELUS 0x8181 |
194 | #define DELL_PRODUCT_5730_MINICARD_VZW 0x8182 | 195 | #define DELL_PRODUCT_5730_MINICARD_VZW 0x8182 |
195 | 196 | ||
197 | #define DELL_PRODUCT_5800_MINICARD_VZW 0x8195 /* Novatel E362 */ | ||
198 | #define DELL_PRODUCT_5800_V2_MINICARD_VZW 0x8196 /* Novatel E362 */ | ||
199 | |||
196 | #define KYOCERA_VENDOR_ID 0x0c88 | 200 | #define KYOCERA_VENDOR_ID 0x0c88 |
197 | #define KYOCERA_PRODUCT_KPC650 0x17da | 201 | #define KYOCERA_PRODUCT_KPC650 0x17da |
198 | #define KYOCERA_PRODUCT_KPC680 0x180a | 202 | #define KYOCERA_PRODUCT_KPC680 0x180a |
@@ -283,6 +287,7 @@ static void option_instat_callback(struct urb *urb); | |||
283 | /* ALCATEL PRODUCTS */ | 287 | /* ALCATEL PRODUCTS */ |
284 | #define ALCATEL_VENDOR_ID 0x1bbb | 288 | #define ALCATEL_VENDOR_ID 0x1bbb |
285 | #define ALCATEL_PRODUCT_X060S_X200 0x0000 | 289 | #define ALCATEL_PRODUCT_X060S_X200 0x0000 |
290 | #define ALCATEL_PRODUCT_X220_X500D 0x0017 | ||
286 | 291 | ||
287 | #define PIRELLI_VENDOR_ID 0x1266 | 292 | #define PIRELLI_VENDOR_ID 0x1266 |
288 | #define PIRELLI_PRODUCT_C100_1 0x1002 | 293 | #define PIRELLI_PRODUCT_C100_1 0x1002 |
@@ -706,6 +711,7 @@ static const struct usb_device_id option_ids[] = { | |||
706 | { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_G2) }, | 711 | { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_G2) }, |
707 | /* Novatel Ovation MC551 a.k.a. Verizon USB551L */ | 712 | /* Novatel Ovation MC551 a.k.a. Verizon USB551L */ |
708 | { USB_DEVICE_AND_INTERFACE_INFO(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC551, 0xff, 0xff, 0xff) }, | 713 | { USB_DEVICE_AND_INTERFACE_INFO(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC551, 0xff, 0xff, 0xff) }, |
714 | { USB_DEVICE_AND_INTERFACE_INFO(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_E362, 0xff, 0xff, 0xff) }, | ||
709 | 715 | ||
710 | { USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H01) }, | 716 | { USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H01) }, |
711 | { USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H01A) }, | 717 | { USB_DEVICE(AMOI_VENDOR_ID, AMOI_PRODUCT_H01A) }, |
@@ -728,6 +734,8 @@ static const struct usb_device_id option_ids[] = { | |||
728 | { USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5730_MINICARD_SPRINT) }, /* Dell Wireless 5730 Mobile Broadband EVDO/HSPA Mini-Card */ | 734 | { USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5730_MINICARD_SPRINT) }, /* Dell Wireless 5730 Mobile Broadband EVDO/HSPA Mini-Card */ |
729 | { USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5730_MINICARD_TELUS) }, /* Dell Wireless 5730 Mobile Broadband EVDO/HSPA Mini-Card */ | 735 | { USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5730_MINICARD_TELUS) }, /* Dell Wireless 5730 Mobile Broadband EVDO/HSPA Mini-Card */ |
730 | { USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5730_MINICARD_VZW) }, /* Dell Wireless 5730 Mobile Broadband EVDO/HSPA Mini-Card */ | 736 | { USB_DEVICE(DELL_VENDOR_ID, DELL_PRODUCT_5730_MINICARD_VZW) }, /* Dell Wireless 5730 Mobile Broadband EVDO/HSPA Mini-Card */ |
737 | { USB_DEVICE_AND_INTERFACE_INFO(DELL_VENDOR_ID, DELL_PRODUCT_5800_MINICARD_VZW, 0xff, 0xff, 0xff) }, | ||
738 | { USB_DEVICE_AND_INTERFACE_INFO(DELL_VENDOR_ID, DELL_PRODUCT_5800_V2_MINICARD_VZW, 0xff, 0xff, 0xff) }, | ||
731 | { USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_E100A) }, /* ADU-E100, ADU-310 */ | 739 | { USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_E100A) }, /* ADU-E100, ADU-310 */ |
732 | { USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_500A) }, | 740 | { USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_500A) }, |
733 | { USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_620UW) }, | 741 | { USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_620UW) }, |
@@ -1157,6 +1165,7 @@ static const struct usb_device_id option_ids[] = { | |||
1157 | { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S_X200), | 1165 | { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S_X200), |
1158 | .driver_info = (kernel_ulong_t)&alcatel_x200_blacklist | 1166 | .driver_info = (kernel_ulong_t)&alcatel_x200_blacklist |
1159 | }, | 1167 | }, |
1168 | { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X220_X500D) }, | ||
1160 | { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) }, | 1169 | { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) }, |
1161 | { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) }, | 1170 | { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) }, |
1162 | { USB_DEVICE(LONGCHEER_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14), | 1171 | { USB_DEVICE(LONGCHEER_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14), |
diff --git a/drivers/usb/serial/usb_wwan.c b/drivers/usb/serial/usb_wwan.c index 61a73ad1a187..a3e9c095f0d8 100644 --- a/drivers/usb/serial/usb_wwan.c +++ b/drivers/usb/serial/usb_wwan.c | |||
@@ -455,9 +455,6 @@ static struct urb *usb_wwan_setup_urb(struct usb_serial_port *port, | |||
455 | struct usb_serial *serial = port->serial; | 455 | struct usb_serial *serial = port->serial; |
456 | struct urb *urb; | 456 | struct urb *urb; |
457 | 457 | ||
458 | if (endpoint == -1) | ||
459 | return NULL; /* endpoint not needed */ | ||
460 | |||
461 | urb = usb_alloc_urb(0, GFP_KERNEL); /* No ISO */ | 458 | urb = usb_alloc_urb(0, GFP_KERNEL); /* No ISO */ |
462 | if (urb == NULL) { | 459 | if (urb == NULL) { |
463 | dev_dbg(&serial->interface->dev, | 460 | dev_dbg(&serial->interface->dev, |
@@ -489,6 +486,9 @@ int usb_wwan_port_probe(struct usb_serial_port *port) | |||
489 | init_usb_anchor(&portdata->delayed); | 486 | init_usb_anchor(&portdata->delayed); |
490 | 487 | ||
491 | for (i = 0; i < N_IN_URB; i++) { | 488 | for (i = 0; i < N_IN_URB; i++) { |
489 | if (!port->bulk_in_size) | ||
490 | break; | ||
491 | |||
492 | buffer = (u8 *)__get_free_page(GFP_KERNEL); | 492 | buffer = (u8 *)__get_free_page(GFP_KERNEL); |
493 | if (!buffer) | 493 | if (!buffer) |
494 | goto bail_out_error; | 494 | goto bail_out_error; |
@@ -502,8 +502,8 @@ int usb_wwan_port_probe(struct usb_serial_port *port) | |||
502 | } | 502 | } |
503 | 503 | ||
504 | for (i = 0; i < N_OUT_URB; i++) { | 504 | for (i = 0; i < N_OUT_URB; i++) { |
505 | if (port->bulk_out_endpointAddress == -1) | 505 | if (!port->bulk_out_size) |
506 | continue; | 506 | break; |
507 | 507 | ||
508 | buffer = kmalloc(OUT_BUFLEN, GFP_KERNEL); | 508 | buffer = kmalloc(OUT_BUFLEN, GFP_KERNEL); |
509 | if (!buffer) | 509 | if (!buffer) |
diff --git a/drivers/virtio/virtio.c b/drivers/virtio/virtio.c index 1e8659ca27ef..809b0de59c09 100644 --- a/drivers/virtio/virtio.c +++ b/drivers/virtio/virtio.c | |||
@@ -225,8 +225,10 @@ EXPORT_SYMBOL_GPL(register_virtio_device); | |||
225 | 225 | ||
226 | void unregister_virtio_device(struct virtio_device *dev) | 226 | void unregister_virtio_device(struct virtio_device *dev) |
227 | { | 227 | { |
228 | int index = dev->index; /* save for after device release */ | ||
229 | |||
228 | device_unregister(&dev->dev); | 230 | device_unregister(&dev->dev); |
229 | ida_simple_remove(&virtio_index_ida, dev->index); | 231 | ida_simple_remove(&virtio_index_ida, index); |
230 | } | 232 | } |
231 | EXPORT_SYMBOL_GPL(unregister_virtio_device); | 233 | EXPORT_SYMBOL_GPL(unregister_virtio_device); |
232 | 234 | ||
diff --git a/drivers/xen/Makefile b/drivers/xen/Makefile index 0e8637035457..74354708c6c4 100644 --- a/drivers/xen/Makefile +++ b/drivers/xen/Makefile | |||
@@ -2,6 +2,7 @@ ifneq ($(CONFIG_ARM),y) | |||
2 | obj-y += manage.o balloon.o | 2 | obj-y += manage.o balloon.o |
3 | obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o | 3 | obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o |
4 | endif | 4 | endif |
5 | obj-$(CONFIG_X86) += fallback.o | ||
5 | obj-y += grant-table.o features.o events.o | 6 | obj-y += grant-table.o features.o events.o |
6 | obj-y += xenbus/ | 7 | obj-y += xenbus/ |
7 | 8 | ||
diff --git a/drivers/xen/events.c b/drivers/xen/events.c index 912ac81b6dbf..0be4df39e953 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c | |||
@@ -1395,10 +1395,10 @@ void xen_evtchn_do_upcall(struct pt_regs *regs) | |||
1395 | { | 1395 | { |
1396 | struct pt_regs *old_regs = set_irq_regs(regs); | 1396 | struct pt_regs *old_regs = set_irq_regs(regs); |
1397 | 1397 | ||
1398 | irq_enter(); | ||
1398 | #ifdef CONFIG_X86 | 1399 | #ifdef CONFIG_X86 |
1399 | exit_idle(); | 1400 | exit_idle(); |
1400 | #endif | 1401 | #endif |
1401 | irq_enter(); | ||
1402 | 1402 | ||
1403 | __xen_evtchn_do_upcall(); | 1403 | __xen_evtchn_do_upcall(); |
1404 | 1404 | ||
diff --git a/drivers/xen/fallback.c b/drivers/xen/fallback.c new file mode 100644 index 000000000000..0ef7c4d40f86 --- /dev/null +++ b/drivers/xen/fallback.c | |||
@@ -0,0 +1,80 @@ | |||
1 | #include <linux/kernel.h> | ||
2 | #include <linux/string.h> | ||
3 | #include <linux/bug.h> | ||
4 | #include <linux/export.h> | ||
5 | #include <asm/hypervisor.h> | ||
6 | #include <asm/xen/hypercall.h> | ||
7 | |||
8 | int xen_event_channel_op_compat(int cmd, void *arg) | ||
9 | { | ||
10 | struct evtchn_op op; | ||
11 | int rc; | ||
12 | |||
13 | op.cmd = cmd; | ||
14 | memcpy(&op.u, arg, sizeof(op.u)); | ||
15 | rc = _hypercall1(int, event_channel_op_compat, &op); | ||
16 | |||
17 | switch (cmd) { | ||
18 | case EVTCHNOP_close: | ||
19 | case EVTCHNOP_send: | ||
20 | case EVTCHNOP_bind_vcpu: | ||
21 | case EVTCHNOP_unmask: | ||
22 | /* no output */ | ||
23 | break; | ||
24 | |||
25 | #define COPY_BACK(eop) \ | ||
26 | case EVTCHNOP_##eop: \ | ||
27 | memcpy(arg, &op.u.eop, sizeof(op.u.eop)); \ | ||
28 | break | ||
29 | |||
30 | COPY_BACK(bind_interdomain); | ||
31 | COPY_BACK(bind_virq); | ||
32 | COPY_BACK(bind_pirq); | ||
33 | COPY_BACK(status); | ||
34 | COPY_BACK(alloc_unbound); | ||
35 | COPY_BACK(bind_ipi); | ||
36 | #undef COPY_BACK | ||
37 | |||
38 | default: | ||
39 | WARN_ON(rc != -ENOSYS); | ||
40 | break; | ||
41 | } | ||
42 | |||
43 | return rc; | ||
44 | } | ||
45 | EXPORT_SYMBOL_GPL(xen_event_channel_op_compat); | ||
46 | |||
47 | int HYPERVISOR_physdev_op_compat(int cmd, void *arg) | ||
48 | { | ||
49 | struct physdev_op op; | ||
50 | int rc; | ||
51 | |||
52 | op.cmd = cmd; | ||
53 | memcpy(&op.u, arg, sizeof(op.u)); | ||
54 | rc = _hypercall1(int, physdev_op_compat, &op); | ||
55 | |||
56 | switch (cmd) { | ||
57 | case PHYSDEVOP_IRQ_UNMASK_NOTIFY: | ||
58 | case PHYSDEVOP_set_iopl: | ||
59 | case PHYSDEVOP_set_iobitmap: | ||
60 | case PHYSDEVOP_apic_write: | ||
61 | /* no output */ | ||
62 | break; | ||
63 | |||
64 | #define COPY_BACK(pop, fld) \ | ||
65 | case PHYSDEVOP_##pop: \ | ||
66 | memcpy(arg, &op.u.fld, sizeof(op.u.fld)); \ | ||
67 | break | ||
68 | |||
69 | COPY_BACK(irq_status_query, irq_status_query); | ||
70 | COPY_BACK(apic_read, apic_op); | ||
71 | COPY_BACK(ASSIGN_VECTOR, irq_op); | ||
72 | #undef COPY_BACK | ||
73 | |||
74 | default: | ||
75 | WARN_ON(rc != -ENOSYS); | ||
76 | break; | ||
77 | } | ||
78 | |||
79 | return rc; | ||
80 | } | ||