aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorAlexander Duyck <alexander.h.duyck@intel.com>2012-04-19 13:49:56 -0400
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-05-04 06:24:25 -0400
commit67a79df27163a89fb1ce2191718855288071cbd2 (patch)
treeaf41e8e600339d68036fdd3a6917b7a371ad477a /drivers
parentdd411ec4a5743f9108a4bce1b9399a856c6d0378 (diff)
ixgbe: Reorder link flow control functions in ixgbe_common.c
We can avoid many of the forward declarations found in ixgbe_common.c by just reordering things so this patch does that to help cleanup the code. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_common.c572
1 files changed, 282 insertions, 290 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
index 9854d948f135..3035f1938f5b 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
@@ -47,13 +47,6 @@ static void ixgbe_lower_eeprom_clk(struct ixgbe_hw *hw, u32 *eec);
47static void ixgbe_release_eeprom(struct ixgbe_hw *hw); 47static void ixgbe_release_eeprom(struct ixgbe_hw *hw);
48 48
49static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr); 49static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr);
50static s32 ixgbe_fc_autoneg_fiber(struct ixgbe_hw *hw);
51static s32 ixgbe_fc_autoneg_backplane(struct ixgbe_hw *hw);
52static s32 ixgbe_fc_autoneg_copper(struct ixgbe_hw *hw);
53static s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
54static s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
55 u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm);
56static s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num);
57static s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg); 50static s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);
58static s32 ixgbe_read_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset, 51static s32 ixgbe_read_eeprom_buffer_bit_bang(struct ixgbe_hw *hw, u16 offset,
59 u16 words, u16 *data); 52 u16 words, u16 *data);
@@ -64,6 +57,216 @@ static s32 ixgbe_detect_eeprom_page_size_generic(struct ixgbe_hw *hw,
64static s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw); 57static s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw);
65 58
66/** 59/**
60 * ixgbe_device_supports_autoneg_fc - Check if phy supports autoneg flow
61 * control
62 * @hw: pointer to hardware structure
63 *
64 * There are several phys that do not support autoneg flow control. This
65 * function check the device id to see if the associated phy supports
66 * autoneg flow control.
67 **/
68static s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)
69{
70
71 switch (hw->device_id) {
72 case IXGBE_DEV_ID_X540T:
73 return 0;
74 case IXGBE_DEV_ID_82599_T3_LOM:
75 return 0;
76 default:
77 return IXGBE_ERR_FC_NOT_SUPPORTED;
78 }
79}
80
81/**
82 * ixgbe_setup_fc - Set up flow control
83 * @hw: pointer to hardware structure
84 *
85 * Called at init time to set up flow control.
86 **/
87static s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num)
88{
89 s32 ret_val = 0;
90 u32 reg = 0, reg_bp = 0;
91 u16 reg_cu = 0;
92
93#ifdef CONFIG_DCB
94 if (hw->fc.requested_mode == ixgbe_fc_pfc) {
95 hw->fc.current_mode = hw->fc.requested_mode;
96 goto out;
97 }
98
99#endif /* CONFIG_DCB */
100 /* Validate the packetbuf configuration */
101 if (packetbuf_num < 0 || packetbuf_num > 7) {
102 hw_dbg(hw, "Invalid packet buffer number [%d], expected range is 0-7\n",
103 packetbuf_num);
104 ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;
105 goto out;
106 }
107
108 /*
109 * Validate the water mark configuration. Zero water marks are invalid
110 * because it causes the controller to just blast out fc packets.
111 */
112 if (!hw->fc.low_water ||
113 !hw->fc.high_water[packetbuf_num] ||
114 !hw->fc.pause_time) {
115 hw_dbg(hw, "Invalid water mark configuration\n");
116 ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;
117 goto out;
118 }
119
120 /*
121 * Validate the requested mode. Strict IEEE mode does not allow
122 * ixgbe_fc_rx_pause because it will cause us to fail at UNH.
123 */
124 if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) {
125 hw_dbg(hw, "ixgbe_fc_rx_pause not valid in strict IEEE mode\n");
126 ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;
127 goto out;
128 }
129
130 /*
131 * 10gig parts do not have a word in the EEPROM to determine the
132 * default flow control setting, so we explicitly set it to full.
133 */
134 if (hw->fc.requested_mode == ixgbe_fc_default)
135 hw->fc.requested_mode = ixgbe_fc_full;
136
137 /*
138 * Set up the 1G and 10G flow control advertisement registers so the
139 * HW will be able to do fc autoneg once the cable is plugged in. If
140 * we link at 10G, the 1G advertisement is harmless and vice versa.
141 */
142
143 switch (hw->phy.media_type) {
144 case ixgbe_media_type_fiber:
145 case ixgbe_media_type_backplane:
146 reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
147 reg_bp = IXGBE_READ_REG(hw, IXGBE_AUTOC);
148 break;
149
150 case ixgbe_media_type_copper:
151 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE,
152 MDIO_MMD_AN, &reg_cu);
153 break;
154
155 default:
156 ;
157 }
158
159 /*
160 * The possible values of fc.requested_mode are:
161 * 0: Flow control is completely disabled
162 * 1: Rx flow control is enabled (we can receive pause frames,
163 * but not send pause frames).
164 * 2: Tx flow control is enabled (we can send pause frames but
165 * we do not support receiving pause frames).
166 * 3: Both Rx and Tx flow control (symmetric) are enabled.
167#ifdef CONFIG_DCB
168 * 4: Priority Flow Control is enabled.
169#endif
170 * other: Invalid.
171 */
172 switch (hw->fc.requested_mode) {
173 case ixgbe_fc_none:
174 /* Flow control completely disabled by software override. */
175 reg &= ~(IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);
176 if (hw->phy.media_type == ixgbe_media_type_backplane)
177 reg_bp &= ~(IXGBE_AUTOC_SYM_PAUSE |
178 IXGBE_AUTOC_ASM_PAUSE);
179 else if (hw->phy.media_type == ixgbe_media_type_copper)
180 reg_cu &= ~(IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE);
181 break;
182 case ixgbe_fc_rx_pause:
183 /*
184 * Rx Flow control is enabled and Tx Flow control is
185 * disabled by software override. Since there really
186 * isn't a way to advertise that we are capable of RX
187 * Pause ONLY, we will advertise that we support both
188 * symmetric and asymmetric Rx PAUSE. Later, we will
189 * disable the adapter's ability to send PAUSE frames.
190 */
191 reg |= (IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);
192 if (hw->phy.media_type == ixgbe_media_type_backplane)
193 reg_bp |= (IXGBE_AUTOC_SYM_PAUSE |
194 IXGBE_AUTOC_ASM_PAUSE);
195 else if (hw->phy.media_type == ixgbe_media_type_copper)
196 reg_cu |= (IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE);
197 break;
198 case ixgbe_fc_tx_pause:
199 /*
200 * Tx Flow control is enabled, and Rx Flow control is
201 * disabled by software override.
202 */
203 reg |= (IXGBE_PCS1GANA_ASM_PAUSE);
204 reg &= ~(IXGBE_PCS1GANA_SYM_PAUSE);
205 if (hw->phy.media_type == ixgbe_media_type_backplane) {
206 reg_bp |= (IXGBE_AUTOC_ASM_PAUSE);
207 reg_bp &= ~(IXGBE_AUTOC_SYM_PAUSE);
208 } else if (hw->phy.media_type == ixgbe_media_type_copper) {
209 reg_cu |= (IXGBE_TAF_ASM_PAUSE);
210 reg_cu &= ~(IXGBE_TAF_SYM_PAUSE);
211 }
212 break;
213 case ixgbe_fc_full:
214 /* Flow control (both Rx and Tx) is enabled by SW override. */
215 reg |= (IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);
216 if (hw->phy.media_type == ixgbe_media_type_backplane)
217 reg_bp |= (IXGBE_AUTOC_SYM_PAUSE |
218 IXGBE_AUTOC_ASM_PAUSE);
219 else if (hw->phy.media_type == ixgbe_media_type_copper)
220 reg_cu |= (IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE);
221 break;
222#ifdef CONFIG_DCB
223 case ixgbe_fc_pfc:
224 goto out;
225 break;
226#endif /* CONFIG_DCB */
227 default:
228 hw_dbg(hw, "Flow control param set incorrectly\n");
229 ret_val = IXGBE_ERR_CONFIG;
230 goto out;
231 break;
232 }
233
234 if (hw->mac.type != ixgbe_mac_X540) {
235 /*
236 * Enable auto-negotiation between the MAC & PHY;
237 * the MAC will advertise clause 37 flow control.
238 */
239 IXGBE_WRITE_REG(hw, IXGBE_PCS1GANA, reg);
240 reg = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
241
242 /* Disable AN timeout */
243 if (hw->fc.strict_ieee)
244 reg &= ~IXGBE_PCS1GLCTL_AN_1G_TIMEOUT_EN;
245
246 IXGBE_WRITE_REG(hw, IXGBE_PCS1GLCTL, reg);
247 hw_dbg(hw, "Set up FC; PCS1GLCTL = 0x%08X\n", reg);
248 }
249
250 /*
251 * AUTOC restart handles negotiation of 1G and 10G on backplane
252 * and copper. There is no need to set the PCS1GCTL register.
253 *
254 */
255 if (hw->phy.media_type == ixgbe_media_type_backplane) {
256 reg_bp |= IXGBE_AUTOC_AN_RESTART;
257 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_bp);
258 } else if ((hw->phy.media_type == ixgbe_media_type_copper) &&
259 (ixgbe_device_supports_autoneg_fc(hw) == 0)) {
260 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE,
261 MDIO_MMD_AN, reg_cu);
262 }
263
264 hw_dbg(hw, "Set up FC; IXGBE_AUTOC = 0x%08X\n", reg);
265out:
266 return ret_val;
267}
268
269/**
67 * ixgbe_start_hw_generic - Prepare hardware for Tx/Rx 270 * ixgbe_start_hw_generic - Prepare hardware for Tx/Rx
68 * @hw: pointer to hardware structure 271 * @hw: pointer to hardware structure
69 * 272 *
@@ -2043,63 +2246,52 @@ out:
2043} 2246}
2044 2247
2045/** 2248/**
2046 * ixgbe_fc_autoneg - Configure flow control 2249 * ixgbe_negotiate_fc - Negotiate flow control
2047 * @hw: pointer to hardware structure 2250 * @hw: pointer to hardware structure
2251 * @adv_reg: flow control advertised settings
2252 * @lp_reg: link partner's flow control settings
2253 * @adv_sym: symmetric pause bit in advertisement
2254 * @adv_asm: asymmetric pause bit in advertisement
2255 * @lp_sym: symmetric pause bit in link partner advertisement
2256 * @lp_asm: asymmetric pause bit in link partner advertisement
2048 * 2257 *
2049 * Compares our advertised flow control capabilities to those advertised by 2258 * Find the intersection between advertised settings and link partner's
2050 * our link partner, and determines the proper flow control mode to use. 2259 * advertised settings
2051 **/ 2260 **/
2052void ixgbe_fc_autoneg(struct ixgbe_hw *hw) 2261static s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
2262 u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm)
2053{ 2263{
2054 s32 ret_val = IXGBE_ERR_FC_NOT_NEGOTIATED; 2264 if ((!(adv_reg)) || (!(lp_reg)))
2055 ixgbe_link_speed speed; 2265 return IXGBE_ERR_FC_NOT_NEGOTIATED;
2056 bool link_up;
2057
2058 /*
2059 * AN should have completed when the cable was plugged in.
2060 * Look for reasons to bail out. Bail out if:
2061 * - FC autoneg is disabled, or if
2062 * - link is not up.
2063 *
2064 * Since we're being called from an LSC, link is already known to be up.
2065 * So use link_up_wait_to_complete=false.
2066 */
2067 if (hw->fc.disable_fc_autoneg)
2068 goto out;
2069
2070 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2071 if (!link_up)
2072 goto out;
2073
2074 switch (hw->phy.media_type) {
2075 /* Autoneg flow control on fiber adapters */
2076 case ixgbe_media_type_fiber:
2077 if (speed == IXGBE_LINK_SPEED_1GB_FULL)
2078 ret_val = ixgbe_fc_autoneg_fiber(hw);
2079 break;
2080
2081 /* Autoneg flow control on backplane adapters */
2082 case ixgbe_media_type_backplane:
2083 ret_val = ixgbe_fc_autoneg_backplane(hw);
2084 break;
2085
2086 /* Autoneg flow control on copper adapters */
2087 case ixgbe_media_type_copper:
2088 if (ixgbe_device_supports_autoneg_fc(hw) == 0)
2089 ret_val = ixgbe_fc_autoneg_copper(hw);
2090 break;
2091
2092 default:
2093 break;
2094 }
2095 2266
2096out: 2267 if ((adv_reg & adv_sym) && (lp_reg & lp_sym)) {
2097 if (ret_val == 0) { 2268 /*
2098 hw->fc.fc_was_autonegged = true; 2269 * Now we need to check if the user selected Rx ONLY
2270 * of pause frames. In this case, we had to advertise
2271 * FULL flow control because we could not advertise RX
2272 * ONLY. Hence, we must now check to see if we need to
2273 * turn OFF the TRANSMISSION of PAUSE frames.
2274 */
2275 if (hw->fc.requested_mode == ixgbe_fc_full) {
2276 hw->fc.current_mode = ixgbe_fc_full;
2277 hw_dbg(hw, "Flow Control = FULL.\n");
2278 } else {
2279 hw->fc.current_mode = ixgbe_fc_rx_pause;
2280 hw_dbg(hw, "Flow Control=RX PAUSE frames only\n");
2281 }
2282 } else if (!(adv_reg & adv_sym) && (adv_reg & adv_asm) &&
2283 (lp_reg & lp_sym) && (lp_reg & lp_asm)) {
2284 hw->fc.current_mode = ixgbe_fc_tx_pause;
2285 hw_dbg(hw, "Flow Control = TX PAUSE frames only.\n");
2286 } else if ((adv_reg & adv_sym) && (adv_reg & adv_asm) &&
2287 !(lp_reg & lp_sym) && (lp_reg & lp_asm)) {
2288 hw->fc.current_mode = ixgbe_fc_rx_pause;
2289 hw_dbg(hw, "Flow Control = RX PAUSE frames only.\n");
2099 } else { 2290 } else {
2100 hw->fc.fc_was_autonegged = false; 2291 hw->fc.current_mode = ixgbe_fc_none;
2101 hw->fc.current_mode = hw->fc.requested_mode; 2292 hw_dbg(hw, "Flow Control = NONE.\n");
2102 } 2293 }
2294 return 0;
2103} 2295}
2104 2296
2105/** 2297/**
@@ -2202,241 +2394,63 @@ static s32 ixgbe_fc_autoneg_copper(struct ixgbe_hw *hw)
2202} 2394}
2203 2395
2204/** 2396/**
2205 * ixgbe_negotiate_fc - Negotiate flow control 2397 * ixgbe_fc_autoneg - Configure flow control
2206 * @hw: pointer to hardware structure
2207 * @adv_reg: flow control advertised settings
2208 * @lp_reg: link partner's flow control settings
2209 * @adv_sym: symmetric pause bit in advertisement
2210 * @adv_asm: asymmetric pause bit in advertisement
2211 * @lp_sym: symmetric pause bit in link partner advertisement
2212 * @lp_asm: asymmetric pause bit in link partner advertisement
2213 *
2214 * Find the intersection between advertised settings and link partner's
2215 * advertised settings
2216 **/
2217static s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
2218 u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm)
2219{
2220 if ((!(adv_reg)) || (!(lp_reg)))
2221 return IXGBE_ERR_FC_NOT_NEGOTIATED;
2222
2223 if ((adv_reg & adv_sym) && (lp_reg & lp_sym)) {
2224 /*
2225 * Now we need to check if the user selected Rx ONLY
2226 * of pause frames. In this case, we had to advertise
2227 * FULL flow control because we could not advertise RX
2228 * ONLY. Hence, we must now check to see if we need to
2229 * turn OFF the TRANSMISSION of PAUSE frames.
2230 */
2231 if (hw->fc.requested_mode == ixgbe_fc_full) {
2232 hw->fc.current_mode = ixgbe_fc_full;
2233 hw_dbg(hw, "Flow Control = FULL.\n");
2234 } else {
2235 hw->fc.current_mode = ixgbe_fc_rx_pause;
2236 hw_dbg(hw, "Flow Control=RX PAUSE frames only\n");
2237 }
2238 } else if (!(adv_reg & adv_sym) && (adv_reg & adv_asm) &&
2239 (lp_reg & lp_sym) && (lp_reg & lp_asm)) {
2240 hw->fc.current_mode = ixgbe_fc_tx_pause;
2241 hw_dbg(hw, "Flow Control = TX PAUSE frames only.\n");
2242 } else if ((adv_reg & adv_sym) && (adv_reg & adv_asm) &&
2243 !(lp_reg & lp_sym) && (lp_reg & lp_asm)) {
2244 hw->fc.current_mode = ixgbe_fc_rx_pause;
2245 hw_dbg(hw, "Flow Control = RX PAUSE frames only.\n");
2246 } else {
2247 hw->fc.current_mode = ixgbe_fc_none;
2248 hw_dbg(hw, "Flow Control = NONE.\n");
2249 }
2250 return 0;
2251}
2252
2253/**
2254 * ixgbe_setup_fc - Set up flow control
2255 * @hw: pointer to hardware structure 2398 * @hw: pointer to hardware structure
2256 * 2399 *
2257 * Called at init time to set up flow control. 2400 * Compares our advertised flow control capabilities to those advertised by
2401 * our link partner, and determines the proper flow control mode to use.
2258 **/ 2402 **/
2259static s32 ixgbe_setup_fc(struct ixgbe_hw *hw, s32 packetbuf_num) 2403void ixgbe_fc_autoneg(struct ixgbe_hw *hw)
2260{ 2404{
2261 s32 ret_val = 0; 2405 s32 ret_val = IXGBE_ERR_FC_NOT_NEGOTIATED;
2262 u32 reg = 0, reg_bp = 0; 2406 ixgbe_link_speed speed;
2263 u16 reg_cu = 0; 2407 bool link_up;
2264
2265#ifdef CONFIG_DCB
2266 if (hw->fc.requested_mode == ixgbe_fc_pfc) {
2267 hw->fc.current_mode = hw->fc.requested_mode;
2268 goto out;
2269 }
2270
2271#endif /* CONFIG_DCB */
2272 /* Validate the packetbuf configuration */
2273 if (packetbuf_num < 0 || packetbuf_num > 7) {
2274 hw_dbg(hw, "Invalid packet buffer number [%d], expected range "
2275 "is 0-7\n", packetbuf_num);
2276 ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;
2277 goto out;
2278 }
2279 2408
2280 /* 2409 /*
2281 * Validate the water mark configuration. Zero water marks are invalid 2410 * AN should have completed when the cable was plugged in.
2282 * because it causes the controller to just blast out fc packets. 2411 * Look for reasons to bail out. Bail out if:
2412 * - FC autoneg is disabled, or if
2413 * - link is not up.
2414 *
2415 * Since we're being called from an LSC, link is already known to be up.
2416 * So use link_up_wait_to_complete=false.
2283 */ 2417 */
2284 if (!hw->fc.low_water || 2418 if (hw->fc.disable_fc_autoneg)
2285 !hw->fc.high_water[packetbuf_num] ||
2286 !hw->fc.pause_time) {
2287 hw_dbg(hw, "Invalid water mark configuration\n");
2288 ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;
2289 goto out; 2419 goto out;
2290 }
2291 2420
2292 /* 2421 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2293 * Validate the requested mode. Strict IEEE mode does not allow 2422 if (!link_up)
2294 * ixgbe_fc_rx_pause because it will cause us to fail at UNH.
2295 */
2296 if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) {
2297 hw_dbg(hw, "ixgbe_fc_rx_pause not valid in strict "
2298 "IEEE mode\n");
2299 ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS;
2300 goto out; 2423 goto out;
2301 }
2302
2303 /*
2304 * 10gig parts do not have a word in the EEPROM to determine the
2305 * default flow control setting, so we explicitly set it to full.
2306 */
2307 if (hw->fc.requested_mode == ixgbe_fc_default)
2308 hw->fc.requested_mode = ixgbe_fc_full;
2309
2310 /*
2311 * Set up the 1G and 10G flow control advertisement registers so the
2312 * HW will be able to do fc autoneg once the cable is plugged in. If
2313 * we link at 10G, the 1G advertisement is harmless and vice versa.
2314 */
2315 2424
2316 switch (hw->phy.media_type) { 2425 switch (hw->phy.media_type) {
2426 /* Autoneg flow control on fiber adapters */
2317 case ixgbe_media_type_fiber: 2427 case ixgbe_media_type_fiber:
2428 if (speed == IXGBE_LINK_SPEED_1GB_FULL)
2429 ret_val = ixgbe_fc_autoneg_fiber(hw);
2430 break;
2431
2432 /* Autoneg flow control on backplane adapters */
2318 case ixgbe_media_type_backplane: 2433 case ixgbe_media_type_backplane:
2319 reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); 2434 ret_val = ixgbe_fc_autoneg_backplane(hw);
2320 reg_bp = IXGBE_READ_REG(hw, IXGBE_AUTOC);
2321 break; 2435 break;
2322 2436
2437 /* Autoneg flow control on copper adapters */
2323 case ixgbe_media_type_copper: 2438 case ixgbe_media_type_copper:
2324 hw->phy.ops.read_reg(hw, MDIO_AN_ADVERTISE, 2439 if (ixgbe_device_supports_autoneg_fc(hw) == 0)
2325 MDIO_MMD_AN, &reg_cu); 2440 ret_val = ixgbe_fc_autoneg_copper(hw);
2326 break; 2441 break;
2327 2442
2328 default: 2443 default:
2329 ;
2330 }
2331
2332 /*
2333 * The possible values of fc.requested_mode are:
2334 * 0: Flow control is completely disabled
2335 * 1: Rx flow control is enabled (we can receive pause frames,
2336 * but not send pause frames).
2337 * 2: Tx flow control is enabled (we can send pause frames but
2338 * we do not support receiving pause frames).
2339 * 3: Both Rx and Tx flow control (symmetric) are enabled.
2340#ifdef CONFIG_DCB
2341 * 4: Priority Flow Control is enabled.
2342#endif
2343 * other: Invalid.
2344 */
2345 switch (hw->fc.requested_mode) {
2346 case ixgbe_fc_none:
2347 /* Flow control completely disabled by software override. */
2348 reg &= ~(IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);
2349 if (hw->phy.media_type == ixgbe_media_type_backplane)
2350 reg_bp &= ~(IXGBE_AUTOC_SYM_PAUSE |
2351 IXGBE_AUTOC_ASM_PAUSE);
2352 else if (hw->phy.media_type == ixgbe_media_type_copper)
2353 reg_cu &= ~(IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE);
2354 break;
2355 case ixgbe_fc_rx_pause:
2356 /*
2357 * Rx Flow control is enabled and Tx Flow control is
2358 * disabled by software override. Since there really
2359 * isn't a way to advertise that we are capable of RX
2360 * Pause ONLY, we will advertise that we support both
2361 * symmetric and asymmetric Rx PAUSE. Later, we will
2362 * disable the adapter's ability to send PAUSE frames.
2363 */
2364 reg |= (IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);
2365 if (hw->phy.media_type == ixgbe_media_type_backplane)
2366 reg_bp |= (IXGBE_AUTOC_SYM_PAUSE |
2367 IXGBE_AUTOC_ASM_PAUSE);
2368 else if (hw->phy.media_type == ixgbe_media_type_copper)
2369 reg_cu |= (IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE);
2370 break;
2371 case ixgbe_fc_tx_pause:
2372 /*
2373 * Tx Flow control is enabled, and Rx Flow control is
2374 * disabled by software override.
2375 */
2376 reg |= (IXGBE_PCS1GANA_ASM_PAUSE);
2377 reg &= ~(IXGBE_PCS1GANA_SYM_PAUSE);
2378 if (hw->phy.media_type == ixgbe_media_type_backplane) {
2379 reg_bp |= (IXGBE_AUTOC_ASM_PAUSE);
2380 reg_bp &= ~(IXGBE_AUTOC_SYM_PAUSE);
2381 } else if (hw->phy.media_type == ixgbe_media_type_copper) {
2382 reg_cu |= (IXGBE_TAF_ASM_PAUSE);
2383 reg_cu &= ~(IXGBE_TAF_SYM_PAUSE);
2384 }
2385 break;
2386 case ixgbe_fc_full:
2387 /* Flow control (both Rx and Tx) is enabled by SW override. */
2388 reg |= (IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE);
2389 if (hw->phy.media_type == ixgbe_media_type_backplane)
2390 reg_bp |= (IXGBE_AUTOC_SYM_PAUSE |
2391 IXGBE_AUTOC_ASM_PAUSE);
2392 else if (hw->phy.media_type == ixgbe_media_type_copper)
2393 reg_cu |= (IXGBE_TAF_SYM_PAUSE | IXGBE_TAF_ASM_PAUSE);
2394 break;
2395#ifdef CONFIG_DCB
2396 case ixgbe_fc_pfc:
2397 goto out;
2398 break;
2399#endif /* CONFIG_DCB */
2400 default:
2401 hw_dbg(hw, "Flow control param set incorrectly\n");
2402 ret_val = IXGBE_ERR_CONFIG;
2403 goto out;
2404 break; 2444 break;
2405 } 2445 }
2406 2446
2407 if (hw->mac.type != ixgbe_mac_X540) {
2408 /*
2409 * Enable auto-negotiation between the MAC & PHY;
2410 * the MAC will advertise clause 37 flow control.
2411 */
2412 IXGBE_WRITE_REG(hw, IXGBE_PCS1GANA, reg);
2413 reg = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
2414
2415 /* Disable AN timeout */
2416 if (hw->fc.strict_ieee)
2417 reg &= ~IXGBE_PCS1GLCTL_AN_1G_TIMEOUT_EN;
2418
2419 IXGBE_WRITE_REG(hw, IXGBE_PCS1GLCTL, reg);
2420 hw_dbg(hw, "Set up FC; PCS1GLCTL = 0x%08X\n", reg);
2421 }
2422
2423 /*
2424 * AUTOC restart handles negotiation of 1G and 10G on backplane
2425 * and copper. There is no need to set the PCS1GCTL register.
2426 *
2427 */
2428 if (hw->phy.media_type == ixgbe_media_type_backplane) {
2429 reg_bp |= IXGBE_AUTOC_AN_RESTART;
2430 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_bp);
2431 } else if ((hw->phy.media_type == ixgbe_media_type_copper) &&
2432 (ixgbe_device_supports_autoneg_fc(hw) == 0)) {
2433 hw->phy.ops.write_reg(hw, MDIO_AN_ADVERTISE,
2434 MDIO_MMD_AN, reg_cu);
2435 }
2436
2437 hw_dbg(hw, "Set up FC; IXGBE_AUTOC = 0x%08X\n", reg);
2438out: 2447out:
2439 return ret_val; 2448 if (ret_val == 0) {
2449 hw->fc.fc_was_autonegged = true;
2450 } else {
2451 hw->fc.fc_was_autonegged = false;
2452 hw->fc.current_mode = hw->fc.requested_mode;
2453 }
2440} 2454}
2441 2455
2442/** 2456/**
@@ -3207,28 +3221,6 @@ wwn_prefix_out:
3207} 3221}
3208 3222
3209/** 3223/**
3210 * ixgbe_device_supports_autoneg_fc - Check if phy supports autoneg flow
3211 * control
3212 * @hw: pointer to hardware structure
3213 *
3214 * There are several phys that do not support autoneg flow control. This
3215 * function check the device id to see if the associated phy supports
3216 * autoneg flow control.
3217 **/
3218static s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)
3219{
3220
3221 switch (hw->device_id) {
3222 case IXGBE_DEV_ID_X540T:
3223 return 0;
3224 case IXGBE_DEV_ID_82599_T3_LOM:
3225 return 0;
3226 default:
3227 return IXGBE_ERR_FC_NOT_SUPPORTED;
3228 }
3229}
3230
3231/**
3232 * ixgbe_set_mac_anti_spoofing - Enable/Disable MAC anti-spoofing 3224 * ixgbe_set_mac_anti_spoofing - Enable/Disable MAC anti-spoofing
3233 * @hw: pointer to hardware structure 3225 * @hw: pointer to hardware structure
3234 * @enable: enable or disable switch for anti-spoofing 3226 * @enable: enable or disable switch for anti-spoofing