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authorTomasz Figa <t.figa@samsung.com>2012-10-11 04:11:19 -0400
committerLinus Walleij <linus.walleij@linaro.org>2012-10-15 03:10:12 -0400
commit22b9ba033bb4401e4cceb69c9e1af74a4631dd74 (patch)
tree4ba330cfa27136af9aacd0fb7e72e6b4c0871360 /drivers
parenta04b07c0fc4d63e3fb9fea84d48a177ac5bd9164 (diff)
pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINT
Pins used as wake-up interrupts need to be configured as EINTs. This patch adds the required configuration code to exynos_wkup_irq_set_type, to set the pin as EINT when its interrupt trigger type is configured. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pinctrl/pinctrl-exynos.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/pinctrl/pinctrl-exynos.c b/drivers/pinctrl/pinctrl-exynos.c
index 4bf2fc40aca8..73a0aa27cd56 100644
--- a/drivers/pinctrl/pinctrl-exynos.c
+++ b/drivers/pinctrl/pinctrl-exynos.c
@@ -257,6 +257,7 @@ static int exynos_wkup_irq_set_type(struct irq_data *irqd, unsigned int type)
257 unsigned long reg_con = d->ctrl->weint_con + bank->eint_offset; 257 unsigned long reg_con = d->ctrl->weint_con + bank->eint_offset;
258 unsigned long shift = EXYNOS_EINT_CON_LEN * pin; 258 unsigned long shift = EXYNOS_EINT_CON_LEN * pin;
259 unsigned long con, trig_type; 259 unsigned long con, trig_type;
260 unsigned int mask;
260 261
261 switch (type) { 262 switch (type) {
262 case IRQ_TYPE_EDGE_RISING: 263 case IRQ_TYPE_EDGE_RISING:
@@ -288,6 +289,16 @@ static int exynos_wkup_irq_set_type(struct irq_data *irqd, unsigned int type)
288 con &= ~(EXYNOS_EINT_CON_MASK << shift); 289 con &= ~(EXYNOS_EINT_CON_MASK << shift);
289 con |= trig_type << shift; 290 con |= trig_type << shift;
290 writel(con, d->virt_base + reg_con); 291 writel(con, d->virt_base + reg_con);
292
293 reg_con = bank->pctl_offset;
294 shift = pin * bank->func_width;
295 mask = (1 << bank->func_width) - 1;
296
297 con = readl(d->virt_base + reg_con);
298 con &= ~(mask << shift);
299 con |= EXYNOS_EINT_FUNC << shift;
300 writel(con, d->virt_base + reg_con);
301
291 return 0; 302 return 0;
292} 303}
293 304