diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2011-04-12 23:55:17 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2011-05-15 20:49:30 -0400 |
commit | 1233bd8d31902c09f22691294082c7825f71d13b (patch) | |
tree | ae27044f308e355976230fd2e5747bed8ed16f68 /drivers | |
parent | 1d97f4acd31f605452ed042bbd9ff5802e37d477 (diff) |
drm/nvc0/fifo: stick user area into a gpuobj rather than a bo
Contents will now be preserved across a suspend, unlike a pinned bo
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_fifo.c | 49 |
1 files changed, 8 insertions, 41 deletions
diff --git a/drivers/gpu/drm/nouveau/nvc0_fifo.c b/drivers/gpu/drm/nouveau/nvc0_fifo.c index be4e4834470a..fb4f5943e01b 100644 --- a/drivers/gpu/drm/nouveau/nvc0_fifo.c +++ b/drivers/gpu/drm/nouveau/nvc0_fifo.c | |||
@@ -37,7 +37,7 @@ struct nvc0_fifo_priv { | |||
37 | }; | 37 | }; |
38 | 38 | ||
39 | struct nvc0_fifo_chan { | 39 | struct nvc0_fifo_chan { |
40 | struct nouveau_bo *user; | 40 | struct nouveau_gpuobj *user; |
41 | struct nouveau_gpuobj *ramfc; | 41 | struct nouveau_gpuobj *ramfc; |
42 | }; | 42 | }; |
43 | 43 | ||
@@ -106,7 +106,7 @@ nvc0_fifo_create_context(struct nouveau_channel *chan) | |||
106 | struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo; | 106 | struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo; |
107 | struct nvc0_fifo_priv *priv = pfifo->priv; | 107 | struct nvc0_fifo_priv *priv = pfifo->priv; |
108 | struct nvc0_fifo_chan *fifoch; | 108 | struct nvc0_fifo_chan *fifoch; |
109 | u64 ib_virt, user_vinst; | 109 | u64 ib_virt = chan->pushbuf_base + chan->dma.ib_base * 4; |
110 | int ret; | 110 | int ret; |
111 | 111 | ||
112 | chan->fifo_priv = kzalloc(sizeof(*fifoch), GFP_KERNEL); | 112 | chan->fifo_priv = kzalloc(sizeof(*fifoch), GFP_KERNEL); |
@@ -115,28 +115,13 @@ nvc0_fifo_create_context(struct nouveau_channel *chan) | |||
115 | fifoch = chan->fifo_priv; | 115 | fifoch = chan->fifo_priv; |
116 | 116 | ||
117 | /* allocate vram for control regs, map into polling area */ | 117 | /* allocate vram for control regs, map into polling area */ |
118 | ret = nouveau_bo_new(dev, NULL, 0x1000, 0, TTM_PL_FLAG_VRAM, | 118 | ret = nouveau_gpuobj_new(dev, NULL, 0x1000, 0x1000, |
119 | 0, 0, &fifoch->user); | 119 | NVOBJ_FLAG_ZERO_ALLOC, &fifoch->user); |
120 | if (ret) | 120 | if (ret) |
121 | goto error; | 121 | goto error; |
122 | 122 | ||
123 | ret = nouveau_bo_pin(fifoch->user, TTM_PL_FLAG_VRAM); | ||
124 | if (ret) { | ||
125 | nouveau_bo_ref(NULL, &fifoch->user); | ||
126 | goto error; | ||
127 | } | ||
128 | |||
129 | user_vinst = fifoch->user->bo.mem.start << PAGE_SHIFT; | ||
130 | |||
131 | ret = nouveau_bo_map(fifoch->user); | ||
132 | if (ret) { | ||
133 | nouveau_bo_unpin(fifoch->user); | ||
134 | nouveau_bo_ref(NULL, &fifoch->user); | ||
135 | goto error; | ||
136 | } | ||
137 | |||
138 | nouveau_vm_map_at(&priv->user_vma, chan->id * 0x1000, | 123 | nouveau_vm_map_at(&priv->user_vma, chan->id * 0x1000, |
139 | fifoch->user->bo.mem.mm_node); | 124 | *(struct nouveau_mem **)fifoch->user->node); |
140 | 125 | ||
141 | chan->user = ioremap_wc(pci_resource_start(dev->pdev, 1) + | 126 | chan->user = ioremap_wc(pci_resource_start(dev->pdev, 1) + |
142 | priv->user_vma.offset + (chan->id * 0x1000), | 127 | priv->user_vma.offset + (chan->id * 0x1000), |
@@ -146,20 +131,6 @@ nvc0_fifo_create_context(struct nouveau_channel *chan) | |||
146 | goto error; | 131 | goto error; |
147 | } | 132 | } |
148 | 133 | ||
149 | ib_virt = chan->pushbuf_base + chan->dma.ib_base * 4; | ||
150 | |||
151 | /* zero channel regs */ | ||
152 | nouveau_bo_wr32(fifoch->user, 0x0040/4, 0); | ||
153 | nouveau_bo_wr32(fifoch->user, 0x0044/4, 0); | ||
154 | nouveau_bo_wr32(fifoch->user, 0x0048/4, 0); | ||
155 | nouveau_bo_wr32(fifoch->user, 0x004c/4, 0); | ||
156 | nouveau_bo_wr32(fifoch->user, 0x0050/4, 0); | ||
157 | nouveau_bo_wr32(fifoch->user, 0x0058/4, 0); | ||
158 | nouveau_bo_wr32(fifoch->user, 0x005c/4, 0); | ||
159 | nouveau_bo_wr32(fifoch->user, 0x0060/4, 0); | ||
160 | nouveau_bo_wr32(fifoch->user, 0x0088/4, 0); | ||
161 | nouveau_bo_wr32(fifoch->user, 0x008c/4, 0); | ||
162 | |||
163 | /* ramfc */ | 134 | /* ramfc */ |
164 | ret = nouveau_gpuobj_new_fake(dev, chan->ramin->pinst, | 135 | ret = nouveau_gpuobj_new_fake(dev, chan->ramin->pinst, |
165 | chan->ramin->vinst, 0x100, | 136 | chan->ramin->vinst, 0x100, |
@@ -167,8 +138,8 @@ nvc0_fifo_create_context(struct nouveau_channel *chan) | |||
167 | if (ret) | 138 | if (ret) |
168 | goto error; | 139 | goto error; |
169 | 140 | ||
170 | nv_wo32(fifoch->ramfc, 0x08, lower_32_bits(user_vinst)); | 141 | nv_wo32(fifoch->ramfc, 0x08, lower_32_bits(fifoch->user->vinst)); |
171 | nv_wo32(fifoch->ramfc, 0x0c, upper_32_bits(user_vinst)); | 142 | nv_wo32(fifoch->ramfc, 0x0c, upper_32_bits(fifoch->user->vinst)); |
172 | nv_wo32(fifoch->ramfc, 0x10, 0x0000face); | 143 | nv_wo32(fifoch->ramfc, 0x10, 0x0000face); |
173 | nv_wo32(fifoch->ramfc, 0x30, 0xfffff902); | 144 | nv_wo32(fifoch->ramfc, 0x30, 0xfffff902); |
174 | nv_wo32(fifoch->ramfc, 0x48, lower_32_bits(ib_virt)); | 145 | nv_wo32(fifoch->ramfc, 0x48, lower_32_bits(ib_virt)); |
@@ -223,11 +194,7 @@ nvc0_fifo_destroy_context(struct nouveau_channel *chan) | |||
223 | return; | 194 | return; |
224 | 195 | ||
225 | nouveau_gpuobj_ref(NULL, &fifoch->ramfc); | 196 | nouveau_gpuobj_ref(NULL, &fifoch->ramfc); |
226 | if (fifoch->user) { | 197 | nouveau_gpuobj_ref(NULL, &fifoch->user); |
227 | nouveau_bo_unmap(fifoch->user); | ||
228 | nouveau_bo_unpin(fifoch->user); | ||
229 | nouveau_bo_ref(NULL, &fifoch->user); | ||
230 | } | ||
231 | kfree(fifoch); | 198 | kfree(fifoch); |
232 | } | 199 | } |
233 | 200 | ||