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authorIngo Molnar <mingo@elte.hu>2009-09-20 14:24:58 -0400
committerIngo Molnar <mingo@elte.hu>2009-09-20 14:25:03 -0400
commitbfefb7a0c6e08736f2d5917c468467f134bf28bb (patch)
tree7aa7084114dc083fe5b4d7b532901bdeb67188e7 /drivers
parent8d0cc631f6dd0a9283ceb7d61d8b85ecbcd355ea (diff)
parent78f28b7c555359c67c2a0d23f7436e915329421e (diff)
Merge branch 'linus' into x86/urgent
Merge reason: Bring in changes that the next patch will depend on. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/char/mbcs.c5
-rw-r--r--drivers/char/pty.c6
-rw-r--r--drivers/cpufreq/cpufreq.c305
-rw-r--r--drivers/cpufreq/cpufreq_ondemand.c139
-rw-r--r--drivers/gpio/Kconfig7
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/wm831x-gpio.c252
-rw-r--r--drivers/hwmon/Kconfig21
-rw-r--r--drivers/hwmon/Makefile2
-rw-r--r--drivers/hwmon/wm831x-hwmon.c226
-rw-r--r--drivers/hwmon/wm8350-hwmon.c151
-rw-r--r--drivers/i2c/busses/i2c-sh_mobile.c39
-rw-r--r--drivers/input/keyboard/omap-keypad.c22
-rw-r--r--drivers/input/keyboard/sh_keysc.c3
-rw-r--r--drivers/input/misc/Kconfig20
-rw-r--r--drivers/input/misc/Makefile3
-rw-r--r--drivers/input/misc/pcap_keys.c144
-rw-r--r--drivers/input/misc/wm831x-on.c163
-rw-r--r--drivers/input/touchscreen/Kconfig9
-rw-r--r--drivers/input/touchscreen/Makefile1
-rw-r--r--drivers/input/touchscreen/pcap_ts.c271
-rw-r--r--drivers/media/video/sh_mobile_ceu_camera.c41
-rw-r--r--drivers/mfd/Kconfig42
-rw-r--r--drivers/mfd/Makefile6
-rw-r--r--drivers/mfd/ab3100-core.c62
-rw-r--r--drivers/mfd/ab3100-otp.c268
-rw-r--r--drivers/mfd/dm355evm_msp.c12
-rw-r--r--drivers/mfd/ezx-pcap.c105
-rw-r--r--drivers/mfd/mc13783-core.c427
-rw-r--r--drivers/mfd/mfd-core.c2
-rw-r--r--drivers/mfd/pcf50633-adc.c32
-rw-r--r--drivers/mfd/pcf50633-core.c5
-rw-r--r--drivers/mfd/twl4030-core.c23
-rw-r--r--drivers/mfd/twl4030-irq.c2
-rw-r--r--drivers/mfd/twl4030-power.c472
-rw-r--r--drivers/mfd/wm831x-core.c1549
-rw-r--r--drivers/mfd/wm831x-irq.c559
-rw-r--r--drivers/mfd/wm831x-otp.c83
-rw-r--r--drivers/mfd/wm8350-core.c27
-rw-r--r--drivers/misc/sgi-xp/xpc_sn2.c40
-rw-r--r--drivers/mtd/nand/ams-delta.c8
-rw-r--r--drivers/regulator/Kconfig31
-rw-r--r--drivers/regulator/Makefile6
-rw-r--r--drivers/regulator/ab3100.c700
-rw-r--r--drivers/regulator/core.c24
-rw-r--r--drivers/regulator/mc13783.c410
-rw-r--r--drivers/regulator/pcap-regulator.c318
-rw-r--r--drivers/regulator/wm831x-dcdc.c862
-rw-r--r--drivers/regulator/wm831x-isink.c260
-rw-r--r--drivers/regulator/wm831x-ldo.c852
-rw-r--r--drivers/rtc/Kconfig19
-rw-r--r--drivers/rtc/Makefile2
-rw-r--r--drivers/rtc/rtc-ab3100.c281
-rw-r--r--drivers/rtc/rtc-ds1302.c69
-rw-r--r--drivers/rtc/rtc-sh.c97
-rw-r--r--drivers/rtc/rtc-wm831x.c523
-rw-r--r--drivers/serial/ioc4_serial.c2
-rw-r--r--drivers/serial/sh-sci.c8
-rw-r--r--drivers/serial/sh-sci.h17
-rw-r--r--drivers/sh/intc.c71
-rw-r--r--drivers/uio/uio_pdrv_genirq.c54
-rw-r--r--drivers/usb/gadget/Kconfig28
-rw-r--r--drivers/usb/gadget/Makefile1
-rw-r--r--drivers/usb/gadget/gadget_chips.h8
-rw-r--r--drivers/usb/gadget/m66592-udc.c286
-rw-r--r--drivers/usb/gadget/m66592-udc.h90
-rw-r--r--drivers/usb/gadget/r8a66597-udc.c1689
-rw-r--r--drivers/usb/gadget/r8a66597-udc.h256
-rw-r--r--drivers/usb/host/Kconfig7
-rw-r--r--drivers/usb/host/r8a66597-hcd.c210
-rw-r--r--drivers/usb/host/r8a66597.h440
-rw-r--r--drivers/video/Kconfig2
-rw-r--r--drivers/video/omap/dispc.c6
-rw-r--r--drivers/video/sh_mobile_lcdcfb.c292
-rw-r--r--drivers/watchdog/Kconfig38
-rw-r--r--drivers/watchdog/Makefile3
-rw-r--r--drivers/watchdog/ar7_wdt.c107
-rw-r--r--drivers/watchdog/booke_wdt.c57
-rw-r--r--drivers/watchdog/coh901327_wdt.c2
-rw-r--r--drivers/watchdog/davinci_wdt.c19
-rw-r--r--drivers/watchdog/iop_wdt.c2
-rw-r--r--drivers/watchdog/nuc900_wdt.c353
-rw-r--r--drivers/watchdog/rm9k_wdt.c2
-rw-r--r--drivers/watchdog/sbc_fitpc2_wdt.c267
-rw-r--r--drivers/watchdog/sc1200wdt.c2
-rw-r--r--drivers/watchdog/wdt_pci.c21
-rw-r--r--drivers/watchdog/wm831x_wdt.c441
87 files changed, 13502 insertions, 1288 deletions
diff --git a/drivers/char/mbcs.c b/drivers/char/mbcs.c
index acd8e9ed474a..87c67b42bc08 100644
--- a/drivers/char/mbcs.c
+++ b/drivers/char/mbcs.c
@@ -15,6 +15,7 @@
15#include <linux/moduleparam.h> 15#include <linux/moduleparam.h>
16#include <linux/types.h> 16#include <linux/types.h>
17#include <linux/ioport.h> 17#include <linux/ioport.h>
18#include <linux/kernel.h>
18#include <linux/notifier.h> 19#include <linux/notifier.h>
19#include <linux/reboot.h> 20#include <linux/reboot.h>
20#include <linux/init.h> 21#include <linux/init.h>
@@ -715,8 +716,8 @@ static ssize_t show_algo(struct device *dev, struct device_attribute *attr, char
715 */ 716 */
716 debug0 = *(uint64_t *) soft->debug_addr; 717 debug0 = *(uint64_t *) soft->debug_addr;
717 718
718 return sprintf(buf, "0x%lx 0x%lx\n", 719 return sprintf(buf, "0x%x 0x%x\n",
719 (debug0 >> 32), (debug0 & 0xffffffff)); 720 upper_32_bits(debug0), lower_32_bits(debug0));
720} 721}
721 722
722static ssize_t store_algo(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 723static ssize_t store_algo(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
diff --git a/drivers/char/pty.c b/drivers/char/pty.c
index b33d6688e910..53761cefa915 100644
--- a/drivers/char/pty.c
+++ b/drivers/char/pty.c
@@ -120,8 +120,10 @@ static int pty_write(struct tty_struct *tty, const unsigned char *buf, int c)
120 /* Stuff the data into the input queue of the other end */ 120 /* Stuff the data into the input queue of the other end */
121 c = tty_insert_flip_string(to, buf, c); 121 c = tty_insert_flip_string(to, buf, c);
122 /* And shovel */ 122 /* And shovel */
123 tty_flip_buffer_push(to); 123 if (c) {
124 tty_wakeup(tty); 124 tty_flip_buffer_push(to);
125 tty_wakeup(tty);
126 }
125 } 127 }
126 return c; 128 return c;
127} 129}
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 2968ed6a9c49..3938c7817095 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -61,6 +61,8 @@ static DEFINE_SPINLOCK(cpufreq_driver_lock);
61 * are concerned with are online after they get the lock. 61 * are concerned with are online after they get the lock.
62 * - Governor routines that can be called in cpufreq hotplug path should not 62 * - Governor routines that can be called in cpufreq hotplug path should not
63 * take this sem as top level hotplug notifier handler takes this. 63 * take this sem as top level hotplug notifier handler takes this.
64 * - Lock should not be held across
65 * __cpufreq_governor(data, CPUFREQ_GOV_STOP);
64 */ 66 */
65static DEFINE_PER_CPU(int, policy_cpu); 67static DEFINE_PER_CPU(int, policy_cpu);
66static DEFINE_PER_CPU(struct rw_semaphore, cpu_policy_rwsem); 68static DEFINE_PER_CPU(struct rw_semaphore, cpu_policy_rwsem);
@@ -686,6 +688,9 @@ static struct attribute *default_attrs[] = {
686 NULL 688 NULL
687}; 689};
688 690
691struct kobject *cpufreq_global_kobject;
692EXPORT_SYMBOL(cpufreq_global_kobject);
693
689#define to_policy(k) container_of(k, struct cpufreq_policy, kobj) 694#define to_policy(k) container_of(k, struct cpufreq_policy, kobj)
690#define to_attr(a) container_of(a, struct freq_attr, attr) 695#define to_attr(a) container_of(a, struct freq_attr, attr)
691 696
@@ -756,92 +761,20 @@ static struct kobj_type ktype_cpufreq = {
756 .release = cpufreq_sysfs_release, 761 .release = cpufreq_sysfs_release,
757}; 762};
758 763
759 764/*
760/** 765 * Returns:
761 * cpufreq_add_dev - add a CPU device 766 * Negative: Failure
762 * 767 * 0: Success
763 * Adds the cpufreq interface for a CPU device. 768 * Positive: When we have a managed CPU and the sysfs got symlinked
764 *
765 * The Oracle says: try running cpufreq registration/unregistration concurrently
766 * with with cpu hotplugging and all hell will break loose. Tried to clean this
767 * mess up, but more thorough testing is needed. - Mathieu
768 */ 769 */
769static int cpufreq_add_dev(struct sys_device *sys_dev) 770int cpufreq_add_dev_policy(unsigned int cpu, struct cpufreq_policy *policy,
771 struct sys_device *sys_dev)
770{ 772{
771 unsigned int cpu = sys_dev->id;
772 int ret = 0; 773 int ret = 0;
773 struct cpufreq_policy new_policy; 774#ifdef CONFIG_SMP
774 struct cpufreq_policy *policy;
775 struct freq_attr **drv_attr;
776 struct sys_device *cpu_sys_dev;
777 unsigned long flags; 775 unsigned long flags;
778 unsigned int j; 776 unsigned int j;
779 777
780 if (cpu_is_offline(cpu))
781 return 0;
782
783 cpufreq_debug_disable_ratelimit();
784 dprintk("adding CPU %u\n", cpu);
785
786#ifdef CONFIG_SMP
787 /* check whether a different CPU already registered this
788 * CPU because it is in the same boat. */
789 policy = cpufreq_cpu_get(cpu);
790 if (unlikely(policy)) {
791 cpufreq_cpu_put(policy);
792 cpufreq_debug_enable_ratelimit();
793 return 0;
794 }
795#endif
796
797 if (!try_module_get(cpufreq_driver->owner)) {
798 ret = -EINVAL;
799 goto module_out;
800 }
801
802 policy = kzalloc(sizeof(struct cpufreq_policy), GFP_KERNEL);
803 if (!policy) {
804 ret = -ENOMEM;
805 goto nomem_out;
806 }
807 if (!alloc_cpumask_var(&policy->cpus, GFP_KERNEL)) {
808 ret = -ENOMEM;
809 goto err_free_policy;
810 }
811 if (!zalloc_cpumask_var(&policy->related_cpus, GFP_KERNEL)) {
812 ret = -ENOMEM;
813 goto err_free_cpumask;
814 }
815
816 policy->cpu = cpu;
817 cpumask_copy(policy->cpus, cpumask_of(cpu));
818
819 /* Initially set CPU itself as the policy_cpu */
820 per_cpu(policy_cpu, cpu) = cpu;
821 ret = (lock_policy_rwsem_write(cpu) < 0);
822 WARN_ON(ret);
823
824 init_completion(&policy->kobj_unregister);
825 INIT_WORK(&policy->update, handle_update);
826
827 /* Set governor before ->init, so that driver could check it */
828 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
829 /* call driver. From then on the cpufreq must be able
830 * to accept all calls to ->verify and ->setpolicy for this CPU
831 */
832 ret = cpufreq_driver->init(policy);
833 if (ret) {
834 dprintk("initialization failed\n");
835 goto err_unlock_policy;
836 }
837 policy->user_policy.min = policy->min;
838 policy->user_policy.max = policy->max;
839
840 blocking_notifier_call_chain(&cpufreq_policy_notifier_list,
841 CPUFREQ_START, policy);
842
843#ifdef CONFIG_SMP
844
845#ifdef CONFIG_HOTPLUG_CPU 778#ifdef CONFIG_HOTPLUG_CPU
846 if (per_cpu(cpufreq_cpu_governor, cpu)) { 779 if (per_cpu(cpufreq_cpu_governor, cpu)) {
847 policy->governor = per_cpu(cpufreq_cpu_governor, cpu); 780 policy->governor = per_cpu(cpufreq_cpu_governor, cpu);
@@ -872,9 +805,8 @@ static int cpufreq_add_dev(struct sys_device *sys_dev)
872 /* Should not go through policy unlock path */ 805 /* Should not go through policy unlock path */
873 if (cpufreq_driver->exit) 806 if (cpufreq_driver->exit)
874 cpufreq_driver->exit(policy); 807 cpufreq_driver->exit(policy);
875 ret = -EBUSY;
876 cpufreq_cpu_put(managed_policy); 808 cpufreq_cpu_put(managed_policy);
877 goto err_free_cpumask; 809 return -EBUSY;
878 } 810 }
879 811
880 spin_lock_irqsave(&cpufreq_driver_lock, flags); 812 spin_lock_irqsave(&cpufreq_driver_lock, flags);
@@ -893,17 +825,62 @@ static int cpufreq_add_dev(struct sys_device *sys_dev)
893 * Call driver->exit() because only the cpu parent of 825 * Call driver->exit() because only the cpu parent of
894 * the kobj needed to call init(). 826 * the kobj needed to call init().
895 */ 827 */
896 goto out_driver_exit; /* call driver->exit() */ 828 if (cpufreq_driver->exit)
829 cpufreq_driver->exit(policy);
830
831 if (!ret)
832 return 1;
833 else
834 return ret;
897 } 835 }
898 } 836 }
899#endif 837#endif
900 memcpy(&new_policy, policy, sizeof(struct cpufreq_policy)); 838 return ret;
839}
840
841
842/* symlink affected CPUs */
843int cpufreq_add_dev_symlink(unsigned int cpu, struct cpufreq_policy *policy)
844{
845 unsigned int j;
846 int ret = 0;
847
848 for_each_cpu(j, policy->cpus) {
849 struct cpufreq_policy *managed_policy;
850 struct sys_device *cpu_sys_dev;
851
852 if (j == cpu)
853 continue;
854 if (!cpu_online(j))
855 continue;
856
857 dprintk("CPU %u already managed, adding link\n", j);
858 managed_policy = cpufreq_cpu_get(cpu);
859 cpu_sys_dev = get_cpu_sysdev(j);
860 ret = sysfs_create_link(&cpu_sys_dev->kobj, &policy->kobj,
861 "cpufreq");
862 if (ret) {
863 cpufreq_cpu_put(managed_policy);
864 return ret;
865 }
866 }
867 return ret;
868}
869
870int cpufreq_add_dev_interface(unsigned int cpu, struct cpufreq_policy *policy,
871 struct sys_device *sys_dev)
872{
873 struct cpufreq_policy new_policy;
874 struct freq_attr **drv_attr;
875 unsigned long flags;
876 int ret = 0;
877 unsigned int j;
901 878
902 /* prepare interface data */ 879 /* prepare interface data */
903 ret = kobject_init_and_add(&policy->kobj, &ktype_cpufreq, &sys_dev->kobj, 880 ret = kobject_init_and_add(&policy->kobj, &ktype_cpufreq,
904 "cpufreq"); 881 &sys_dev->kobj, "cpufreq");
905 if (ret) 882 if (ret)
906 goto out_driver_exit; 883 return ret;
907 884
908 /* set up files for this cpu device */ 885 /* set up files for this cpu device */
909 drv_attr = cpufreq_driver->attr; 886 drv_attr = cpufreq_driver->attr;
@@ -926,35 +903,20 @@ static int cpufreq_add_dev(struct sys_device *sys_dev)
926 903
927 spin_lock_irqsave(&cpufreq_driver_lock, flags); 904 spin_lock_irqsave(&cpufreq_driver_lock, flags);
928 for_each_cpu(j, policy->cpus) { 905 for_each_cpu(j, policy->cpus) {
929 if (!cpu_online(j)) 906 if (!cpu_online(j))
930 continue; 907 continue;
931 per_cpu(cpufreq_cpu_data, j) = policy; 908 per_cpu(cpufreq_cpu_data, j) = policy;
932 per_cpu(policy_cpu, j) = policy->cpu; 909 per_cpu(policy_cpu, j) = policy->cpu;
933 } 910 }
934 spin_unlock_irqrestore(&cpufreq_driver_lock, flags); 911 spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
935 912
936 /* symlink affected CPUs */ 913 ret = cpufreq_add_dev_symlink(cpu, policy);
937 for_each_cpu(j, policy->cpus) { 914 if (ret)
938 struct cpufreq_policy *managed_policy; 915 goto err_out_kobj_put;
939
940 if (j == cpu)
941 continue;
942 if (!cpu_online(j))
943 continue;
944
945 dprintk("CPU %u already managed, adding link\n", j);
946 managed_policy = cpufreq_cpu_get(cpu);
947 cpu_sys_dev = get_cpu_sysdev(j);
948 ret = sysfs_create_link(&cpu_sys_dev->kobj, &policy->kobj,
949 "cpufreq");
950 if (ret) {
951 cpufreq_cpu_put(managed_policy);
952 goto err_out_unregister;
953 }
954 }
955 916
956 policy->governor = NULL; /* to assure that the starting sequence is 917 memcpy(&new_policy, policy, sizeof(struct cpufreq_policy));
957 * run in cpufreq_set_policy */ 918 /* assure that the starting sequence is run in __cpufreq_set_policy */
919 policy->governor = NULL;
958 920
959 /* set default policy */ 921 /* set default policy */
960 ret = __cpufreq_set_policy(policy, &new_policy); 922 ret = __cpufreq_set_policy(policy, &new_policy);
@@ -963,8 +925,107 @@ static int cpufreq_add_dev(struct sys_device *sys_dev)
963 925
964 if (ret) { 926 if (ret) {
965 dprintk("setting policy failed\n"); 927 dprintk("setting policy failed\n");
966 goto err_out_unregister; 928 if (cpufreq_driver->exit)
929 cpufreq_driver->exit(policy);
930 }
931 return ret;
932
933err_out_kobj_put:
934 kobject_put(&policy->kobj);
935 wait_for_completion(&policy->kobj_unregister);
936 return ret;
937}
938
939
940/**
941 * cpufreq_add_dev - add a CPU device
942 *
943 * Adds the cpufreq interface for a CPU device.
944 *
945 * The Oracle says: try running cpufreq registration/unregistration concurrently
946 * with with cpu hotplugging and all hell will break loose. Tried to clean this
947 * mess up, but more thorough testing is needed. - Mathieu
948 */
949static int cpufreq_add_dev(struct sys_device *sys_dev)
950{
951 unsigned int cpu = sys_dev->id;
952 int ret = 0;
953 struct cpufreq_policy *policy;
954 unsigned long flags;
955 unsigned int j;
956
957 if (cpu_is_offline(cpu))
958 return 0;
959
960 cpufreq_debug_disable_ratelimit();
961 dprintk("adding CPU %u\n", cpu);
962
963#ifdef CONFIG_SMP
964 /* check whether a different CPU already registered this
965 * CPU because it is in the same boat. */
966 policy = cpufreq_cpu_get(cpu);
967 if (unlikely(policy)) {
968 cpufreq_cpu_put(policy);
969 cpufreq_debug_enable_ratelimit();
970 return 0;
971 }
972#endif
973
974 if (!try_module_get(cpufreq_driver->owner)) {
975 ret = -EINVAL;
976 goto module_out;
977 }
978
979 ret = -ENOMEM;
980 policy = kzalloc(sizeof(struct cpufreq_policy), GFP_KERNEL);
981 if (!policy)
982 goto nomem_out;
983
984 if (!alloc_cpumask_var(&policy->cpus, GFP_KERNEL))
985 goto err_free_policy;
986
987 if (!zalloc_cpumask_var(&policy->related_cpus, GFP_KERNEL))
988 goto err_free_cpumask;
989
990 policy->cpu = cpu;
991 cpumask_copy(policy->cpus, cpumask_of(cpu));
992
993 /* Initially set CPU itself as the policy_cpu */
994 per_cpu(policy_cpu, cpu) = cpu;
995 ret = (lock_policy_rwsem_write(cpu) < 0);
996 WARN_ON(ret);
997
998 init_completion(&policy->kobj_unregister);
999 INIT_WORK(&policy->update, handle_update);
1000
1001 /* Set governor before ->init, so that driver could check it */
1002 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
1003 /* call driver. From then on the cpufreq must be able
1004 * to accept all calls to ->verify and ->setpolicy for this CPU
1005 */
1006 ret = cpufreq_driver->init(policy);
1007 if (ret) {
1008 dprintk("initialization failed\n");
1009 goto err_unlock_policy;
967 } 1010 }
1011 policy->user_policy.min = policy->min;
1012 policy->user_policy.max = policy->max;
1013
1014 blocking_notifier_call_chain(&cpufreq_policy_notifier_list,
1015 CPUFREQ_START, policy);
1016
1017 ret = cpufreq_add_dev_policy(cpu, policy, sys_dev);
1018 if (ret) {
1019 if (ret > 0)
1020 /* This is a managed cpu, symlink created,
1021 exit with 0 */
1022 ret = 0;
1023 goto err_unlock_policy;
1024 }
1025
1026 ret = cpufreq_add_dev_interface(cpu, policy, sys_dev);
1027 if (ret)
1028 goto err_out_unregister;
968 1029
969 unlock_policy_rwsem_write(cpu); 1030 unlock_policy_rwsem_write(cpu);
970 1031
@@ -982,14 +1043,9 @@ err_out_unregister:
982 per_cpu(cpufreq_cpu_data, j) = NULL; 1043 per_cpu(cpufreq_cpu_data, j) = NULL;
983 spin_unlock_irqrestore(&cpufreq_driver_lock, flags); 1044 spin_unlock_irqrestore(&cpufreq_driver_lock, flags);
984 1045
985err_out_kobj_put:
986 kobject_put(&policy->kobj); 1046 kobject_put(&policy->kobj);
987 wait_for_completion(&policy->kobj_unregister); 1047 wait_for_completion(&policy->kobj_unregister);
988 1048
989out_driver_exit:
990 if (cpufreq_driver->exit)
991 cpufreq_driver->exit(policy);
992
993err_unlock_policy: 1049err_unlock_policy:
994 unlock_policy_rwsem_write(cpu); 1050 unlock_policy_rwsem_write(cpu);
995err_free_cpumask: 1051err_free_cpumask:
@@ -1653,8 +1709,17 @@ static int __cpufreq_set_policy(struct cpufreq_policy *data,
1653 dprintk("governor switch\n"); 1709 dprintk("governor switch\n");
1654 1710
1655 /* end old governor */ 1711 /* end old governor */
1656 if (data->governor) 1712 if (data->governor) {
1713 /*
1714 * Need to release the rwsem around governor
1715 * stop due to lock dependency between
1716 * cancel_delayed_work_sync and the read lock
1717 * taken in the delayed work handler.
1718 */
1719 unlock_policy_rwsem_write(data->cpu);
1657 __cpufreq_governor(data, CPUFREQ_GOV_STOP); 1720 __cpufreq_governor(data, CPUFREQ_GOV_STOP);
1721 lock_policy_rwsem_write(data->cpu);
1722 }
1658 1723
1659 /* start new governor */ 1724 /* start new governor */
1660 data->governor = policy->governor; 1725 data->governor = policy->governor;
@@ -1884,7 +1949,11 @@ static int __init cpufreq_core_init(void)
1884 per_cpu(policy_cpu, cpu) = -1; 1949 per_cpu(policy_cpu, cpu) = -1;
1885 init_rwsem(&per_cpu(cpu_policy_rwsem, cpu)); 1950 init_rwsem(&per_cpu(cpu_policy_rwsem, cpu));
1886 } 1951 }
1952
1953 cpufreq_global_kobject = kobject_create_and_add("cpufreq",
1954 &cpu_sysdev_class.kset.kobj);
1955 BUG_ON(!cpufreq_global_kobject);
1956
1887 return 0; 1957 return 0;
1888} 1958}
1889
1890core_initcall(cpufreq_core_init); 1959core_initcall(cpufreq_core_init);
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c
index d7a528c80de8..071699de50ee 100644
--- a/drivers/cpufreq/cpufreq_ondemand.c
+++ b/drivers/cpufreq/cpufreq_ondemand.c
@@ -55,6 +55,18 @@ static unsigned int min_sampling_rate;
55#define TRANSITION_LATENCY_LIMIT (10 * 1000 * 1000) 55#define TRANSITION_LATENCY_LIMIT (10 * 1000 * 1000)
56 56
57static void do_dbs_timer(struct work_struct *work); 57static void do_dbs_timer(struct work_struct *work);
58static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
59 unsigned int event);
60
61#ifndef CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND
62static
63#endif
64struct cpufreq_governor cpufreq_gov_ondemand = {
65 .name = "ondemand",
66 .governor = cpufreq_governor_dbs,
67 .max_transition_latency = TRANSITION_LATENCY_LIMIT,
68 .owner = THIS_MODULE,
69};
58 70
59/* Sampling types */ 71/* Sampling types */
60enum {DBS_NORMAL_SAMPLE, DBS_SUB_SAMPLE}; 72enum {DBS_NORMAL_SAMPLE, DBS_SUB_SAMPLE};
@@ -207,20 +219,23 @@ static void ondemand_powersave_bias_init(void)
207} 219}
208 220
209/************************** sysfs interface ************************/ 221/************************** sysfs interface ************************/
210static ssize_t show_sampling_rate_max(struct cpufreq_policy *policy, char *buf) 222
223static ssize_t show_sampling_rate_max(struct kobject *kobj,
224 struct attribute *attr, char *buf)
211{ 225{
212 printk_once(KERN_INFO "CPUFREQ: ondemand sampling_rate_max " 226 printk_once(KERN_INFO "CPUFREQ: ondemand sampling_rate_max "
213 "sysfs file is deprecated - used by: %s\n", current->comm); 227 "sysfs file is deprecated - used by: %s\n", current->comm);
214 return sprintf(buf, "%u\n", -1U); 228 return sprintf(buf, "%u\n", -1U);
215} 229}
216 230
217static ssize_t show_sampling_rate_min(struct cpufreq_policy *policy, char *buf) 231static ssize_t show_sampling_rate_min(struct kobject *kobj,
232 struct attribute *attr, char *buf)
218{ 233{
219 return sprintf(buf, "%u\n", min_sampling_rate); 234 return sprintf(buf, "%u\n", min_sampling_rate);
220} 235}
221 236
222#define define_one_ro(_name) \ 237#define define_one_ro(_name) \
223static struct freq_attr _name = \ 238static struct global_attr _name = \
224__ATTR(_name, 0444, show_##_name, NULL) 239__ATTR(_name, 0444, show_##_name, NULL)
225 240
226define_one_ro(sampling_rate_max); 241define_one_ro(sampling_rate_max);
@@ -229,7 +244,7 @@ define_one_ro(sampling_rate_min);
229/* cpufreq_ondemand Governor Tunables */ 244/* cpufreq_ondemand Governor Tunables */
230#define show_one(file_name, object) \ 245#define show_one(file_name, object) \
231static ssize_t show_##file_name \ 246static ssize_t show_##file_name \
232(struct cpufreq_policy *unused, char *buf) \ 247(struct kobject *kobj, struct attribute *attr, char *buf) \
233{ \ 248{ \
234 return sprintf(buf, "%u\n", dbs_tuners_ins.object); \ 249 return sprintf(buf, "%u\n", dbs_tuners_ins.object); \
235} 250}
@@ -238,8 +253,38 @@ show_one(up_threshold, up_threshold);
238show_one(ignore_nice_load, ignore_nice); 253show_one(ignore_nice_load, ignore_nice);
239show_one(powersave_bias, powersave_bias); 254show_one(powersave_bias, powersave_bias);
240 255
241static ssize_t store_sampling_rate(struct cpufreq_policy *unused, 256/*** delete after deprecation time ***/
242 const char *buf, size_t count) 257
258#define DEPRECATION_MSG(file_name) \
259 printk_once(KERN_INFO "CPUFREQ: Per core ondemand sysfs " \
260 "interface is deprecated - " #file_name "\n");
261
262#define show_one_old(file_name) \
263static ssize_t show_##file_name##_old \
264(struct cpufreq_policy *unused, char *buf) \
265{ \
266 printk_once(KERN_INFO "CPUFREQ: Per core ondemand sysfs " \
267 "interface is deprecated - " #file_name "\n"); \
268 return show_##file_name(NULL, NULL, buf); \
269}
270show_one_old(sampling_rate);
271show_one_old(up_threshold);
272show_one_old(ignore_nice_load);
273show_one_old(powersave_bias);
274show_one_old(sampling_rate_min);
275show_one_old(sampling_rate_max);
276
277#define define_one_ro_old(object, _name) \
278static struct freq_attr object = \
279__ATTR(_name, 0444, show_##_name##_old, NULL)
280
281define_one_ro_old(sampling_rate_min_old, sampling_rate_min);
282define_one_ro_old(sampling_rate_max_old, sampling_rate_max);
283
284/*** delete after deprecation time ***/
285
286static ssize_t store_sampling_rate(struct kobject *a, struct attribute *b,
287 const char *buf, size_t count)
243{ 288{
244 unsigned int input; 289 unsigned int input;
245 int ret; 290 int ret;
@@ -254,8 +299,8 @@ static ssize_t store_sampling_rate(struct cpufreq_policy *unused,
254 return count; 299 return count;
255} 300}
256 301
257static ssize_t store_up_threshold(struct cpufreq_policy *unused, 302static ssize_t store_up_threshold(struct kobject *a, struct attribute *b,
258 const char *buf, size_t count) 303 const char *buf, size_t count)
259{ 304{
260 unsigned int input; 305 unsigned int input;
261 int ret; 306 int ret;
@@ -273,8 +318,8 @@ static ssize_t store_up_threshold(struct cpufreq_policy *unused,
273 return count; 318 return count;
274} 319}
275 320
276static ssize_t store_ignore_nice_load(struct cpufreq_policy *policy, 321static ssize_t store_ignore_nice_load(struct kobject *a, struct attribute *b,
277 const char *buf, size_t count) 322 const char *buf, size_t count)
278{ 323{
279 unsigned int input; 324 unsigned int input;
280 int ret; 325 int ret;
@@ -310,8 +355,8 @@ static ssize_t store_ignore_nice_load(struct cpufreq_policy *policy,
310 return count; 355 return count;
311} 356}
312 357
313static ssize_t store_powersave_bias(struct cpufreq_policy *unused, 358static ssize_t store_powersave_bias(struct kobject *a, struct attribute *b,
314 const char *buf, size_t count) 359 const char *buf, size_t count)
315{ 360{
316 unsigned int input; 361 unsigned int input;
317 int ret; 362 int ret;
@@ -332,7 +377,7 @@ static ssize_t store_powersave_bias(struct cpufreq_policy *unused,
332} 377}
333 378
334#define define_one_rw(_name) \ 379#define define_one_rw(_name) \
335static struct freq_attr _name = \ 380static struct global_attr _name = \
336__ATTR(_name, 0644, show_##_name, store_##_name) 381__ATTR(_name, 0644, show_##_name, store_##_name)
337 382
338define_one_rw(sampling_rate); 383define_one_rw(sampling_rate);
@@ -355,6 +400,47 @@ static struct attribute_group dbs_attr_group = {
355 .name = "ondemand", 400 .name = "ondemand",
356}; 401};
357 402
403/*** delete after deprecation time ***/
404
405#define write_one_old(file_name) \
406static ssize_t store_##file_name##_old \
407(struct cpufreq_policy *unused, const char *buf, size_t count) \
408{ \
409 printk_once(KERN_INFO "CPUFREQ: Per core ondemand sysfs " \
410 "interface is deprecated - " #file_name "\n"); \
411 return store_##file_name(NULL, NULL, buf, count); \
412}
413write_one_old(sampling_rate);
414write_one_old(up_threshold);
415write_one_old(ignore_nice_load);
416write_one_old(powersave_bias);
417
418#define define_one_rw_old(object, _name) \
419static struct freq_attr object = \
420__ATTR(_name, 0644, show_##_name##_old, store_##_name##_old)
421
422define_one_rw_old(sampling_rate_old, sampling_rate);
423define_one_rw_old(up_threshold_old, up_threshold);
424define_one_rw_old(ignore_nice_load_old, ignore_nice_load);
425define_one_rw_old(powersave_bias_old, powersave_bias);
426
427static struct attribute *dbs_attributes_old[] = {
428 &sampling_rate_max_old.attr,
429 &sampling_rate_min_old.attr,
430 &sampling_rate_old.attr,
431 &up_threshold_old.attr,
432 &ignore_nice_load_old.attr,
433 &powersave_bias_old.attr,
434 NULL
435};
436
437static struct attribute_group dbs_attr_group_old = {
438 .attrs = dbs_attributes_old,
439 .name = "ondemand",
440};
441
442/*** delete after deprecation time ***/
443
358/************************** sysfs end ************************/ 444/************************** sysfs end ************************/
359 445
360static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info) 446static void dbs_check_cpu(struct cpu_dbs_info_s *this_dbs_info)
@@ -545,7 +631,7 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
545 631
546 mutex_lock(&dbs_mutex); 632 mutex_lock(&dbs_mutex);
547 633
548 rc = sysfs_create_group(&policy->kobj, &dbs_attr_group); 634 rc = sysfs_create_group(&policy->kobj, &dbs_attr_group_old);
549 if (rc) { 635 if (rc) {
550 mutex_unlock(&dbs_mutex); 636 mutex_unlock(&dbs_mutex);
551 return rc; 637 return rc;
@@ -566,13 +652,20 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
566 } 652 }
567 this_dbs_info->cpu = cpu; 653 this_dbs_info->cpu = cpu;
568 ondemand_powersave_bias_init_cpu(cpu); 654 ondemand_powersave_bias_init_cpu(cpu);
569 mutex_init(&this_dbs_info->timer_mutex);
570 /* 655 /*
571 * Start the timerschedule work, when this governor 656 * Start the timerschedule work, when this governor
572 * is used for first time 657 * is used for first time
573 */ 658 */
574 if (dbs_enable == 1) { 659 if (dbs_enable == 1) {
575 unsigned int latency; 660 unsigned int latency;
661
662 rc = sysfs_create_group(cpufreq_global_kobject,
663 &dbs_attr_group);
664 if (rc) {
665 mutex_unlock(&dbs_mutex);
666 return rc;
667 }
668
576 /* policy latency is in nS. Convert it to uS first */ 669 /* policy latency is in nS. Convert it to uS first */
577 latency = policy->cpuinfo.transition_latency / 1000; 670 latency = policy->cpuinfo.transition_latency / 1000;
578 if (latency == 0) 671 if (latency == 0)
@@ -586,6 +679,7 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
586 } 679 }
587 mutex_unlock(&dbs_mutex); 680 mutex_unlock(&dbs_mutex);
588 681
682 mutex_init(&this_dbs_info->timer_mutex);
589 dbs_timer_init(this_dbs_info); 683 dbs_timer_init(this_dbs_info);
590 break; 684 break;
591 685
@@ -593,10 +687,13 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
593 dbs_timer_exit(this_dbs_info); 687 dbs_timer_exit(this_dbs_info);
594 688
595 mutex_lock(&dbs_mutex); 689 mutex_lock(&dbs_mutex);
596 sysfs_remove_group(&policy->kobj, &dbs_attr_group); 690 sysfs_remove_group(&policy->kobj, &dbs_attr_group_old);
597 mutex_destroy(&this_dbs_info->timer_mutex); 691 mutex_destroy(&this_dbs_info->timer_mutex);
598 dbs_enable--; 692 dbs_enable--;
599 mutex_unlock(&dbs_mutex); 693 mutex_unlock(&dbs_mutex);
694 if (!dbs_enable)
695 sysfs_remove_group(cpufreq_global_kobject,
696 &dbs_attr_group);
600 697
601 break; 698 break;
602 699
@@ -614,16 +711,6 @@ static int cpufreq_governor_dbs(struct cpufreq_policy *policy,
614 return 0; 711 return 0;
615} 712}
616 713
617#ifndef CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND
618static
619#endif
620struct cpufreq_governor cpufreq_gov_ondemand = {
621 .name = "ondemand",
622 .governor = cpufreq_governor_dbs,
623 .max_transition_latency = TRANSITION_LATENCY_LIMIT,
624 .owner = THIS_MODULE,
625};
626
627static int __init cpufreq_gov_dbs_init(void) 714static int __init cpufreq_gov_dbs_init(void)
628{ 715{
629 int err; 716 int err;
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 96dda81c9228..6b4c484a699a 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -155,6 +155,13 @@ config GPIO_TWL4030
155 Say yes here to access the GPIO signals of various multi-function 155 Say yes here to access the GPIO signals of various multi-function
156 power management chips from Texas Instruments. 156 power management chips from Texas Instruments.
157 157
158config GPIO_WM831X
159 tristate "WM831x GPIOs"
160 depends on MFD_WM831X
161 help
162 Say yes here to access the GPIO signals of WM831x power management
163 chips from Wolfson Microelectronics.
164
158comment "PCI GPIO expanders:" 165comment "PCI GPIO expanders:"
159 166
160config GPIO_BT8XX 167config GPIO_BT8XX
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 9244c6fcd8be..ea7c745f26a8 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o
14obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o 14obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o
15obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o 15obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o
16obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o 16obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o
17obj-$(CONFIG_GPIO_WM831X) += wm831x-gpio.o
diff --git a/drivers/gpio/wm831x-gpio.c b/drivers/gpio/wm831x-gpio.c
new file mode 100644
index 000000000000..f9c09a54ec7f
--- /dev/null
+++ b/drivers/gpio/wm831x-gpio.c
@@ -0,0 +1,252 @@
1/*
2 * wm831x-gpio.c -- gpiolib support for Wolfson WM831x PMICs
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/gpio.h>
18#include <linux/mfd/core.h>
19#include <linux/platform_device.h>
20#include <linux/seq_file.h>
21
22#include <linux/mfd/wm831x/core.h>
23#include <linux/mfd/wm831x/pdata.h>
24#include <linux/mfd/wm831x/gpio.h>
25
26#define WM831X_GPIO_MAX 16
27
28struct wm831x_gpio {
29 struct wm831x *wm831x;
30 struct gpio_chip gpio_chip;
31};
32
33static inline struct wm831x_gpio *to_wm831x_gpio(struct gpio_chip *chip)
34{
35 return container_of(chip, struct wm831x_gpio, gpio_chip);
36}
37
38static int wm831x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
39{
40 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
41 struct wm831x *wm831x = wm831x_gpio->wm831x;
42
43 return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
44 WM831X_GPN_DIR | WM831X_GPN_TRI,
45 WM831X_GPN_DIR);
46}
47
48static int wm831x_gpio_get(struct gpio_chip *chip, unsigned offset)
49{
50 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
51 struct wm831x *wm831x = wm831x_gpio->wm831x;
52 int ret;
53
54 ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL);
55 if (ret < 0)
56 return ret;
57
58 if (ret & 1 << offset)
59 return 1;
60 else
61 return 0;
62}
63
64static int wm831x_gpio_direction_out(struct gpio_chip *chip,
65 unsigned offset, int value)
66{
67 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
68 struct wm831x *wm831x = wm831x_gpio->wm831x;
69
70 return wm831x_set_bits(wm831x, WM831X_GPIO1_CONTROL + offset,
71 WM831X_GPN_DIR | WM831X_GPN_TRI, 0);
72}
73
74static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
75{
76 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
77 struct wm831x *wm831x = wm831x_gpio->wm831x;
78
79 wm831x_set_bits(wm831x, WM831X_GPIO_LEVEL, 1 << offset,
80 value << offset);
81}
82
83#ifdef CONFIG_DEBUG_FS
84static void wm831x_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
85{
86 struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
87 struct wm831x *wm831x = wm831x_gpio->wm831x;
88 int i;
89
90 for (i = 0; i < chip->ngpio; i++) {
91 int gpio = i + chip->base;
92 int reg;
93 const char *label, *pull, *powerdomain;
94
95 /* We report the GPIO even if it's not requested since
96 * we're also reporting things like alternate
97 * functions which apply even when the GPIO is not in
98 * use as a GPIO.
99 */
100 label = gpiochip_is_requested(chip, i);
101 if (!label)
102 label = "Unrequested";
103
104 seq_printf(s, " gpio-%-3d (%-20.20s) ", gpio, label);
105
106 reg = wm831x_reg_read(wm831x, WM831X_GPIO1_CONTROL + i);
107 if (reg < 0) {
108 dev_err(wm831x->dev,
109 "GPIO control %d read failed: %d\n",
110 gpio, reg);
111 seq_printf(s, "\n");
112 continue;
113 }
114
115 switch (reg & WM831X_GPN_PULL_MASK) {
116 case WM831X_GPIO_PULL_NONE:
117 pull = "nopull";
118 break;
119 case WM831X_GPIO_PULL_DOWN:
120 pull = "pulldown";
121 break;
122 case WM831X_GPIO_PULL_UP:
123 pull = "pullup";
124 default:
125 pull = "INVALID PULL";
126 break;
127 }
128
129 switch (i + 1) {
130 case 1 ... 3:
131 case 7 ... 9:
132 if (reg & WM831X_GPN_PWR_DOM)
133 powerdomain = "VPMIC";
134 else
135 powerdomain = "DBVDD";
136 break;
137
138 case 4 ... 6:
139 case 10 ... 12:
140 if (reg & WM831X_GPN_PWR_DOM)
141 powerdomain = "SYSVDD";
142 else
143 powerdomain = "DBVDD";
144 break;
145
146 case 13 ... 16:
147 powerdomain = "TPVDD";
148 break;
149
150 default:
151 BUG();
152 break;
153 }
154
155 seq_printf(s, " %s %s %s %s%s\n"
156 " %s%s (0x%4x)\n",
157 reg & WM831X_GPN_DIR ? "in" : "out",
158 wm831x_gpio_get(chip, i) ? "high" : "low",
159 pull,
160 powerdomain,
161 reg & WM831X_GPN_POL ? " inverted" : "",
162 reg & WM831X_GPN_OD ? "open-drain" : "CMOS",
163 reg & WM831X_GPN_TRI ? " tristated" : "",
164 reg);
165 }
166}
167#else
168#define wm831x_gpio_dbg_show NULL
169#endif
170
171static struct gpio_chip template_chip = {
172 .label = "wm831x",
173 .owner = THIS_MODULE,
174 .direction_input = wm831x_gpio_direction_in,
175 .get = wm831x_gpio_get,
176 .direction_output = wm831x_gpio_direction_out,
177 .set = wm831x_gpio_set,
178 .dbg_show = wm831x_gpio_dbg_show,
179 .can_sleep = 1,
180};
181
182static int __devinit wm831x_gpio_probe(struct platform_device *pdev)
183{
184 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
185 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
186 struct wm831x_gpio *wm831x_gpio;
187 int ret;
188
189 wm831x_gpio = kzalloc(sizeof(*wm831x_gpio), GFP_KERNEL);
190 if (wm831x_gpio == NULL)
191 return -ENOMEM;
192
193 wm831x_gpio->wm831x = wm831x;
194 wm831x_gpio->gpio_chip = template_chip;
195 wm831x_gpio->gpio_chip.ngpio = WM831X_GPIO_MAX;
196 wm831x_gpio->gpio_chip.dev = &pdev->dev;
197 if (pdata && pdata->gpio_base)
198 wm831x_gpio->gpio_chip.base = pdata->gpio_base;
199 else
200 wm831x_gpio->gpio_chip.base = -1;
201
202 ret = gpiochip_add(&wm831x_gpio->gpio_chip);
203 if (ret < 0) {
204 dev_err(&pdev->dev, "Could not register gpiochip, %d\n",
205 ret);
206 goto err;
207 }
208
209 platform_set_drvdata(pdev, wm831x_gpio);
210
211 return ret;
212
213err:
214 kfree(wm831x_gpio);
215 return ret;
216}
217
218static int __devexit wm831x_gpio_remove(struct platform_device *pdev)
219{
220 struct wm831x_gpio *wm831x_gpio = platform_get_drvdata(pdev);
221 int ret;
222
223 ret = gpiochip_remove(&wm831x_gpio->gpio_chip);
224 if (ret == 0)
225 kfree(wm831x_gpio);
226
227 return ret;
228}
229
230static struct platform_driver wm831x_gpio_driver = {
231 .driver.name = "wm831x-gpio",
232 .driver.owner = THIS_MODULE,
233 .probe = wm831x_gpio_probe,
234 .remove = __devexit_p(wm831x_gpio_remove),
235};
236
237static int __init wm831x_gpio_init(void)
238{
239 return platform_driver_register(&wm831x_gpio_driver);
240}
241subsys_initcall(wm831x_gpio_init);
242
243static void __exit wm831x_gpio_exit(void)
244{
245 platform_driver_unregister(&wm831x_gpio_driver);
246}
247module_exit(wm831x_gpio_exit);
248
249MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
250MODULE_DESCRIPTION("GPIO interface for WM831x PMICs");
251MODULE_LICENSE("GPL");
252MODULE_ALIAS("platform:wm831x-gpio");
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 461abb1e273a..ed7711d11ae8 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -946,6 +946,27 @@ config SENSORS_W83627EHF
946 This driver can also be built as a module. If so, the module 946 This driver can also be built as a module. If so, the module
947 will be called w83627ehf. 947 will be called w83627ehf.
948 948
949config SENSORS_WM831X
950 tristate "WM831x PMICs"
951 depends on MFD_WM831X
952 help
953 If you say yes here you get support for the hardware
954 monitoring functionality of the Wolfson Microelectronics
955 WM831x series of PMICs.
956
957 This driver can also be built as a module. If so, the module
958 will be called wm831x-hwmon.
959
960config SENSORS_WM8350
961 tristate "Wolfson Microelectronics WM835x"
962 depends on MFD_WM8350
963 help
964 If you say yes here you get support for the hardware
965 monitoring features of the WM835x series of PMICs.
966
967 This driver can also be built as a module. If so, the module
968 will be called wm8350-hwmon.
969
949config SENSORS_ULTRA45 970config SENSORS_ULTRA45
950 tristate "Sun Ultra45 PIC16F747" 971 tristate "Sun Ultra45 PIC16F747"
951 depends on SPARC64 972 depends on SPARC64
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 2e547881bc0a..bcf73a9bb619 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -93,6 +93,8 @@ obj-$(CONFIG_SENSORS_VT8231) += vt8231.o
93obj-$(CONFIG_SENSORS_W83627EHF) += w83627ehf.o 93obj-$(CONFIG_SENSORS_W83627EHF) += w83627ehf.o
94obj-$(CONFIG_SENSORS_W83L785TS) += w83l785ts.o 94obj-$(CONFIG_SENSORS_W83L785TS) += w83l785ts.o
95obj-$(CONFIG_SENSORS_W83L786NG) += w83l786ng.o 95obj-$(CONFIG_SENSORS_W83L786NG) += w83l786ng.o
96obj-$(CONFIG_SENSORS_WM831X) += wm831x-hwmon.o
97obj-$(CONFIG_SENSORS_WM8350) += wm8350-hwmon.o
96 98
97ifeq ($(CONFIG_HWMON_DEBUG_CHIP),y) 99ifeq ($(CONFIG_HWMON_DEBUG_CHIP),y)
98EXTRA_CFLAGS += -DDEBUG 100EXTRA_CFLAGS += -DDEBUG
diff --git a/drivers/hwmon/wm831x-hwmon.c b/drivers/hwmon/wm831x-hwmon.c
new file mode 100644
index 000000000000..c16e9e74c356
--- /dev/null
+++ b/drivers/hwmon/wm831x-hwmon.c
@@ -0,0 +1,226 @@
1/*
2 * drivers/hwmon/wm831x-hwmon.c - Wolfson Microelectronics WM831x PMIC
3 * hardware monitoring features.
4 *
5 * Copyright (C) 2009 Wolfson Microelectronics plc
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License v2 as published by the
9 * Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
19 */
20
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/platform_device.h>
24#include <linux/err.h>
25#include <linux/hwmon.h>
26#include <linux/hwmon-sysfs.h>
27
28#include <linux/mfd/wm831x/core.h>
29#include <linux/mfd/wm831x/auxadc.h>
30
31struct wm831x_hwmon {
32 struct wm831x *wm831x;
33 struct device *classdev;
34};
35
36static ssize_t show_name(struct device *dev,
37 struct device_attribute *attr, char *buf)
38{
39 return sprintf(buf, "wm831x\n");
40}
41
42static const char *input_names[] = {
43 [WM831X_AUX_SYSVDD] = "SYSVDD",
44 [WM831X_AUX_USB] = "USB",
45 [WM831X_AUX_BKUP_BATT] = "Backup battery",
46 [WM831X_AUX_BATT] = "Battery",
47 [WM831X_AUX_WALL] = "WALL",
48 [WM831X_AUX_CHIP_TEMP] = "PMIC",
49 [WM831X_AUX_BATT_TEMP] = "Battery",
50};
51
52
53static ssize_t show_voltage(struct device *dev,
54 struct device_attribute *attr, char *buf)
55{
56 struct wm831x_hwmon *hwmon = dev_get_drvdata(dev);
57 int channel = to_sensor_dev_attr(attr)->index;
58 int ret;
59
60 ret = wm831x_auxadc_read_uv(hwmon->wm831x, channel);
61 if (ret < 0)
62 return ret;
63
64 return sprintf(buf, "%d\n", DIV_ROUND_CLOSEST(ret, 1000));
65}
66
67static ssize_t show_chip_temp(struct device *dev,
68 struct device_attribute *attr, char *buf)
69{
70 struct wm831x_hwmon *hwmon = dev_get_drvdata(dev);
71 int channel = to_sensor_dev_attr(attr)->index;
72 int ret;
73
74 ret = wm831x_auxadc_read(hwmon->wm831x, channel);
75 if (ret < 0)
76 return ret;
77
78 /* Degrees celsius = (512.18-ret) / 1.0983 */
79 ret = 512180 - (ret * 1000);
80 ret = DIV_ROUND_CLOSEST(ret * 10000, 10983);
81
82 return sprintf(buf, "%d\n", ret);
83}
84
85static ssize_t show_label(struct device *dev,
86 struct device_attribute *attr, char *buf)
87{
88 int channel = to_sensor_dev_attr(attr)->index;
89
90 return sprintf(buf, "%s\n", input_names[channel]);
91}
92
93#define WM831X_VOLTAGE(id, name) \
94 static SENSOR_DEVICE_ATTR(in##id##_input, S_IRUGO, show_voltage, \
95 NULL, name)
96
97#define WM831X_NAMED_VOLTAGE(id, name) \
98 WM831X_VOLTAGE(id, name); \
99 static SENSOR_DEVICE_ATTR(in##id##_label, S_IRUGO, show_label, \
100 NULL, name)
101
102static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
103
104WM831X_VOLTAGE(0, WM831X_AUX_AUX1);
105WM831X_VOLTAGE(1, WM831X_AUX_AUX2);
106WM831X_VOLTAGE(2, WM831X_AUX_AUX3);
107WM831X_VOLTAGE(3, WM831X_AUX_AUX4);
108
109WM831X_NAMED_VOLTAGE(4, WM831X_AUX_SYSVDD);
110WM831X_NAMED_VOLTAGE(5, WM831X_AUX_USB);
111WM831X_NAMED_VOLTAGE(6, WM831X_AUX_BATT);
112WM831X_NAMED_VOLTAGE(7, WM831X_AUX_WALL);
113WM831X_NAMED_VOLTAGE(8, WM831X_AUX_BKUP_BATT);
114
115static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_chip_temp, NULL,
116 WM831X_AUX_CHIP_TEMP);
117static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_label, NULL,
118 WM831X_AUX_CHIP_TEMP);
119/* Report as a voltage since conversion depends on external components
120 * and that's what the ABI wants. */
121static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_voltage, NULL,
122 WM831X_AUX_BATT_TEMP);
123static SENSOR_DEVICE_ATTR(temp2_label, S_IRUGO, show_label, NULL,
124 WM831X_AUX_BATT_TEMP);
125
126static struct attribute *wm831x_attributes[] = {
127 &dev_attr_name.attr,
128
129 &sensor_dev_attr_in0_input.dev_attr.attr,
130 &sensor_dev_attr_in1_input.dev_attr.attr,
131 &sensor_dev_attr_in2_input.dev_attr.attr,
132 &sensor_dev_attr_in3_input.dev_attr.attr,
133
134 &sensor_dev_attr_in4_input.dev_attr.attr,
135 &sensor_dev_attr_in4_label.dev_attr.attr,
136 &sensor_dev_attr_in5_input.dev_attr.attr,
137 &sensor_dev_attr_in5_label.dev_attr.attr,
138 &sensor_dev_attr_in6_input.dev_attr.attr,
139 &sensor_dev_attr_in6_label.dev_attr.attr,
140 &sensor_dev_attr_in7_input.dev_attr.attr,
141 &sensor_dev_attr_in7_label.dev_attr.attr,
142 &sensor_dev_attr_in8_input.dev_attr.attr,
143 &sensor_dev_attr_in8_label.dev_attr.attr,
144
145 &sensor_dev_attr_temp1_input.dev_attr.attr,
146 &sensor_dev_attr_temp1_label.dev_attr.attr,
147 &sensor_dev_attr_temp2_input.dev_attr.attr,
148 &sensor_dev_attr_temp2_label.dev_attr.attr,
149
150 NULL
151};
152
153static const struct attribute_group wm831x_attr_group = {
154 .attrs = wm831x_attributes,
155};
156
157static int __devinit wm831x_hwmon_probe(struct platform_device *pdev)
158{
159 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
160 struct wm831x_hwmon *hwmon;
161 int ret;
162
163 hwmon = kzalloc(sizeof(struct wm831x_hwmon), GFP_KERNEL);
164 if (!hwmon)
165 return -ENOMEM;
166
167 hwmon->wm831x = wm831x;
168
169 ret = sysfs_create_group(&pdev->dev.kobj, &wm831x_attr_group);
170 if (ret)
171 goto err;
172
173 hwmon->classdev = hwmon_device_register(&pdev->dev);
174 if (IS_ERR(hwmon->classdev)) {
175 ret = PTR_ERR(hwmon->classdev);
176 goto err_sysfs;
177 }
178
179 platform_set_drvdata(pdev, hwmon);
180
181 return 0;
182
183err_sysfs:
184 sysfs_remove_group(&pdev->dev.kobj, &wm831x_attr_group);
185err:
186 kfree(hwmon);
187 return ret;
188}
189
190static int __devexit wm831x_hwmon_remove(struct platform_device *pdev)
191{
192 struct wm831x_hwmon *hwmon = platform_get_drvdata(pdev);
193
194 hwmon_device_unregister(hwmon->classdev);
195 sysfs_remove_group(&pdev->dev.kobj, &wm831x_attr_group);
196 platform_set_drvdata(pdev, NULL);
197 kfree(hwmon);
198
199 return 0;
200}
201
202static struct platform_driver wm831x_hwmon_driver = {
203 .probe = wm831x_hwmon_probe,
204 .remove = __devexit_p(wm831x_hwmon_remove),
205 .driver = {
206 .name = "wm831x-hwmon",
207 .owner = THIS_MODULE,
208 },
209};
210
211static int __init wm831x_hwmon_init(void)
212{
213 return platform_driver_register(&wm831x_hwmon_driver);
214}
215module_init(wm831x_hwmon_init);
216
217static void __exit wm831x_hwmon_exit(void)
218{
219 platform_driver_unregister(&wm831x_hwmon_driver);
220}
221module_exit(wm831x_hwmon_exit);
222
223MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
224MODULE_DESCRIPTION("WM831x Hardware Monitoring");
225MODULE_LICENSE("GPL");
226MODULE_ALIAS("platform:wm831x-hwmon");
diff --git a/drivers/hwmon/wm8350-hwmon.c b/drivers/hwmon/wm8350-hwmon.c
new file mode 100644
index 000000000000..13290595ca86
--- /dev/null
+++ b/drivers/hwmon/wm8350-hwmon.c
@@ -0,0 +1,151 @@
1/*
2 * drivers/hwmon/wm8350-hwmon.c - Wolfson Microelectronics WM8350 PMIC
3 * hardware monitoring features.
4 *
5 * Copyright (C) 2009 Wolfson Microelectronics plc
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License v2 as published by the
9 * Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
19 */
20
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/err.h>
24#include <linux/platform_device.h>
25#include <linux/hwmon.h>
26#include <linux/hwmon-sysfs.h>
27
28#include <linux/mfd/wm8350/core.h>
29#include <linux/mfd/wm8350/comparator.h>
30
31static ssize_t show_name(struct device *dev,
32 struct device_attribute *attr, char *buf)
33{
34 return sprintf(buf, "wm8350\n");
35}
36
37static const char *input_names[] = {
38 [WM8350_AUXADC_USB] = "USB",
39 [WM8350_AUXADC_LINE] = "Line",
40 [WM8350_AUXADC_BATT] = "Battery",
41};
42
43
44static ssize_t show_voltage(struct device *dev,
45 struct device_attribute *attr, char *buf)
46{
47 struct wm8350 *wm8350 = dev_get_drvdata(dev);
48 int channel = to_sensor_dev_attr(attr)->index;
49 int val;
50
51 val = wm8350_read_auxadc(wm8350, channel, 0, 0) * WM8350_AUX_COEFF;
52 val = DIV_ROUND_CLOSEST(val, 1000);
53
54 return sprintf(buf, "%d\n", val);
55}
56
57static ssize_t show_label(struct device *dev,
58 struct device_attribute *attr, char *buf)
59{
60 int channel = to_sensor_dev_attr(attr)->index;
61
62 return sprintf(buf, "%s\n", input_names[channel]);
63}
64
65#define WM8350_NAMED_VOLTAGE(id, name) \
66 static SENSOR_DEVICE_ATTR(in##id##_input, S_IRUGO, show_voltage,\
67 NULL, name); \
68 static SENSOR_DEVICE_ATTR(in##id##_label, S_IRUGO, show_label, \
69 NULL, name)
70
71static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
72
73WM8350_NAMED_VOLTAGE(0, WM8350_AUXADC_USB);
74WM8350_NAMED_VOLTAGE(1, WM8350_AUXADC_BATT);
75WM8350_NAMED_VOLTAGE(2, WM8350_AUXADC_LINE);
76
77static struct attribute *wm8350_attributes[] = {
78 &dev_attr_name.attr,
79
80 &sensor_dev_attr_in0_input.dev_attr.attr,
81 &sensor_dev_attr_in0_label.dev_attr.attr,
82 &sensor_dev_attr_in1_input.dev_attr.attr,
83 &sensor_dev_attr_in1_label.dev_attr.attr,
84 &sensor_dev_attr_in2_input.dev_attr.attr,
85 &sensor_dev_attr_in2_label.dev_attr.attr,
86
87 NULL,
88};
89
90static const struct attribute_group wm8350_attr_group = {
91 .attrs = wm8350_attributes,
92};
93
94static int __devinit wm8350_hwmon_probe(struct platform_device *pdev)
95{
96 struct wm8350 *wm8350 = platform_get_drvdata(pdev);
97 int ret;
98
99 ret = sysfs_create_group(&pdev->dev.kobj, &wm8350_attr_group);
100 if (ret)
101 goto err;
102
103 wm8350->hwmon.classdev = hwmon_device_register(&pdev->dev);
104 if (IS_ERR(wm8350->hwmon.classdev)) {
105 ret = PTR_ERR(wm8350->hwmon.classdev);
106 goto err_group;
107 }
108
109 return 0;
110
111err_group:
112 sysfs_remove_group(&pdev->dev.kobj, &wm8350_attr_group);
113err:
114 return ret;
115}
116
117static int __devexit wm8350_hwmon_remove(struct platform_device *pdev)
118{
119 struct wm8350 *wm8350 = platform_get_drvdata(pdev);
120
121 hwmon_device_unregister(wm8350->hwmon.classdev);
122 sysfs_remove_group(&pdev->dev.kobj, &wm8350_attr_group);
123
124 return 0;
125}
126
127static struct platform_driver wm8350_hwmon_driver = {
128 .probe = wm8350_hwmon_probe,
129 .remove = __devexit_p(wm8350_hwmon_remove),
130 .driver = {
131 .name = "wm8350-hwmon",
132 .owner = THIS_MODULE,
133 },
134};
135
136static int __init wm8350_hwmon_init(void)
137{
138 return platform_driver_register(&wm8350_hwmon_driver);
139}
140module_init(wm8350_hwmon_init);
141
142static void __exit wm8350_hwmon_exit(void)
143{
144 platform_driver_unregister(&wm8350_hwmon_driver);
145}
146module_exit(wm8350_hwmon_exit);
147
148MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
149MODULE_DESCRIPTION("WM8350 Hardware Monitoring");
150MODULE_LICENSE("GPL");
151MODULE_ALIAS("platform:wm8350-hwmon");
diff --git a/drivers/i2c/busses/i2c-sh_mobile.c b/drivers/i2c/busses/i2c-sh_mobile.c
index 820487d0d5c7..86a9d4e81472 100644
--- a/drivers/i2c/busses/i2c-sh_mobile.c
+++ b/drivers/i2c/busses/i2c-sh_mobile.c
@@ -28,6 +28,7 @@
28#include <linux/interrupt.h> 28#include <linux/interrupt.h>
29#include <linux/i2c.h> 29#include <linux/i2c.h>
30#include <linux/err.h> 30#include <linux/err.h>
31#include <linux/pm_runtime.h>
31#include <linux/clk.h> 32#include <linux/clk.h>
32#include <linux/io.h> 33#include <linux/io.h>
33 34
@@ -165,7 +166,8 @@ static void activate_ch(struct sh_mobile_i2c_data *pd)
165 u_int32_t denom; 166 u_int32_t denom;
166 u_int32_t tmp; 167 u_int32_t tmp;
167 168
168 /* Make sure the clock is enabled */ 169 /* Wake up device and enable clock */
170 pm_runtime_get_sync(pd->dev);
169 clk_enable(pd->clk); 171 clk_enable(pd->clk);
170 172
171 /* Get clock rate after clock is enabled */ 173 /* Get clock rate after clock is enabled */
@@ -213,8 +215,9 @@ static void deactivate_ch(struct sh_mobile_i2c_data *pd)
213 /* Disable channel */ 215 /* Disable channel */
214 iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd)); 216 iowrite8(ioread8(ICCR(pd)) & ~ICCR_ICE, ICCR(pd));
215 217
216 /* Disable clock */ 218 /* Disable clock and mark device as idle */
217 clk_disable(pd->clk); 219 clk_disable(pd->clk);
220 pm_runtime_put_sync(pd->dev);
218} 221}
219 222
220static unsigned char i2c_op(struct sh_mobile_i2c_data *pd, 223static unsigned char i2c_op(struct sh_mobile_i2c_data *pd,
@@ -572,6 +575,19 @@ static int sh_mobile_i2c_probe(struct platform_device *dev)
572 goto err_irq; 575 goto err_irq;
573 } 576 }
574 577
578 /* Enable Runtime PM for this device.
579 *
580 * Also tell the Runtime PM core to ignore children
581 * for this device since it is valid for us to suspend
582 * this I2C master driver even though the slave devices
583 * on the I2C bus may not be suspended.
584 *
585 * The state of the I2C hardware bus is unaffected by
586 * the Runtime PM state.
587 */
588 pm_suspend_ignore_children(&dev->dev, true);
589 pm_runtime_enable(&dev->dev);
590
575 /* setup the private data */ 591 /* setup the private data */
576 adap = &pd->adap; 592 adap = &pd->adap;
577 i2c_set_adapdata(adap, pd); 593 i2c_set_adapdata(adap, pd);
@@ -614,14 +630,33 @@ static int sh_mobile_i2c_remove(struct platform_device *dev)
614 iounmap(pd->reg); 630 iounmap(pd->reg);
615 sh_mobile_i2c_hook_irqs(dev, 0); 631 sh_mobile_i2c_hook_irqs(dev, 0);
616 clk_put(pd->clk); 632 clk_put(pd->clk);
633 pm_runtime_disable(&dev->dev);
617 kfree(pd); 634 kfree(pd);
618 return 0; 635 return 0;
619} 636}
620 637
638static int sh_mobile_i2c_runtime_nop(struct device *dev)
639{
640 /* Runtime PM callback shared between ->runtime_suspend()
641 * and ->runtime_resume(). Simply returns success.
642 *
643 * This driver re-initializes all registers after
644 * pm_runtime_get_sync() anyway so there is no need
645 * to save and restore registers here.
646 */
647 return 0;
648}
649
650static struct dev_pm_ops sh_mobile_i2c_dev_pm_ops = {
651 .runtime_suspend = sh_mobile_i2c_runtime_nop,
652 .runtime_resume = sh_mobile_i2c_runtime_nop,
653};
654
621static struct platform_driver sh_mobile_i2c_driver = { 655static struct platform_driver sh_mobile_i2c_driver = {
622 .driver = { 656 .driver = {
623 .name = "i2c-sh_mobile", 657 .name = "i2c-sh_mobile",
624 .owner = THIS_MODULE, 658 .owner = THIS_MODULE,
659 .pm = &sh_mobile_i2c_dev_pm_ops,
625 }, 660 },
626 .probe = sh_mobile_i2c_probe, 661 .probe = sh_mobile_i2c_probe,
627 .remove = sh_mobile_i2c_remove, 662 .remove = sh_mobile_i2c_remove,
diff --git a/drivers/input/keyboard/omap-keypad.c b/drivers/input/keyboard/omap-keypad.c
index 87ec7b18ac69..bba85add35a3 100644
--- a/drivers/input/keyboard/omap-keypad.c
+++ b/drivers/input/keyboard/omap-keypad.c
@@ -116,7 +116,7 @@ static irqreturn_t omap_kp_interrupt(int irq, void *dev_id)
116 } 116 }
117 } else 117 } else
118 /* disable keyboard interrupt and schedule for handling */ 118 /* disable keyboard interrupt and schedule for handling */
119 omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); 119 omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
120 120
121 tasklet_schedule(&kp_tasklet); 121 tasklet_schedule(&kp_tasklet);
122 122
@@ -143,20 +143,20 @@ static void omap_kp_scan_keypad(struct omap_kp *omap_kp, unsigned char *state)
143 143
144 } else { 144 } else {
145 /* disable keyboard interrupt and schedule for handling */ 145 /* disable keyboard interrupt and schedule for handling */
146 omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); 146 omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
147 147
148 /* read the keypad status */ 148 /* read the keypad status */
149 omap_writew(0xff, OMAP_MPUIO_BASE + OMAP_MPUIO_KBC); 149 omap_writew(0xff, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBC);
150 for (col = 0; col < omap_kp->cols; col++) { 150 for (col = 0; col < omap_kp->cols; col++) {
151 omap_writew(~(1 << col) & 0xff, 151 omap_writew(~(1 << col) & 0xff,
152 OMAP_MPUIO_BASE + OMAP_MPUIO_KBC); 152 OMAP1_MPUIO_BASE + OMAP_MPUIO_KBC);
153 153
154 udelay(omap_kp->delay); 154 udelay(omap_kp->delay);
155 155
156 state[col] = ~omap_readw(OMAP_MPUIO_BASE + 156 state[col] = ~omap_readw(OMAP1_MPUIO_BASE +
157 OMAP_MPUIO_KBR_LATCH) & 0xff; 157 OMAP_MPUIO_KBR_LATCH) & 0xff;
158 } 158 }
159 omap_writew(0x00, OMAP_MPUIO_BASE + OMAP_MPUIO_KBC); 159 omap_writew(0x00, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBC);
160 udelay(2); 160 udelay(2);
161 } 161 }
162} 162}
@@ -234,7 +234,7 @@ static void omap_kp_tasklet(unsigned long data)
234 for (i = 0; i < omap_kp_data->rows; i++) 234 for (i = 0; i < omap_kp_data->rows; i++)
235 enable_irq(gpio_to_irq(row_gpios[i])); 235 enable_irq(gpio_to_irq(row_gpios[i]));
236 } else { 236 } else {
237 omap_writew(0, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); 237 omap_writew(0, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
238 kp_cur_group = -1; 238 kp_cur_group = -1;
239 } 239 }
240 } 240 }
@@ -317,7 +317,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
317 317
318 /* Disable the interrupt for the MPUIO keyboard */ 318 /* Disable the interrupt for the MPUIO keyboard */
319 if (!cpu_is_omap24xx()) 319 if (!cpu_is_omap24xx())
320 omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); 320 omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
321 321
322 keymap = pdata->keymap; 322 keymap = pdata->keymap;
323 323
@@ -391,7 +391,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
391 } 391 }
392 392
393 if (pdata->dbounce) 393 if (pdata->dbounce)
394 omap_writew(0xff, OMAP_MPUIO_BASE + OMAP_MPUIO_GPIO_DEBOUNCING); 394 omap_writew(0xff, OMAP1_MPUIO_BASE + OMAP_MPUIO_GPIO_DEBOUNCING);
395 395
396 /* scan current status and enable interrupt */ 396 /* scan current status and enable interrupt */
397 omap_kp_scan_keypad(omap_kp, keypad_state); 397 omap_kp_scan_keypad(omap_kp, keypad_state);
@@ -402,7 +402,7 @@ static int __devinit omap_kp_probe(struct platform_device *pdev)
402 "omap-keypad", omap_kp) < 0) 402 "omap-keypad", omap_kp) < 0)
403 goto err4; 403 goto err4;
404 } 404 }
405 omap_writew(0, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); 405 omap_writew(0, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
406 } else { 406 } else {
407 for (irq_idx = 0; irq_idx < omap_kp->rows; irq_idx++) { 407 for (irq_idx = 0; irq_idx < omap_kp->rows; irq_idx++) {
408 if (request_irq(gpio_to_irq(row_gpios[irq_idx]), 408 if (request_irq(gpio_to_irq(row_gpios[irq_idx]),
@@ -449,7 +449,7 @@ static int __devexit omap_kp_remove(struct platform_device *pdev)
449 free_irq(gpio_to_irq(row_gpios[i]), 0); 449 free_irq(gpio_to_irq(row_gpios[i]), 0);
450 } 450 }
451 } else { 451 } else {
452 omap_writew(1, OMAP_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT); 452 omap_writew(1, OMAP1_MPUIO_BASE + OMAP_MPUIO_KBD_MASKIT);
453 free_irq(omap_kp->irq, 0); 453 free_irq(omap_kp->irq, 0);
454 } 454 }
455 455
diff --git a/drivers/input/keyboard/sh_keysc.c b/drivers/input/keyboard/sh_keysc.c
index 0714bf2c28fc..887af79b7bff 100644
--- a/drivers/input/keyboard/sh_keysc.c
+++ b/drivers/input/keyboard/sh_keysc.c
@@ -80,6 +80,9 @@ static irqreturn_t sh_keysc_isr(int irq, void *dev_id)
80 iowrite16(KYCR2_IRQ_LEVEL | (keyin_set << 8), 80 iowrite16(KYCR2_IRQ_LEVEL | (keyin_set << 8),
81 priv->iomem_base + KYCR2_OFFS); 81 priv->iomem_base + KYCR2_OFFS);
82 82
83 if (pdata->kycr2_delay)
84 udelay(pdata->kycr2_delay);
85
83 keys ^= ~0; 86 keys ^= ~0;
84 keys &= (1 << (sh_keysc_mode[pdata->mode].keyin * 87 keys &= (1 << (sh_keysc_mode[pdata->mode].keyin *
85 sh_keysc_mode[pdata->mode].keyout)) - 1; 88 sh_keysc_mode[pdata->mode].keyout)) - 1;
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index cbe21bc96b52..1a50be379cbc 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@ -279,4 +279,24 @@ config INPUT_BFIN_ROTARY
279 To compile this driver as a module, choose M here: the 279 To compile this driver as a module, choose M here: the
280 module will be called bfin-rotary. 280 module will be called bfin-rotary.
281 281
282config INPUT_WM831X_ON
283 tristate "WM831X ON pin"
284 depends on MFD_WM831X
285 help
286 Support the ON pin of WM831X PMICs as an input device
287 reporting power button status.
288
289 To compile this driver as a module, choose M here: the module
290 will be called wm831x_on.
291
292config INPUT_PCAP
293 tristate "Motorola EZX PCAP misc input events"
294 depends on EZX_PCAP
295 help
296 Say Y here if you want to use Power key and Headphone button
297 on Motorola EZX phones.
298
299 To compile this driver as a module, choose M here: the
300 module will be called pcap_keys.
301
282endif 302endif
diff --git a/drivers/input/misc/Makefile b/drivers/input/misc/Makefile
index 79c1e9a5ea31..bf4db626c313 100644
--- a/drivers/input/misc/Makefile
+++ b/drivers/input/misc/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_HP_SDC_RTC) += hp_sdc_rtc.o
16obj-$(CONFIG_INPUT_IXP4XX_BEEPER) += ixp4xx-beeper.o 16obj-$(CONFIG_INPUT_IXP4XX_BEEPER) += ixp4xx-beeper.o
17obj-$(CONFIG_INPUT_KEYSPAN_REMOTE) += keyspan_remote.o 17obj-$(CONFIG_INPUT_KEYSPAN_REMOTE) += keyspan_remote.o
18obj-$(CONFIG_INPUT_M68K_BEEP) += m68kspkr.o 18obj-$(CONFIG_INPUT_M68K_BEEP) += m68kspkr.o
19obj-$(CONFIG_INPUT_PCAP) += pcap_keys.o
19obj-$(CONFIG_INPUT_PCF50633_PMU) += pcf50633-input.o 20obj-$(CONFIG_INPUT_PCF50633_PMU) += pcf50633-input.o
20obj-$(CONFIG_INPUT_PCSPKR) += pcspkr.o 21obj-$(CONFIG_INPUT_PCSPKR) += pcspkr.o
21obj-$(CONFIG_INPUT_POWERMATE) += powermate.o 22obj-$(CONFIG_INPUT_POWERMATE) += powermate.o
@@ -26,4 +27,6 @@ obj-$(CONFIG_INPUT_SPARCSPKR) += sparcspkr.o
26obj-$(CONFIG_INPUT_TWL4030_PWRBUTTON) += twl4030-pwrbutton.o 27obj-$(CONFIG_INPUT_TWL4030_PWRBUTTON) += twl4030-pwrbutton.o
27obj-$(CONFIG_INPUT_UINPUT) += uinput.o 28obj-$(CONFIG_INPUT_UINPUT) += uinput.o
28obj-$(CONFIG_INPUT_WISTRON_BTNS) += wistron_btns.o 29obj-$(CONFIG_INPUT_WISTRON_BTNS) += wistron_btns.o
30obj-$(CONFIG_INPUT_WM831X_ON) += wm831x-on.o
29obj-$(CONFIG_INPUT_YEALINK) += yealink.o 31obj-$(CONFIG_INPUT_YEALINK) += yealink.o
32
diff --git a/drivers/input/misc/pcap_keys.c b/drivers/input/misc/pcap_keys.c
new file mode 100644
index 000000000000..7ea969347ca9
--- /dev/null
+++ b/drivers/input/misc/pcap_keys.c
@@ -0,0 +1,144 @@
1/*
2 * Input driver for PCAP events:
3 * * Power key
4 * * Headphone button
5 *
6 * Copyright (c) 2008,2009 Ilya Petrov <ilya.muromec@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/interrupt.h>
17#include <linux/platform_device.h>
18#include <linux/input.h>
19#include <linux/mfd/ezx-pcap.h>
20
21struct pcap_keys {
22 struct pcap_chip *pcap;
23 struct input_dev *input;
24};
25
26/* PCAP2 interrupts us on keypress */
27static irqreturn_t pcap_keys_handler(int irq, void *_pcap_keys)
28{
29 struct pcap_keys *pcap_keys = _pcap_keys;
30 int pirq = irq_to_pcap(pcap_keys->pcap, irq);
31 u32 pstat;
32
33 ezx_pcap_read(pcap_keys->pcap, PCAP_REG_PSTAT, &pstat);
34 pstat &= 1 << pirq;
35
36 switch (pirq) {
37 case PCAP_IRQ_ONOFF:
38 input_report_key(pcap_keys->input, KEY_POWER, !pstat);
39 break;
40 case PCAP_IRQ_MIC:
41 input_report_key(pcap_keys->input, KEY_HP, !pstat);
42 break;
43 }
44
45 input_sync(pcap_keys->input);
46
47 return IRQ_HANDLED;
48}
49
50static int __devinit pcap_keys_probe(struct platform_device *pdev)
51{
52 int err = -ENOMEM;
53 struct pcap_keys *pcap_keys;
54 struct input_dev *input_dev;
55
56 pcap_keys = kmalloc(sizeof(struct pcap_keys), GFP_KERNEL);
57 if (!pcap_keys)
58 return err;
59
60 pcap_keys->pcap = dev_get_drvdata(pdev->dev.parent);
61
62 input_dev = input_allocate_device();
63 if (!input_dev)
64 goto fail;
65
66 pcap_keys->input = input_dev;
67
68 platform_set_drvdata(pdev, pcap_keys);
69 input_dev->name = pdev->name;
70 input_dev->phys = "pcap-keys/input0";
71 input_dev->id.bustype = BUS_HOST;
72 input_dev->dev.parent = &pdev->dev;
73
74 __set_bit(EV_KEY, input_dev->evbit);
75 __set_bit(KEY_POWER, input_dev->keybit);
76 __set_bit(KEY_HP, input_dev->keybit);
77
78 err = input_register_device(input_dev);
79 if (err)
80 goto fail_allocate;
81
82 err = request_irq(pcap_to_irq(pcap_keys->pcap, PCAP_IRQ_ONOFF),
83 pcap_keys_handler, 0, "Power key", pcap_keys);
84 if (err)
85 goto fail_register;
86
87 err = request_irq(pcap_to_irq(pcap_keys->pcap, PCAP_IRQ_MIC),
88 pcap_keys_handler, 0, "Headphone button", pcap_keys);
89 if (err)
90 goto fail_pwrkey;
91
92 return 0;
93
94fail_pwrkey:
95 free_irq(pcap_to_irq(pcap_keys->pcap, PCAP_IRQ_ONOFF), pcap_keys);
96fail_register:
97 input_unregister_device(input_dev);
98 goto fail;
99fail_allocate:
100 input_free_device(input_dev);
101fail:
102 kfree(pcap_keys);
103 return err;
104}
105
106static int __devexit pcap_keys_remove(struct platform_device *pdev)
107{
108 struct pcap_keys *pcap_keys = platform_get_drvdata(pdev);
109
110 free_irq(pcap_to_irq(pcap_keys->pcap, PCAP_IRQ_ONOFF), pcap_keys);
111 free_irq(pcap_to_irq(pcap_keys->pcap, PCAP_IRQ_MIC), pcap_keys);
112
113 input_unregister_device(pcap_keys->input);
114 kfree(pcap_keys);
115
116 return 0;
117}
118
119static struct platform_driver pcap_keys_device_driver = {
120 .probe = pcap_keys_probe,
121 .remove = __devexit_p(pcap_keys_remove),
122 .driver = {
123 .name = "pcap-keys",
124 .owner = THIS_MODULE,
125 }
126};
127
128static int __init pcap_keys_init(void)
129{
130 return platform_driver_register(&pcap_keys_device_driver);
131};
132
133static void __exit pcap_keys_exit(void)
134{
135 platform_driver_unregister(&pcap_keys_device_driver);
136};
137
138module_init(pcap_keys_init);
139module_exit(pcap_keys_exit);
140
141MODULE_DESCRIPTION("Motorola PCAP2 input events driver");
142MODULE_AUTHOR("Ilya Petrov <ilya.muromec@gmail.com>");
143MODULE_LICENSE("GPL");
144MODULE_ALIAS("platform:pcap_keys");
diff --git a/drivers/input/misc/wm831x-on.c b/drivers/input/misc/wm831x-on.c
new file mode 100644
index 000000000000..ba4f5dd7c60e
--- /dev/null
+++ b/drivers/input/misc/wm831x-on.c
@@ -0,0 +1,163 @@
1/**
2 * wm831x-on.c - WM831X ON pin driver
3 *
4 * Copyright (C) 2009 Wolfson Microelectronics plc
5 *
6 * This file is subject to the terms and conditions of the GNU General
7 * Public License. See the file "COPYING" in the main directory of this
8 * archive for more details.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/kernel.h>
23#include <linux/errno.h>
24#include <linux/input.h>
25#include <linux/interrupt.h>
26#include <linux/platform_device.h>
27#include <linux/workqueue.h>
28#include <linux/mfd/wm831x/core.h>
29
30struct wm831x_on {
31 struct input_dev *dev;
32 struct delayed_work work;
33 struct wm831x *wm831x;
34};
35
36/*
37 * The chip gives us an interrupt when the ON pin is asserted but we
38 * then need to poll to see when the pin is deasserted.
39 */
40static void wm831x_poll_on(struct work_struct *work)
41{
42 struct wm831x_on *wm831x_on = container_of(work, struct wm831x_on,
43 work.work);
44 struct wm831x *wm831x = wm831x_on->wm831x;
45 int poll, ret;
46
47 ret = wm831x_reg_read(wm831x, WM831X_ON_PIN_CONTROL);
48 if (ret >= 0) {
49 poll = !(ret & WM831X_ON_PIN_STS);
50
51 input_report_key(wm831x_on->dev, KEY_POWER, poll);
52 input_sync(wm831x_on->dev);
53 } else {
54 dev_err(wm831x->dev, "Failed to read ON status: %d\n", ret);
55 poll = 1;
56 }
57
58 if (poll)
59 schedule_delayed_work(&wm831x_on->work, 100);
60}
61
62static irqreturn_t wm831x_on_irq(int irq, void *data)
63{
64 struct wm831x_on *wm831x_on = data;
65
66 schedule_delayed_work(&wm831x_on->work, 0);
67
68 return IRQ_HANDLED;
69}
70
71static int __devinit wm831x_on_probe(struct platform_device *pdev)
72{
73 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
74 struct wm831x_on *wm831x_on;
75 int irq = platform_get_irq(pdev, 0);
76 int ret;
77
78 wm831x_on = kzalloc(sizeof(struct wm831x_on), GFP_KERNEL);
79 if (!wm831x_on) {
80 dev_err(&pdev->dev, "Can't allocate data\n");
81 return -ENOMEM;
82 }
83
84 wm831x_on->wm831x = wm831x;
85 INIT_DELAYED_WORK(&wm831x_on->work, wm831x_poll_on);
86
87 wm831x_on->dev = input_allocate_device();
88 if (!wm831x_on->dev) {
89 dev_err(&pdev->dev, "Can't allocate input dev\n");
90 ret = -ENOMEM;
91 goto err;
92 }
93
94 wm831x_on->dev->evbit[0] = BIT_MASK(EV_KEY);
95 wm831x_on->dev->keybit[BIT_WORD(KEY_POWER)] = BIT_MASK(KEY_POWER);
96 wm831x_on->dev->name = "wm831x_on";
97 wm831x_on->dev->phys = "wm831x_on/input0";
98 wm831x_on->dev->dev.parent = &pdev->dev;
99
100 ret = wm831x_request_irq(wm831x, irq, wm831x_on_irq,
101 IRQF_TRIGGER_RISING, "wm831x_on", wm831x_on);
102 if (ret < 0) {
103 dev_err(&pdev->dev, "Unable to request IRQ: %d\n", ret);
104 goto err_input_dev;
105 }
106 ret = input_register_device(wm831x_on->dev);
107 if (ret) {
108 dev_dbg(&pdev->dev, "Can't register input device: %d\n", ret);
109 goto err_irq;
110 }
111
112 platform_set_drvdata(pdev, wm831x_on);
113
114 return 0;
115
116err_irq:
117 wm831x_free_irq(wm831x, irq, NULL);
118err_input_dev:
119 input_free_device(wm831x_on->dev);
120err:
121 kfree(wm831x_on);
122 return ret;
123}
124
125static int __devexit wm831x_on_remove(struct platform_device *pdev)
126{
127 struct wm831x_on *wm831x_on = platform_get_drvdata(pdev);
128 int irq = platform_get_irq(pdev, 0);
129
130 wm831x_free_irq(wm831x_on->wm831x, irq, wm831x_on);
131 cancel_delayed_work_sync(&wm831x_on->work);
132 input_unregister_device(wm831x_on->dev);
133 kfree(wm831x_on);
134
135 return 0;
136}
137
138static struct platform_driver wm831x_on_driver = {
139 .probe = wm831x_on_probe,
140 .remove = __devexit_p(wm831x_on_remove),
141 .driver = {
142 .name = "wm831x-on",
143 .owner = THIS_MODULE,
144 },
145};
146
147static int __init wm831x_on_init(void)
148{
149 return platform_driver_register(&wm831x_on_driver);
150}
151module_init(wm831x_on_init);
152
153static void __exit wm831x_on_exit(void)
154{
155 platform_driver_unregister(&wm831x_on_driver);
156}
157module_exit(wm831x_on_exit);
158
159MODULE_ALIAS("platform:wm831x-on");
160MODULE_DESCRIPTION("WM831x ON pin");
161MODULE_LICENSE("GPL");
162MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
163
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index 87a1ae63bcc4..ab02d72afbf3 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -510,4 +510,13 @@ config TOUCHSCREEN_W90X900
510 To compile this driver as a module, choose M here: the 510 To compile this driver as a module, choose M here: the
511 module will be called w90p910_ts. 511 module will be called w90p910_ts.
512 512
513config TOUCHSCREEN_PCAP
514 tristate "Motorola PCAP touchscreen"
515 depends on EZX_PCAP
516 help
517 Say Y here if you have a Motorola EZX telephone and
518 want to enable support for the built-in touchscreen.
519
520 To compile this driver as a module, choose M here: the
521 module will be called pcap_ts.
513endif 522endif
diff --git a/drivers/input/touchscreen/Makefile b/drivers/input/touchscreen/Makefile
index 3e1c5e0b952f..4599bf7ad819 100644
--- a/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@ -40,3 +40,4 @@ obj-$(CONFIG_TOUCHSCREEN_WM97XX_ATMEL) += atmel-wm97xx.o
40obj-$(CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE) += mainstone-wm97xx.o 40obj-$(CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE) += mainstone-wm97xx.o
41obj-$(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE) += zylonite-wm97xx.o 41obj-$(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE) += zylonite-wm97xx.o
42obj-$(CONFIG_TOUCHSCREEN_W90X900) += w90p910_ts.o 42obj-$(CONFIG_TOUCHSCREEN_W90X900) += w90p910_ts.o
43obj-$(CONFIG_TOUCHSCREEN_PCAP) += pcap_ts.o
diff --git a/drivers/input/touchscreen/pcap_ts.c b/drivers/input/touchscreen/pcap_ts.c
new file mode 100644
index 000000000000..67fcd33595de
--- /dev/null
+++ b/drivers/input/touchscreen/pcap_ts.c
@@ -0,0 +1,271 @@
1/*
2 * Driver for Motorola PCAP2 touchscreen as found in the EZX phone platform.
3 *
4 * Copyright (C) 2006 Harald Welte <laforge@openezx.org>
5 * Copyright (C) 2009 Daniel Ribeiro <drwyrm@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/fs.h>
16#include <linux/string.h>
17#include <linux/pm.h>
18#include <linux/timer.h>
19#include <linux/interrupt.h>
20#include <linux/platform_device.h>
21#include <linux/input.h>
22#include <linux/mfd/ezx-pcap.h>
23
24struct pcap_ts {
25 struct pcap_chip *pcap;
26 struct input_dev *input;
27 struct delayed_work work;
28 u16 x, y;
29 u16 pressure;
30 u8 read_state;
31};
32
33#define SAMPLE_DELAY 20 /* msecs */
34
35#define X_AXIS_MIN 0
36#define X_AXIS_MAX 1023
37#define Y_AXIS_MAX X_AXIS_MAX
38#define Y_AXIS_MIN X_AXIS_MIN
39#define PRESSURE_MAX X_AXIS_MAX
40#define PRESSURE_MIN X_AXIS_MIN
41
42static void pcap_ts_read_xy(void *data, u16 res[2])
43{
44 struct pcap_ts *pcap_ts = data;
45
46 switch (pcap_ts->read_state) {
47 case PCAP_ADC_TS_M_PRESSURE:
48 /* pressure reading is unreliable */
49 if (res[0] > PRESSURE_MIN && res[0] < PRESSURE_MAX)
50 pcap_ts->pressure = res[0];
51 pcap_ts->read_state = PCAP_ADC_TS_M_XY;
52 schedule_delayed_work(&pcap_ts->work, 0);
53 break;
54 case PCAP_ADC_TS_M_XY:
55 pcap_ts->y = res[0];
56 pcap_ts->x = res[1];
57 if (pcap_ts->x <= X_AXIS_MIN || pcap_ts->x >= X_AXIS_MAX ||
58 pcap_ts->y <= Y_AXIS_MIN || pcap_ts->y >= Y_AXIS_MAX) {
59 /* pen has been released */
60 input_report_abs(pcap_ts->input, ABS_PRESSURE, 0);
61 input_report_key(pcap_ts->input, BTN_TOUCH, 0);
62
63 pcap_ts->read_state = PCAP_ADC_TS_M_STANDBY;
64 schedule_delayed_work(&pcap_ts->work, 0);
65 } else {
66 /* pen is touching the screen */
67 input_report_abs(pcap_ts->input, ABS_X, pcap_ts->x);
68 input_report_abs(pcap_ts->input, ABS_Y, pcap_ts->y);
69 input_report_key(pcap_ts->input, BTN_TOUCH, 1);
70 input_report_abs(pcap_ts->input, ABS_PRESSURE,
71 pcap_ts->pressure);
72
73 /* switch back to pressure read mode */
74 pcap_ts->read_state = PCAP_ADC_TS_M_PRESSURE;
75 schedule_delayed_work(&pcap_ts->work,
76 msecs_to_jiffies(SAMPLE_DELAY));
77 }
78 input_sync(pcap_ts->input);
79 break;
80 default:
81 dev_warn(&pcap_ts->input->dev,
82 "pcap_ts: Warning, unhandled read_state %d\n",
83 pcap_ts->read_state);
84 break;
85 }
86}
87
88static void pcap_ts_work(struct work_struct *work)
89{
90 struct delayed_work *dw = container_of(work, struct delayed_work, work);
91 struct pcap_ts *pcap_ts = container_of(dw, struct pcap_ts, work);
92 u8 ch[2];
93
94 pcap_set_ts_bits(pcap_ts->pcap,
95 pcap_ts->read_state << PCAP_ADC_TS_M_SHIFT);
96
97 if (pcap_ts->read_state == PCAP_ADC_TS_M_STANDBY)
98 return;
99
100 /* start adc conversion */
101 ch[0] = PCAP_ADC_CH_TS_X1;
102 ch[1] = PCAP_ADC_CH_TS_Y1;
103 pcap_adc_async(pcap_ts->pcap, PCAP_ADC_BANK_1, 0, ch,
104 pcap_ts_read_xy, pcap_ts);
105}
106
107static irqreturn_t pcap_ts_event_touch(int pirq, void *data)
108{
109 struct pcap_ts *pcap_ts = data;
110
111 if (pcap_ts->read_state == PCAP_ADC_TS_M_STANDBY) {
112 pcap_ts->read_state = PCAP_ADC_TS_M_PRESSURE;
113 schedule_delayed_work(&pcap_ts->work, 0);
114 }
115 return IRQ_HANDLED;
116}
117
118static int pcap_ts_open(struct input_dev *dev)
119{
120 struct pcap_ts *pcap_ts = input_get_drvdata(dev);
121
122 pcap_ts->read_state = PCAP_ADC_TS_M_STANDBY;
123 schedule_delayed_work(&pcap_ts->work, 0);
124
125 return 0;
126}
127
128static void pcap_ts_close(struct input_dev *dev)
129{
130 struct pcap_ts *pcap_ts = input_get_drvdata(dev);
131
132 cancel_delayed_work_sync(&pcap_ts->work);
133
134 pcap_ts->read_state = PCAP_ADC_TS_M_NONTS;
135 pcap_set_ts_bits(pcap_ts->pcap,
136 pcap_ts->read_state << PCAP_ADC_TS_M_SHIFT);
137}
138
139static int __devinit pcap_ts_probe(struct platform_device *pdev)
140{
141 struct input_dev *input_dev;
142 struct pcap_ts *pcap_ts;
143 int err = -ENOMEM;
144
145 pcap_ts = kzalloc(sizeof(*pcap_ts), GFP_KERNEL);
146 if (!pcap_ts)
147 return err;
148
149 pcap_ts->pcap = dev_get_drvdata(pdev->dev.parent);
150 platform_set_drvdata(pdev, pcap_ts);
151
152 input_dev = input_allocate_device();
153 if (!input_dev)
154 goto fail;
155
156 INIT_DELAYED_WORK(&pcap_ts->work, pcap_ts_work);
157
158 pcap_ts->read_state = PCAP_ADC_TS_M_NONTS;
159 pcap_set_ts_bits(pcap_ts->pcap,
160 pcap_ts->read_state << PCAP_ADC_TS_M_SHIFT);
161
162 pcap_ts->input = input_dev;
163 input_set_drvdata(input_dev, pcap_ts);
164
165 input_dev->name = "pcap-touchscreen";
166 input_dev->phys = "pcap_ts/input0";
167 input_dev->id.bustype = BUS_HOST;
168 input_dev->id.vendor = 0x0001;
169 input_dev->id.product = 0x0002;
170 input_dev->id.version = 0x0100;
171 input_dev->dev.parent = &pdev->dev;
172 input_dev->open = pcap_ts_open;
173 input_dev->close = pcap_ts_close;
174
175 input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
176 input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
177 input_set_abs_params(input_dev, ABS_X, X_AXIS_MIN, X_AXIS_MAX, 0, 0);
178 input_set_abs_params(input_dev, ABS_Y, Y_AXIS_MIN, Y_AXIS_MAX, 0, 0);
179 input_set_abs_params(input_dev, ABS_PRESSURE, PRESSURE_MIN,
180 PRESSURE_MAX, 0, 0);
181
182 err = input_register_device(pcap_ts->input);
183 if (err)
184 goto fail_allocate;
185
186 err = request_irq(pcap_to_irq(pcap_ts->pcap, PCAP_IRQ_TS),
187 pcap_ts_event_touch, 0, "Touch Screen", pcap_ts);
188 if (err)
189 goto fail_register;
190
191 return 0;
192
193fail_register:
194 input_unregister_device(input_dev);
195 goto fail;
196fail_allocate:
197 input_free_device(input_dev);
198fail:
199 kfree(pcap_ts);
200
201 return err;
202}
203
204static int __devexit pcap_ts_remove(struct platform_device *pdev)
205{
206 struct pcap_ts *pcap_ts = platform_get_drvdata(pdev);
207
208 free_irq(pcap_to_irq(pcap_ts->pcap, PCAP_IRQ_TS), pcap_ts);
209 cancel_delayed_work_sync(&pcap_ts->work);
210
211 input_unregister_device(pcap_ts->input);
212
213 kfree(pcap_ts);
214
215 return 0;
216}
217
218#ifdef CONFIG_PM
219static int pcap_ts_suspend(struct device *dev)
220{
221 struct pcap_ts *pcap_ts = dev_get_drvdata(dev);
222
223 pcap_set_ts_bits(pcap_ts->pcap, PCAP_ADC_TS_REF_LOWPWR);
224 return 0;
225}
226
227static int pcap_ts_resume(struct device *dev)
228{
229 struct pcap_ts *pcap_ts = dev_get_drvdata(dev);
230
231 pcap_set_ts_bits(pcap_ts->pcap,
232 pcap_ts->read_state << PCAP_ADC_TS_M_SHIFT);
233 return 0;
234}
235
236static struct dev_pm_ops pcap_ts_pm_ops = {
237 .suspend = pcap_ts_suspend,
238 .resume = pcap_ts_resume,
239};
240#define PCAP_TS_PM_OPS (&pcap_ts_pm_ops)
241#else
242#define PCAP_TS_PM_OPS NULL
243#endif
244
245static struct platform_driver pcap_ts_driver = {
246 .probe = pcap_ts_probe,
247 .remove = __devexit_p(pcap_ts_remove),
248 .driver = {
249 .name = "pcap-ts",
250 .owner = THIS_MODULE,
251 .pm = PCAP_TS_PM_OPS,
252 },
253};
254
255static int __init pcap_ts_init(void)
256{
257 return platform_driver_register(&pcap_ts_driver);
258}
259
260static void __exit pcap_ts_exit(void)
261{
262 platform_driver_unregister(&pcap_ts_driver);
263}
264
265module_init(pcap_ts_init);
266module_exit(pcap_ts_exit);
267
268MODULE_DESCRIPTION("Motorola PCAP2 touchscreen driver");
269MODULE_AUTHOR("Daniel Ribeiro / Harald Welte");
270MODULE_LICENSE("GPL");
271MODULE_ALIAS("platform:pcap_ts");
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c
index e86878deea71..61c47b824083 100644
--- a/drivers/media/video/sh_mobile_ceu_camera.c
+++ b/drivers/media/video/sh_mobile_ceu_camera.c
@@ -30,7 +30,7 @@
30#include <linux/device.h> 30#include <linux/device.h>
31#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <linux/videodev2.h> 32#include <linux/videodev2.h>
33#include <linux/clk.h> 33#include <linux/pm_runtime.h>
34 34
35#include <media/v4l2-common.h> 35#include <media/v4l2-common.h>
36#include <media/v4l2-dev.h> 36#include <media/v4l2-dev.h>
@@ -86,7 +86,6 @@ struct sh_mobile_ceu_dev {
86 86
87 unsigned int irq; 87 unsigned int irq;
88 void __iomem *base; 88 void __iomem *base;
89 struct clk *clk;
90 unsigned long video_limit; 89 unsigned long video_limit;
91 90
92 /* lock used to protect videobuf */ 91 /* lock used to protect videobuf */
@@ -361,7 +360,7 @@ static int sh_mobile_ceu_add_device(struct soc_camera_device *icd)
361 if (ret) 360 if (ret)
362 goto err; 361 goto err;
363 362
364 clk_enable(pcdev->clk); 363 pm_runtime_get_sync(ici->dev);
365 364
366 ceu_write(pcdev, CAPSR, 1 << 16); /* reset */ 365 ceu_write(pcdev, CAPSR, 1 << 16); /* reset */
367 while (ceu_read(pcdev, CSTSR) & 1) 366 while (ceu_read(pcdev, CSTSR) & 1)
@@ -395,7 +394,7 @@ static void sh_mobile_ceu_remove_device(struct soc_camera_device *icd)
395 } 394 }
396 spin_unlock_irqrestore(&pcdev->lock, flags); 395 spin_unlock_irqrestore(&pcdev->lock, flags);
397 396
398 clk_disable(pcdev->clk); 397 pm_runtime_put_sync(ici->dev);
399 398
400 icd->ops->release(icd); 399 icd->ops->release(icd);
401 400
@@ -798,7 +797,6 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev)
798 struct sh_mobile_ceu_dev *pcdev; 797 struct sh_mobile_ceu_dev *pcdev;
799 struct resource *res; 798 struct resource *res;
800 void __iomem *base; 799 void __iomem *base;
801 char clk_name[8];
802 unsigned int irq; 800 unsigned int irq;
803 int err = 0; 801 int err = 0;
804 802
@@ -862,13 +860,9 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev)
862 goto exit_release_mem; 860 goto exit_release_mem;
863 } 861 }
864 862
865 snprintf(clk_name, sizeof(clk_name), "ceu%d", pdev->id); 863 pm_suspend_ignore_children(&pdev->dev, true);
866 pcdev->clk = clk_get(&pdev->dev, clk_name); 864 pm_runtime_enable(&pdev->dev);
867 if (IS_ERR(pcdev->clk)) { 865 pm_runtime_resume(&pdev->dev);
868 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
869 err = PTR_ERR(pcdev->clk);
870 goto exit_free_irq;
871 }
872 866
873 pcdev->ici.priv = pcdev; 867 pcdev->ici.priv = pcdev;
874 pcdev->ici.dev = &pdev->dev; 868 pcdev->ici.dev = &pdev->dev;
@@ -878,12 +872,10 @@ static int sh_mobile_ceu_probe(struct platform_device *pdev)
878 872
879 err = soc_camera_host_register(&pcdev->ici); 873 err = soc_camera_host_register(&pcdev->ici);
880 if (err) 874 if (err)
881 goto exit_free_clk; 875 goto exit_free_irq;
882 876
883 return 0; 877 return 0;
884 878
885exit_free_clk:
886 clk_put(pcdev->clk);
887exit_free_irq: 879exit_free_irq:
888 free_irq(pcdev->irq, pcdev); 880 free_irq(pcdev->irq, pcdev);
889exit_release_mem: 881exit_release_mem:
@@ -904,7 +896,6 @@ static int sh_mobile_ceu_remove(struct platform_device *pdev)
904 struct sh_mobile_ceu_dev, ici); 896 struct sh_mobile_ceu_dev, ici);
905 897
906 soc_camera_host_unregister(soc_host); 898 soc_camera_host_unregister(soc_host);
907 clk_put(pcdev->clk);
908 free_irq(pcdev->irq, pcdev); 899 free_irq(pcdev->irq, pcdev);
909 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) 900 if (platform_get_resource(pdev, IORESOURCE_MEM, 1))
910 dma_release_declared_memory(&pdev->dev); 901 dma_release_declared_memory(&pdev->dev);
@@ -913,9 +904,27 @@ static int sh_mobile_ceu_remove(struct platform_device *pdev)
913 return 0; 904 return 0;
914} 905}
915 906
907static int sh_mobile_ceu_runtime_nop(struct device *dev)
908{
909 /* Runtime PM callback shared between ->runtime_suspend()
910 * and ->runtime_resume(). Simply returns success.
911 *
912 * This driver re-initializes all registers after
913 * pm_runtime_get_sync() anyway so there is no need
914 * to save and restore registers here.
915 */
916 return 0;
917}
918
919static struct dev_pm_ops sh_mobile_ceu_dev_pm_ops = {
920 .runtime_suspend = sh_mobile_ceu_runtime_nop,
921 .runtime_resume = sh_mobile_ceu_runtime_nop,
922};
923
916static struct platform_driver sh_mobile_ceu_driver = { 924static struct platform_driver sh_mobile_ceu_driver = {
917 .driver = { 925 .driver = {
918 .name = "sh_mobile_ceu", 926 .name = "sh_mobile_ceu",
927 .pm = &sh_mobile_ceu_dev_pm_ops,
919 }, 928 },
920 .probe = sh_mobile_ceu_probe, 929 .probe = sh_mobile_ceu_probe,
921 .remove = sh_mobile_ceu_remove, 930 .remove = sh_mobile_ceu_remove,
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 491ac0f800d2..570be139f9df 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -108,6 +108,19 @@ config TWL4030_CORE
108 high speed USB OTG transceiver, an audio codec (on most 108 high speed USB OTG transceiver, an audio codec (on most
109 versions) and many other features. 109 versions) and many other features.
110 110
111config TWL4030_POWER
112 bool "Support power resources on TWL4030 family chips"
113 depends on TWL4030_CORE && ARM
114 help
115 Say yes here if you want to use the power resources on the
116 TWL4030 family chips. Most of these resources are regulators,
117 which have a separate driver; some are control signals, such
118 as clock request handshaking.
119
120 This driver uses board-specific data to initialize the resources
121 and load scripts controling which resources are switched off/on
122 or reset when a sleep, wakeup or warm reset event occurs.
123
111config MFD_TMIO 124config MFD_TMIO
112 bool 125 bool
113 default n 126 default n
@@ -157,6 +170,16 @@ config MFD_WM8400
157 the device, additional drivers must be enabled in order to use 170 the device, additional drivers must be enabled in order to use
158 the functionality of the device. 171 the functionality of the device.
159 172
173config MFD_WM831X
174 tristate "Support Wolfson Microelectronics WM831x PMICs"
175 select MFD_CORE
176 depends on I2C
177 help
178 Support for the Wolfson Microelecronics WM831x PMICs. This
179 driver provides common support for accessing the device,
180 additional drivers must be enabled in order to use the
181 functionality of the device.
182
160config MFD_WM8350 183config MFD_WM8350
161 tristate 184 tristate
162 185
@@ -228,6 +251,16 @@ config MFD_PCF50633
228 facilities, and registers devices for the various functions 251 facilities, and registers devices for the various functions
229 so that function-specific drivers can bind to them. 252 so that function-specific drivers can bind to them.
230 253
254config MFD_MC13783
255 tristate "Support Freescale MC13783"
256 depends on SPI_MASTER
257 select MFD_CORE
258 help
259 Support for the Freescale (Atlas) MC13783 PMIC and audio CODEC.
260 This driver provides common support for accessing the device,
261 additional drivers must be enabled in order to use the
262 functionality of the device.
263
231config PCF50633_ADC 264config PCF50633_ADC
232 tristate "Support for NXP PCF50633 ADC" 265 tristate "Support for NXP PCF50633 ADC"
233 depends on MFD_PCF50633 266 depends on MFD_PCF50633
@@ -256,6 +289,15 @@ config AB3100_CORE
256 LEDs, vibrator, system power and temperature, power management 289 LEDs, vibrator, system power and temperature, power management
257 and ALSA sound. 290 and ALSA sound.
258 291
292config AB3100_OTP
293 tristate "ST-Ericsson AB3100 OTP functions"
294 depends on AB3100_CORE
295 default y if AB3100_CORE
296 help
297 Select this to enable the AB3100 Mixed Signal IC OTP (one-time
298 programmable memory) support. This exposes a sysfs file to read
299 out OTP values.
300
259config EZX_PCAP 301config EZX_PCAP
260 bool "PCAP Support" 302 bool "PCAP Support"
261 depends on GENERIC_HARDIRQS && SPI_MASTER 303 depends on GENERIC_HARDIRQS && SPI_MASTER
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 6f8a9a1af20b..f3b277b90d40 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -15,6 +15,8 @@ obj-$(CONFIG_MFD_TC6387XB) += tc6387xb.o
15obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o 15obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o
16 16
17obj-$(CONFIG_MFD_WM8400) += wm8400-core.o 17obj-$(CONFIG_MFD_WM8400) += wm8400-core.o
18wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o
19obj-$(CONFIG_MFD_WM831X) += wm831x.o
18wm8350-objs := wm8350-core.o wm8350-regmap.o wm8350-gpio.o 20wm8350-objs := wm8350-core.o wm8350-regmap.o wm8350-gpio.o
19obj-$(CONFIG_MFD_WM8350) += wm8350.o 21obj-$(CONFIG_MFD_WM8350) += wm8350.o
20obj-$(CONFIG_MFD_WM8350_I2C) += wm8350-i2c.o 22obj-$(CONFIG_MFD_WM8350_I2C) += wm8350-i2c.o
@@ -23,6 +25,9 @@ obj-$(CONFIG_TPS65010) += tps65010.o
23obj-$(CONFIG_MENELAUS) += menelaus.o 25obj-$(CONFIG_MENELAUS) += menelaus.o
24 26
25obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o twl4030-irq.o 27obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o twl4030-irq.o
28obj-$(CONFIG_TWL4030_POWER) += twl4030-power.o
29
30obj-$(CONFIG_MFD_MC13783) += mc13783-core.o
26 31
27obj-$(CONFIG_MFD_CORE) += mfd-core.o 32obj-$(CONFIG_MFD_CORE) += mfd-core.o
28 33
@@ -44,3 +49,4 @@ obj-$(CONFIG_MFD_PCF50633) += pcf50633-core.o
44obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o 49obj-$(CONFIG_PCF50633_ADC) += pcf50633-adc.o
45obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o 50obj-$(CONFIG_PCF50633_GPIO) += pcf50633-gpio.o
46obj-$(CONFIG_AB3100_CORE) += ab3100-core.o 51obj-$(CONFIG_AB3100_CORE) += ab3100-core.o
52obj-$(CONFIG_AB3100_OTP) += ab3100-otp.o
diff --git a/drivers/mfd/ab3100-core.c b/drivers/mfd/ab3100-core.c
index 13e7d7bfe85f..c533f86ff5ea 100644
--- a/drivers/mfd/ab3100-core.c
+++ b/drivers/mfd/ab3100-core.c
@@ -14,7 +14,6 @@
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <linux/device.h> 15#include <linux/device.h>
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/workqueue.h>
18#include <linux/debugfs.h> 17#include <linux/debugfs.h>
19#include <linux/seq_file.h> 18#include <linux/seq_file.h>
20#include <linux/uaccess.h> 19#include <linux/uaccess.h>
@@ -77,7 +76,7 @@ u8 ab3100_get_chip_type(struct ab3100 *ab3100)
77} 76}
78EXPORT_SYMBOL(ab3100_get_chip_type); 77EXPORT_SYMBOL(ab3100_get_chip_type);
79 78
80int ab3100_set_register(struct ab3100 *ab3100, u8 reg, u8 regval) 79int ab3100_set_register_interruptible(struct ab3100 *ab3100, u8 reg, u8 regval)
81{ 80{
82 u8 regandval[2] = {reg, regval}; 81 u8 regandval[2] = {reg, regval};
83 int err; 82 int err;
@@ -107,9 +106,10 @@ int ab3100_set_register(struct ab3100 *ab3100, u8 reg, u8 regval)
107 err = 0; 106 err = 0;
108 } 107 }
109 mutex_unlock(&ab3100->access_mutex); 108 mutex_unlock(&ab3100->access_mutex);
110 return 0; 109 return err;
111} 110}
112EXPORT_SYMBOL(ab3100_set_register); 111EXPORT_SYMBOL(ab3100_set_register_interruptible);
112
113 113
114/* 114/*
115 * The test registers exist at an I2C bus address up one 115 * The test registers exist at an I2C bus address up one
@@ -118,7 +118,7 @@ EXPORT_SYMBOL(ab3100_set_register);
118 * anyway. It's currently only used from this file so declare 118 * anyway. It's currently only used from this file so declare
119 * it static and do not export. 119 * it static and do not export.
120 */ 120 */
121static int ab3100_set_test_register(struct ab3100 *ab3100, 121static int ab3100_set_test_register_interruptible(struct ab3100 *ab3100,
122 u8 reg, u8 regval) 122 u8 reg, u8 regval)
123{ 123{
124 u8 regandval[2] = {reg, regval}; 124 u8 regandval[2] = {reg, regval};
@@ -148,7 +148,8 @@ static int ab3100_set_test_register(struct ab3100 *ab3100,
148 return err; 148 return err;
149} 149}
150 150
151int ab3100_get_register(struct ab3100 *ab3100, u8 reg, u8 *regval) 151
152int ab3100_get_register_interruptible(struct ab3100 *ab3100, u8 reg, u8 *regval)
152{ 153{
153 int err; 154 int err;
154 155
@@ -202,9 +203,10 @@ int ab3100_get_register(struct ab3100 *ab3100, u8 reg, u8 *regval)
202 mutex_unlock(&ab3100->access_mutex); 203 mutex_unlock(&ab3100->access_mutex);
203 return err; 204 return err;
204} 205}
205EXPORT_SYMBOL(ab3100_get_register); 206EXPORT_SYMBOL(ab3100_get_register_interruptible);
206 207
207int ab3100_get_register_page(struct ab3100 *ab3100, 208
209int ab3100_get_register_page_interruptible(struct ab3100 *ab3100,
208 u8 first_reg, u8 *regvals, u8 numregs) 210 u8 first_reg, u8 *regvals, u8 numregs)
209{ 211{
210 int err; 212 int err;
@@ -258,9 +260,10 @@ int ab3100_get_register_page(struct ab3100 *ab3100,
258 mutex_unlock(&ab3100->access_mutex); 260 mutex_unlock(&ab3100->access_mutex);
259 return err; 261 return err;
260} 262}
261EXPORT_SYMBOL(ab3100_get_register_page); 263EXPORT_SYMBOL(ab3100_get_register_page_interruptible);
264
262 265
263int ab3100_mask_and_set_register(struct ab3100 *ab3100, 266int ab3100_mask_and_set_register_interruptible(struct ab3100 *ab3100,
264 u8 reg, u8 andmask, u8 ormask) 267 u8 reg, u8 andmask, u8 ormask)
265{ 268{
266 u8 regandval[2] = {reg, 0}; 269 u8 regandval[2] = {reg, 0};
@@ -328,7 +331,8 @@ int ab3100_mask_and_set_register(struct ab3100 *ab3100,
328 mutex_unlock(&ab3100->access_mutex); 331 mutex_unlock(&ab3100->access_mutex);
329 return err; 332 return err;
330} 333}
331EXPORT_SYMBOL(ab3100_mask_and_set_register); 334EXPORT_SYMBOL(ab3100_mask_and_set_register_interruptible);
335
332 336
333/* 337/*
334 * Register a simple callback for handling any AB3100 events. 338 * Register a simple callback for handling any AB3100 events.
@@ -371,7 +375,7 @@ static void ab3100_work(struct work_struct *work)
371 u32 fatevent; 375 u32 fatevent;
372 int err; 376 int err;
373 377
374 err = ab3100_get_register_page(ab3100, AB3100_EVENTA1, 378 err = ab3100_get_register_page_interruptible(ab3100, AB3100_EVENTA1,
375 event_regs, 3); 379 event_regs, 3);
376 if (err) 380 if (err)
377 goto err_event_wq; 381 goto err_event_wq;
@@ -417,7 +421,7 @@ static irqreturn_t ab3100_irq_handler(int irq, void *data)
417 * stuff and we will re-enable the interrupts once th 421 * stuff and we will re-enable the interrupts once th
418 * worker has finished. 422 * worker has finished.
419 */ 423 */
420 disable_irq(ab3100->i2c_client->irq); 424 disable_irq_nosync(irq);
421 schedule_work(&ab3100->work); 425 schedule_work(&ab3100->work);
422 return IRQ_HANDLED; 426 return IRQ_HANDLED;
423} 427}
@@ -435,7 +439,7 @@ static int ab3100_registers_print(struct seq_file *s, void *p)
435 seq_printf(s, "AB3100 registers:\n"); 439 seq_printf(s, "AB3100 registers:\n");
436 440
437 for (reg = 0; reg < 0xff; reg++) { 441 for (reg = 0; reg < 0xff; reg++) {
438 ab3100_get_register(ab3100, reg, &value); 442 ab3100_get_register_interruptible(ab3100, reg, &value);
439 seq_printf(s, "[0x%x]: 0x%x\n", reg, value); 443 seq_printf(s, "[0x%x]: 0x%x\n", reg, value);
440 } 444 }
441 return 0; 445 return 0;
@@ -465,14 +469,14 @@ static int ab3100_get_set_reg_open_file(struct inode *inode, struct file *file)
465 return 0; 469 return 0;
466} 470}
467 471
468static int ab3100_get_set_reg(struct file *file, 472static ssize_t ab3100_get_set_reg(struct file *file,
469 const char __user *user_buf, 473 const char __user *user_buf,
470 size_t count, loff_t *ppos) 474 size_t count, loff_t *ppos)
471{ 475{
472 struct ab3100_get_set_reg_priv *priv = file->private_data; 476 struct ab3100_get_set_reg_priv *priv = file->private_data;
473 struct ab3100 *ab3100 = priv->ab3100; 477 struct ab3100 *ab3100 = priv->ab3100;
474 char buf[32]; 478 char buf[32];
475 int buf_size; 479 ssize_t buf_size;
476 int regp; 480 int regp;
477 unsigned long user_reg; 481 unsigned long user_reg;
478 int err; 482 int err;
@@ -515,7 +519,7 @@ static int ab3100_get_set_reg(struct file *file,
515 u8 reg = (u8) user_reg; 519 u8 reg = (u8) user_reg;
516 u8 regvalue; 520 u8 regvalue;
517 521
518 ab3100_get_register(ab3100, reg, &regvalue); 522 ab3100_get_register_interruptible(ab3100, reg, &regvalue);
519 523
520 dev_info(ab3100->dev, 524 dev_info(ab3100->dev,
521 "debug read AB3100 reg[0x%02x]: 0x%02x\n", 525 "debug read AB3100 reg[0x%02x]: 0x%02x\n",
@@ -547,8 +551,8 @@ static int ab3100_get_set_reg(struct file *file,
547 return -EINVAL; 551 return -EINVAL;
548 552
549 value = (u8) user_value; 553 value = (u8) user_value;
550 ab3100_set_register(ab3100, reg, value); 554 ab3100_set_register_interruptible(ab3100, reg, value);
551 ab3100_get_register(ab3100, reg, &regvalue); 555 ab3100_get_register_interruptible(ab3100, reg, &regvalue);
552 556
553 dev_info(ab3100->dev, 557 dev_info(ab3100->dev,
554 "debug write reg[0x%02x] with 0x%02x, " 558 "debug write reg[0x%02x] with 0x%02x, "
@@ -662,7 +666,7 @@ ab3100_init_settings[] = {
662 .setting = 0x01 666 .setting = 0x01
663 }, { 667 }, {
664 .abreg = AB3100_IMRB1, 668 .abreg = AB3100_IMRB1,
665 .setting = 0xFF 669 .setting = 0xBF
666 }, { 670 }, {
667 .abreg = AB3100_IMRB2, 671 .abreg = AB3100_IMRB2,
668 .setting = 0xFF 672 .setting = 0xFF
@@ -696,7 +700,7 @@ static int __init ab3100_setup(struct ab3100 *ab3100)
696 int i; 700 int i;
697 701
698 for (i = 0; i < ARRAY_SIZE(ab3100_init_settings); i++) { 702 for (i = 0; i < ARRAY_SIZE(ab3100_init_settings); i++) {
699 err = ab3100_set_register(ab3100, 703 err = ab3100_set_register_interruptible(ab3100,
700 ab3100_init_settings[i].abreg, 704 ab3100_init_settings[i].abreg,
701 ab3100_init_settings[i].setting); 705 ab3100_init_settings[i].setting);
702 if (err) 706 if (err)
@@ -705,14 +709,14 @@ static int __init ab3100_setup(struct ab3100 *ab3100)
705 709
706 /* 710 /*
707 * Special trick to make the AB3100 use the 32kHz clock (RTC) 711 * Special trick to make the AB3100 use the 32kHz clock (RTC)
708 * bit 3 in test registe 0x02 is a special, undocumented test 712 * bit 3 in test register 0x02 is a special, undocumented test
709 * register bit that only exist in AB3100 P1E 713 * register bit that only exist in AB3100 P1E
710 */ 714 */
711 if (ab3100->chip_id == 0xc4) { 715 if (ab3100->chip_id == 0xc4) {
712 dev_warn(ab3100->dev, 716 dev_warn(ab3100->dev,
713 "AB3100 P1E variant detected, " 717 "AB3100 P1E variant detected, "
714 "forcing chip to 32KHz\n"); 718 "forcing chip to 32KHz\n");
715 err = ab3100_set_test_register(ab3100, 0x02, 0x08); 719 err = ab3100_set_test_register_interruptible(ab3100, 0x02, 0x08);
716 } 720 }
717 721
718 exit_no_setup: 722 exit_no_setup:
@@ -833,6 +837,8 @@ static int __init ab3100_probe(struct i2c_client *client,
833 const struct i2c_device_id *id) 837 const struct i2c_device_id *id)
834{ 838{
835 struct ab3100 *ab3100; 839 struct ab3100 *ab3100;
840 struct ab3100_platform_data *ab3100_plf_data =
841 client->dev.platform_data;
836 int err; 842 int err;
837 int i; 843 int i;
838 844
@@ -852,8 +858,8 @@ static int __init ab3100_probe(struct i2c_client *client,
852 i2c_set_clientdata(client, ab3100); 858 i2c_set_clientdata(client, ab3100);
853 859
854 /* Read chip ID register */ 860 /* Read chip ID register */
855 err = ab3100_get_register(ab3100, AB3100_CID, 861 err = ab3100_get_register_interruptible(ab3100, AB3100_CID,
856 &ab3100->chip_id); 862 &ab3100->chip_id);
857 if (err) { 863 if (err) {
858 dev_err(&client->dev, 864 dev_err(&client->dev,
859 "could not communicate with the AB3100 analog " 865 "could not communicate with the AB3100 analog "
@@ -916,6 +922,8 @@ static int __init ab3100_probe(struct i2c_client *client,
916 for (i = 0; i < ARRAY_SIZE(ab3100_platform_devs); i++) { 922 for (i = 0; i < ARRAY_SIZE(ab3100_platform_devs); i++) {
917 ab3100_platform_devs[i]->dev.parent = 923 ab3100_platform_devs[i]->dev.parent =
918 &client->dev; 924 &client->dev;
925 ab3100_platform_devs[i]->dev.platform_data =
926 ab3100_plf_data;
919 platform_set_drvdata(ab3100_platform_devs[i], ab3100); 927 platform_set_drvdata(ab3100_platform_devs[i], ab3100);
920 } 928 }
921 929
diff --git a/drivers/mfd/ab3100-otp.c b/drivers/mfd/ab3100-otp.c
new file mode 100644
index 000000000000..0499b2031a2c
--- /dev/null
+++ b/drivers/mfd/ab3100-otp.c
@@ -0,0 +1,268 @@
1/*
2 * drivers/mfd/ab3100_otp.c
3 *
4 * Copyright (C) 2007-2009 ST-Ericsson AB
5 * License terms: GNU General Public License (GPL) version 2
6 * Driver to read out OTP from the AB3100 Mixed-signal circuit
7 * Author: Linus Walleij <linus.walleij@stericsson.com>
8 */
9
10#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/mfd/ab3100.h>
15#include <linux/debugfs.h>
16
17/* The OTP registers */
18#define AB3100_OTP0 0xb0
19#define AB3100_OTP1 0xb1
20#define AB3100_OTP2 0xb2
21#define AB3100_OTP3 0xb3
22#define AB3100_OTP4 0xb4
23#define AB3100_OTP5 0xb5
24#define AB3100_OTP6 0xb6
25#define AB3100_OTP7 0xb7
26#define AB3100_OTPP 0xbf
27
28/**
29 * struct ab3100_otp
30 * @dev containing device
31 * @ab3100 a pointer to the parent ab3100 device struct
32 * @locked whether the OTP is locked, after locking, no more bits
33 * can be changed but before locking it is still possible
34 * to change bits from 1->0.
35 * @freq clocking frequency for the OTP, this frequency is either
36 * 32768Hz or 1MHz/30
37 * @paf product activation flag, indicates whether this is a real
38 * product (paf true) or a lab board etc (paf false)
39 * @imeich if this is set it is possible to override the
40 * IMEI number found in the tac, fac and svn fields with
41 * (secured) software
42 * @cid customer ID
43 * @tac type allocation code of the IMEI
44 * @fac final assembly code of the IMEI
45 * @svn software version number of the IMEI
46 * @debugfs a debugfs file used when dumping to file
47 */
48struct ab3100_otp {
49 struct device *dev;
50 struct ab3100 *ab3100;
51 bool locked;
52 u32 freq;
53 bool paf;
54 bool imeich;
55 u16 cid:14;
56 u32 tac:20;
57 u8 fac;
58 u32 svn:20;
59 struct dentry *debugfs;
60};
61
62static int __init ab3100_otp_read(struct ab3100_otp *otp)
63{
64 struct ab3100 *ab = otp->ab3100;
65 u8 otpval[8];
66 u8 otpp;
67 int err;
68
69 err = ab3100_get_register_interruptible(ab, AB3100_OTPP, &otpp);
70 if (err) {
71 dev_err(otp->dev, "unable to read OTPP register\n");
72 return err;
73 }
74
75 err = ab3100_get_register_page_interruptible(ab, AB3100_OTP0,
76 otpval, 8);
77 if (err) {
78 dev_err(otp->dev, "unable to read OTP register page\n");
79 return err;
80 }
81
82 /* Cache OTP properties, they never change by nature */
83 otp->locked = (otpp & 0x80);
84 otp->freq = (otpp & 0x40) ? 32768 : 34100;
85 otp->paf = (otpval[1] & 0x80);
86 otp->imeich = (otpval[1] & 0x40);
87 otp->cid = ((otpval[1] << 8) | otpval[0]) & 0x3fff;
88 otp->tac = ((otpval[4] & 0x0f) << 16) | (otpval[3] << 8) | otpval[2];
89 otp->fac = ((otpval[5] & 0x0f) << 4) | (otpval[4] >> 4);
90 otp->svn = (otpval[7] << 12) | (otpval[6] << 4) | (otpval[5] >> 4);
91 return 0;
92}
93
94/*
95 * This is a simple debugfs human-readable file that dumps out
96 * the contents of the OTP.
97 */
98#ifdef CONFIG_DEBUGFS
99static int show_otp(struct seq_file *s, void *v)
100{
101 struct ab3100_otp *otp = s->private;
102 int err;
103
104 seq_printf(s, "OTP is %s\n", otp->locked ? "LOCKED" : "UNLOCKED");
105 seq_printf(s, "OTP clock switch startup is %uHz\n", otp->freq);
106 seq_printf(s, "PAF is %s\n", otp->paf ? "SET" : "NOT SET");
107 seq_printf(s, "IMEI is %s\n", otp->imeich ?
108 "CHANGEABLE" : "NOT CHANGEABLE");
109 seq_printf(s, "CID: 0x%04x (decimal: %d)\n", otp->cid, otp->cid);
110 seq_printf(s, "IMEI: %u-%u-%u\n", otp->tac, otp->fac, otp->svn);
111 return 0;
112}
113
114static int ab3100_otp_open(struct inode *inode, struct file *file)
115{
116 return single_open(file, ab3100_otp_show, inode->i_private);
117}
118
119static const struct file_operations ab3100_otp_operations = {
120 .open = ab3100_otp_open,
121 .read = seq_read,
122 .llseek = seq_lseek,
123 .release = single_release,
124};
125
126static int __init ab3100_otp_init_debugfs(struct device *dev,
127 struct ab3100_otp *otp)
128{
129 otp->debugfs = debugfs_create_file("ab3100_otp", S_IFREG | S_IRUGO,
130 NULL, otp,
131 &ab3100_otp_operations);
132 if (!otp->debugfs) {
133 dev_err(dev, "AB3100 debugfs OTP file registration failed!\n");
134 return err;
135 }
136}
137
138static void __exit ab3100_otp_exit_debugfs(struct ab3100_otp *otp)
139{
140 debugfs_remove_file(otp->debugfs);
141}
142#else
143/* Compile this out if debugfs not selected */
144static inline int __init ab3100_otp_init_debugfs(struct device *dev,
145 struct ab3100_otp *otp)
146{
147 return 0;
148}
149
150static inline void __exit ab3100_otp_exit_debugfs(struct ab3100_otp *otp)
151{
152}
153#endif
154
155#define SHOW_AB3100_ATTR(name) \
156static ssize_t ab3100_otp_##name##_show(struct device *dev, \
157 struct device_attribute *attr, \
158 char *buf) \
159{\
160 struct ab3100_otp *otp = dev_get_drvdata(dev); \
161 return sprintf(buf, "%u\n", otp->name); \
162}
163
164SHOW_AB3100_ATTR(locked)
165SHOW_AB3100_ATTR(freq)
166SHOW_AB3100_ATTR(paf)
167SHOW_AB3100_ATTR(imeich)
168SHOW_AB3100_ATTR(cid)
169SHOW_AB3100_ATTR(fac)
170SHOW_AB3100_ATTR(tac)
171SHOW_AB3100_ATTR(svn)
172
173static struct device_attribute ab3100_otp_attrs[] = {
174 __ATTR(locked, S_IRUGO, ab3100_otp_locked_show, NULL),
175 __ATTR(freq, S_IRUGO, ab3100_otp_freq_show, NULL),
176 __ATTR(paf, S_IRUGO, ab3100_otp_paf_show, NULL),
177 __ATTR(imeich, S_IRUGO, ab3100_otp_imeich_show, NULL),
178 __ATTR(cid, S_IRUGO, ab3100_otp_cid_show, NULL),
179 __ATTR(fac, S_IRUGO, ab3100_otp_fac_show, NULL),
180 __ATTR(tac, S_IRUGO, ab3100_otp_tac_show, NULL),
181 __ATTR(svn, S_IRUGO, ab3100_otp_svn_show, NULL),
182};
183
184static int __init ab3100_otp_probe(struct platform_device *pdev)
185{
186 struct ab3100_otp *otp;
187 int err = 0;
188 int i;
189
190 otp = kzalloc(sizeof(struct ab3100_otp), GFP_KERNEL);
191 if (!otp) {
192 dev_err(&pdev->dev, "could not allocate AB3100 OTP device\n");
193 return -ENOMEM;
194 }
195 otp->dev = &pdev->dev;
196
197 /* Replace platform data coming in with a local struct */
198 otp->ab3100 = platform_get_drvdata(pdev);
199 platform_set_drvdata(pdev, otp);
200
201 err = ab3100_otp_read(otp);
202 if (err)
203 return err;
204
205 dev_info(&pdev->dev, "AB3100 OTP readout registered\n");
206
207 /* sysfs entries */
208 for (i = 0; i < ARRAY_SIZE(ab3100_otp_attrs); i++) {
209 err = device_create_file(&pdev->dev,
210 &ab3100_otp_attrs[i]);
211 if (err)
212 goto out_no_sysfs;
213 }
214
215 /* debugfs entries */
216 err = ab3100_otp_init_debugfs(&pdev->dev, otp);
217 if (err)
218 goto out_no_debugfs;
219
220 return 0;
221
222out_no_sysfs:
223 for (i = 0; i < ARRAY_SIZE(ab3100_otp_attrs); i++)
224 device_remove_file(&pdev->dev,
225 &ab3100_otp_attrs[i]);
226out_no_debugfs:
227 kfree(otp);
228 return err;
229}
230
231static int __exit ab3100_otp_remove(struct platform_device *pdev)
232{
233 struct ab3100_otp *otp = platform_get_drvdata(pdev);
234 int i;
235
236 for (i = 0; i < ARRAY_SIZE(ab3100_otp_attrs); i++)
237 device_remove_file(&pdev->dev,
238 &ab3100_otp_attrs[i]);
239 ab3100_otp_exit_debugfs(otp);
240 kfree(otp);
241 return 0;
242}
243
244static struct platform_driver ab3100_otp_driver = {
245 .driver = {
246 .name = "ab3100-otp",
247 .owner = THIS_MODULE,
248 },
249 .remove = __exit_p(ab3100_otp_remove),
250};
251
252static int __init ab3100_otp_init(void)
253{
254 return platform_driver_probe(&ab3100_otp_driver,
255 ab3100_otp_probe);
256}
257
258static void __exit ab3100_otp_exit(void)
259{
260 platform_driver_unregister(&ab3100_otp_driver);
261}
262
263module_init(ab3100_otp_init);
264module_exit(ab3100_otp_exit);
265
266MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
267MODULE_DESCRIPTION("AB3100 OTP Readout Driver");
268MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/dm355evm_msp.c b/drivers/mfd/dm355evm_msp.c
index 5b6e58a3ba46..3d4a861976ca 100644
--- a/drivers/mfd/dm355evm_msp.c
+++ b/drivers/mfd/dm355evm_msp.c
@@ -107,8 +107,16 @@ static const u8 msp_gpios[] = {
107 MSP_GPIO(2, SWITCH1), MSP_GPIO(3, SWITCH1), 107 MSP_GPIO(2, SWITCH1), MSP_GPIO(3, SWITCH1),
108 MSP_GPIO(4, SWITCH1), 108 MSP_GPIO(4, SWITCH1),
109 /* switches on MMC/SD sockets */ 109 /* switches on MMC/SD sockets */
110 MSP_GPIO(1, SDMMC), MSP_GPIO(2, SDMMC), /* mmc0 WP, nCD */ 110 /*
111 MSP_GPIO(3, SDMMC), MSP_GPIO(4, SDMMC), /* mmc1 WP, nCD */ 111 * Note: EVMDM355_ECP_VA4.pdf suggests that Bit 2 and 4 should be
112 * checked for card detection. However on the EVM bit 1 and 3 gives
113 * this status, for 0 and 1 instance respectively. The pdf also
114 * suggests that Bit 1 and 3 should be checked for write protection.
115 * However on the EVM bit 2 and 4 gives this status,for 0 and 1
116 * instance respectively.
117 */
118 MSP_GPIO(2, SDMMC), MSP_GPIO(1, SDMMC), /* mmc0 WP, nCD */
119 MSP_GPIO(4, SDMMC), MSP_GPIO(3, SDMMC), /* mmc1 WP, nCD */
112}; 120};
113 121
114#define MSP_GPIO_REG(offset) (msp_gpios[(offset)] >> 3) 122#define MSP_GPIO_REG(offset) (msp_gpios[(offset)] >> 3)
diff --git a/drivers/mfd/ezx-pcap.c b/drivers/mfd/ezx-pcap.c
index c1de4afa89a6..016be4938e4c 100644
--- a/drivers/mfd/ezx-pcap.c
+++ b/drivers/mfd/ezx-pcap.c
@@ -17,6 +17,7 @@
17#include <linux/irq.h> 17#include <linux/irq.h>
18#include <linux/mfd/ezx-pcap.h> 18#include <linux/mfd/ezx-pcap.h>
19#include <linux/spi/spi.h> 19#include <linux/spi/spi.h>
20#include <linux/gpio.h>
20 21
21#define PCAP_ADC_MAXQ 8 22#define PCAP_ADC_MAXQ 8
22struct pcap_adc_request { 23struct pcap_adc_request {
@@ -106,11 +107,35 @@ int ezx_pcap_read(struct pcap_chip *pcap, u8 reg_num, u32 *value)
106} 107}
107EXPORT_SYMBOL_GPL(ezx_pcap_read); 108EXPORT_SYMBOL_GPL(ezx_pcap_read);
108 109
110int ezx_pcap_set_bits(struct pcap_chip *pcap, u8 reg_num, u32 mask, u32 val)
111{
112 int ret;
113 u32 tmp = PCAP_REGISTER_READ_OP_BIT |
114 (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
115
116 mutex_lock(&pcap->io_mutex);
117 ret = ezx_pcap_putget(pcap, &tmp);
118 if (ret)
119 goto out_unlock;
120
121 tmp &= (PCAP_REGISTER_VALUE_MASK & ~mask);
122 tmp |= (val & mask) | PCAP_REGISTER_WRITE_OP_BIT |
123 (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
124
125 ret = ezx_pcap_putget(pcap, &tmp);
126out_unlock:
127 mutex_unlock(&pcap->io_mutex);
128
129 return ret;
130}
131EXPORT_SYMBOL_GPL(ezx_pcap_set_bits);
132
109/* IRQ */ 133/* IRQ */
110static inline unsigned int irq2pcap(struct pcap_chip *pcap, int irq) 134int irq_to_pcap(struct pcap_chip *pcap, int irq)
111{ 135{
112 return 1 << (irq - pcap->irq_base); 136 return irq - pcap->irq_base;
113} 137}
138EXPORT_SYMBOL_GPL(irq_to_pcap);
114 139
115int pcap_to_irq(struct pcap_chip *pcap, int irq) 140int pcap_to_irq(struct pcap_chip *pcap, int irq)
116{ 141{
@@ -122,7 +147,7 @@ static void pcap_mask_irq(unsigned int irq)
122{ 147{
123 struct pcap_chip *pcap = get_irq_chip_data(irq); 148 struct pcap_chip *pcap = get_irq_chip_data(irq);
124 149
125 pcap->msr |= irq2pcap(pcap, irq); 150 pcap->msr |= 1 << irq_to_pcap(pcap, irq);
126 queue_work(pcap->workqueue, &pcap->msr_work); 151 queue_work(pcap->workqueue, &pcap->msr_work);
127} 152}
128 153
@@ -130,7 +155,7 @@ static void pcap_unmask_irq(unsigned int irq)
130{ 155{
131 struct pcap_chip *pcap = get_irq_chip_data(irq); 156 struct pcap_chip *pcap = get_irq_chip_data(irq);
132 157
133 pcap->msr &= ~irq2pcap(pcap, irq); 158 pcap->msr &= ~(1 << irq_to_pcap(pcap, irq));
134 queue_work(pcap->workqueue, &pcap->msr_work); 159 queue_work(pcap->workqueue, &pcap->msr_work);
135} 160}
136 161
@@ -154,34 +179,38 @@ static void pcap_isr_work(struct work_struct *work)
154 u32 msr, isr, int_sel, service; 179 u32 msr, isr, int_sel, service;
155 int irq; 180 int irq;
156 181
157 ezx_pcap_read(pcap, PCAP_REG_MSR, &msr); 182 do {
158 ezx_pcap_read(pcap, PCAP_REG_ISR, &isr); 183 ezx_pcap_read(pcap, PCAP_REG_MSR, &msr);
184 ezx_pcap_read(pcap, PCAP_REG_ISR, &isr);
159 185
160 /* We cant service/ack irqs that are assigned to port 2 */ 186 /* We cant service/ack irqs that are assigned to port 2 */
161 if (!(pdata->config & PCAP_SECOND_PORT)) { 187 if (!(pdata->config & PCAP_SECOND_PORT)) {
162 ezx_pcap_read(pcap, PCAP_REG_INT_SEL, &int_sel); 188 ezx_pcap_read(pcap, PCAP_REG_INT_SEL, &int_sel);
163 isr &= ~int_sel; 189 isr &= ~int_sel;
164 } 190 }
165 ezx_pcap_write(pcap, PCAP_REG_ISR, isr);
166 191
167 local_irq_disable(); 192 ezx_pcap_write(pcap, PCAP_REG_MSR, isr | msr);
168 service = isr & ~msr; 193 ezx_pcap_write(pcap, PCAP_REG_ISR, isr);
169 194
170 for (irq = pcap->irq_base; service; service >>= 1, irq++) { 195 local_irq_disable();
171 if (service & 1) { 196 service = isr & ~msr;
172 struct irq_desc *desc = irq_to_desc(irq); 197 for (irq = pcap->irq_base; service; service >>= 1, irq++) {
198 if (service & 1) {
199 struct irq_desc *desc = irq_to_desc(irq);
173 200
174 if (WARN(!desc, KERN_WARNING 201 if (WARN(!desc, KERN_WARNING
175 "Invalid PCAP IRQ %d\n", irq)) 202 "Invalid PCAP IRQ %d\n", irq))
176 break; 203 break;
177 204
178 if (desc->status & IRQ_DISABLED) 205 if (desc->status & IRQ_DISABLED)
179 note_interrupt(irq, desc, IRQ_NONE); 206 note_interrupt(irq, desc, IRQ_NONE);
180 else 207 else
181 desc->handle_irq(irq, desc); 208 desc->handle_irq(irq, desc);
209 }
182 } 210 }
183 } 211 local_irq_enable();
184 local_irq_enable(); 212 ezx_pcap_write(pcap, PCAP_REG_MSR, pcap->msr);
213 } while (gpio_get_value(irq_to_gpio(pcap->spi->irq)));
185} 214}
186 215
187static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc) 216static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc)
@@ -194,6 +223,19 @@ static void pcap_irq_handler(unsigned int irq, struct irq_desc *desc)
194} 223}
195 224
196/* ADC */ 225/* ADC */
226void pcap_set_ts_bits(struct pcap_chip *pcap, u32 bits)
227{
228 u32 tmp;
229
230 mutex_lock(&pcap->adc_mutex);
231 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
232 tmp &= ~(PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
233 tmp |= bits & (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
234 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
235 mutex_unlock(&pcap->adc_mutex);
236}
237EXPORT_SYMBOL_GPL(pcap_set_ts_bits);
238
197static void pcap_disable_adc(struct pcap_chip *pcap) 239static void pcap_disable_adc(struct pcap_chip *pcap)
198{ 240{
199 u32 tmp; 241 u32 tmp;
@@ -216,15 +258,16 @@ static void pcap_adc_trigger(struct pcap_chip *pcap)
216 mutex_unlock(&pcap->adc_mutex); 258 mutex_unlock(&pcap->adc_mutex);
217 return; 259 return;
218 } 260 }
219 mutex_unlock(&pcap->adc_mutex); 261 /* start conversion on requested bank, save TS_M bits */
220 262 ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp);
221 /* start conversion on requested bank */ 263 tmp &= (PCAP_ADC_TS_M_MASK | PCAP_ADC_TS_REF_LOWPWR);
222 tmp = pcap->adc_queue[head]->flags | PCAP_ADC_ADEN; 264 tmp |= pcap->adc_queue[head]->flags | PCAP_ADC_ADEN;
223 265
224 if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1) 266 if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1)
225 tmp |= PCAP_ADC_AD_SEL1; 267 tmp |= PCAP_ADC_AD_SEL1;
226 268
227 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp); 269 ezx_pcap_write(pcap, PCAP_REG_ADC, tmp);
270 mutex_unlock(&pcap->adc_mutex);
228 ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC); 271 ezx_pcap_write(pcap, PCAP_REG_ADR, PCAP_ADR_ASC);
229} 272}
230 273
@@ -499,7 +542,7 @@ static void __exit ezx_pcap_exit(void)
499 spi_unregister_driver(&ezxpcap_driver); 542 spi_unregister_driver(&ezxpcap_driver);
500} 543}
501 544
502module_init(ezx_pcap_init); 545subsys_initcall(ezx_pcap_init);
503module_exit(ezx_pcap_exit); 546module_exit(ezx_pcap_exit);
504 547
505MODULE_LICENSE("GPL"); 548MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/mc13783-core.c b/drivers/mfd/mc13783-core.c
new file mode 100644
index 000000000000..e354d2912ef1
--- /dev/null
+++ b/drivers/mfd/mc13783-core.c
@@ -0,0 +1,427 @@
1/*
2 * Copyright 2009 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
3 *
4 * This code is in parts based on wm8350-core.c and pcf50633-core.c
5 *
6 * Initial development of this code was funded by
7 * Phytec Messtechnik GmbH, http://www.phytec.de
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24#include <linux/mfd/mc13783-private.h>
25#include <linux/platform_device.h>
26#include <linux/mfd/mc13783.h>
27#include <linux/completion.h>
28#include <linux/interrupt.h>
29#include <linux/mfd/core.h>
30#include <linux/spi/spi.h>
31#include <linux/uaccess.h>
32#include <linux/kernel.h>
33#include <linux/module.h>
34#include <linux/init.h>
35#include <linux/slab.h>
36#include <linux/irq.h>
37
38#define MC13783_MAX_REG_NUM 0x3f
39#define MC13783_FRAME_MASK 0x00ffffff
40#define MC13783_MAX_REG_NUM 0x3f
41#define MC13783_REG_NUM_SHIFT 0x19
42#define MC13783_WRITE_BIT_SHIFT 31
43
44static inline int spi_rw(struct spi_device *spi, u8 * buf, size_t len)
45{
46 struct spi_transfer t = {
47 .tx_buf = (const void *)buf,
48 .rx_buf = buf,
49 .len = len,
50 .cs_change = 0,
51 .delay_usecs = 0,
52 };
53 struct spi_message m;
54
55 spi_message_init(&m);
56 spi_message_add_tail(&t, &m);
57 if (spi_sync(spi, &m) != 0 || m.status != 0)
58 return -EINVAL;
59 return len - m.actual_length;
60}
61
62static int mc13783_read(struct mc13783 *mc13783, int reg_num, u32 *reg_val)
63{
64 unsigned int frame = 0;
65 int ret = 0;
66
67 if (reg_num > MC13783_MAX_REG_NUM)
68 return -EINVAL;
69
70 frame |= reg_num << MC13783_REG_NUM_SHIFT;
71
72 ret = spi_rw(mc13783->spi_device, (u8 *)&frame, 4);
73
74 *reg_val = frame & MC13783_FRAME_MASK;
75
76 return ret;
77}
78
79static int mc13783_write(struct mc13783 *mc13783, int reg_num, u32 reg_val)
80{
81 unsigned int frame = 0;
82
83 if (reg_num > MC13783_MAX_REG_NUM)
84 return -EINVAL;
85
86 frame |= (1 << MC13783_WRITE_BIT_SHIFT);
87 frame |= reg_num << MC13783_REG_NUM_SHIFT;
88 frame |= reg_val & MC13783_FRAME_MASK;
89
90 return spi_rw(mc13783->spi_device, (u8 *)&frame, 4);
91}
92
93int mc13783_reg_read(struct mc13783 *mc13783, int reg_num, u32 *reg_val)
94{
95 int ret;
96
97 mutex_lock(&mc13783->io_lock);
98 ret = mc13783_read(mc13783, reg_num, reg_val);
99 mutex_unlock(&mc13783->io_lock);
100
101 return ret;
102}
103EXPORT_SYMBOL_GPL(mc13783_reg_read);
104
105int mc13783_reg_write(struct mc13783 *mc13783, int reg_num, u32 reg_val)
106{
107 int ret;
108
109 mutex_lock(&mc13783->io_lock);
110 ret = mc13783_write(mc13783, reg_num, reg_val);
111 mutex_unlock(&mc13783->io_lock);
112
113 return ret;
114}
115EXPORT_SYMBOL_GPL(mc13783_reg_write);
116
117/**
118 * mc13783_set_bits - Bitmask write
119 *
120 * @mc13783: Pointer to mc13783 control structure
121 * @reg: Register to access
122 * @mask: Mask of bits to change
123 * @val: Value to set for masked bits
124 */
125int mc13783_set_bits(struct mc13783 *mc13783, int reg, u32 mask, u32 val)
126{
127 u32 tmp;
128 int ret;
129
130 mutex_lock(&mc13783->io_lock);
131
132 ret = mc13783_read(mc13783, reg, &tmp);
133 tmp = (tmp & ~mask) | val;
134 if (ret == 0)
135 ret = mc13783_write(mc13783, reg, tmp);
136
137 mutex_unlock(&mc13783->io_lock);
138
139 return ret;
140}
141EXPORT_SYMBOL_GPL(mc13783_set_bits);
142
143int mc13783_register_irq(struct mc13783 *mc13783, int irq,
144 void (*handler) (int, void *), void *data)
145{
146 if (irq < 0 || irq > MC13783_NUM_IRQ || !handler)
147 return -EINVAL;
148
149 if (WARN_ON(mc13783->irq_handler[irq].handler))
150 return -EBUSY;
151
152 mutex_lock(&mc13783->io_lock);
153 mc13783->irq_handler[irq].handler = handler;
154 mc13783->irq_handler[irq].data = data;
155 mutex_unlock(&mc13783->io_lock);
156
157 return 0;
158}
159EXPORT_SYMBOL_GPL(mc13783_register_irq);
160
161int mc13783_free_irq(struct mc13783 *mc13783, int irq)
162{
163 if (irq < 0 || irq > MC13783_NUM_IRQ)
164 return -EINVAL;
165
166 mutex_lock(&mc13783->io_lock);
167 mc13783->irq_handler[irq].handler = NULL;
168 mutex_unlock(&mc13783->io_lock);
169
170 return 0;
171}
172EXPORT_SYMBOL_GPL(mc13783_free_irq);
173
174static void mc13783_irq_work(struct work_struct *work)
175{
176 struct mc13783 *mc13783 = container_of(work, struct mc13783, work);
177 int i;
178 unsigned int adc_sts;
179
180 /* check if the adc has finished any completion */
181 mc13783_reg_read(mc13783, MC13783_REG_INTERRUPT_STATUS_0, &adc_sts);
182 mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_STATUS_0,
183 adc_sts & MC13783_INT_STAT_ADCDONEI);
184
185 if (adc_sts & MC13783_INT_STAT_ADCDONEI)
186 complete_all(&mc13783->adc_done);
187
188 for (i = 0; i < MC13783_NUM_IRQ; i++)
189 if (mc13783->irq_handler[i].handler)
190 mc13783->irq_handler[i].handler(i,
191 mc13783->irq_handler[i].data);
192 enable_irq(mc13783->irq);
193}
194
195static irqreturn_t mc13783_interrupt(int irq, void *dev_id)
196{
197 struct mc13783 *mc13783 = dev_id;
198
199 disable_irq_nosync(irq);
200
201 schedule_work(&mc13783->work);
202 return IRQ_HANDLED;
203}
204
205/* set adc to ts interrupt mode, which generates touchscreen wakeup interrupt */
206static inline void mc13783_adc_set_ts_irq_mode(struct mc13783 *mc13783)
207{
208 unsigned int reg_adc0, reg_adc1;
209
210 reg_adc0 = MC13783_ADC0_ADREFEN | MC13783_ADC0_ADREFMODE
211 | MC13783_ADC0_TSMOD0;
212 reg_adc1 = MC13783_ADC1_ADEN | MC13783_ADC1_ADTRIGIGN;
213
214 mc13783_reg_write(mc13783, MC13783_REG_ADC_0, reg_adc0);
215 mc13783_reg_write(mc13783, MC13783_REG_ADC_1, reg_adc1);
216}
217
218int mc13783_adc_do_conversion(struct mc13783 *mc13783, unsigned int mode,
219 unsigned int channel, unsigned int *sample)
220{
221 unsigned int reg_adc0, reg_adc1;
222 int i;
223
224 mutex_lock(&mc13783->adc_conv_lock);
225
226 /* set up auto incrementing anyway to make quick read */
227 reg_adc0 = MC13783_ADC0_ADINC1 | MC13783_ADC0_ADINC2;
228 /* enable the adc, ignore external triggering and set ASC to trigger
229 * conversion */
230 reg_adc1 = MC13783_ADC1_ADEN | MC13783_ADC1_ADTRIGIGN
231 | MC13783_ADC1_ASC;
232
233 /* setup channel number */
234 if (channel > 7)
235 reg_adc1 |= MC13783_ADC1_ADSEL;
236
237 switch (mode) {
238 case MC13783_ADC_MODE_TS:
239 /* enables touch screen reference mode and set touchscreen mode
240 * to position mode */
241 reg_adc0 |= MC13783_ADC0_ADREFEN | MC13783_ADC0_ADREFMODE
242 | MC13783_ADC0_TSMOD0 | MC13783_ADC0_TSMOD1;
243 reg_adc1 |= 4 << MC13783_ADC1_CHAN1_SHIFT;
244 break;
245 case MC13783_ADC_MODE_SINGLE_CHAN:
246 reg_adc1 |= (channel & 0x7) << MC13783_ADC1_CHAN0_SHIFT;
247 reg_adc1 |= MC13783_ADC1_RAND;
248 break;
249 case MC13783_ADC_MODE_MULT_CHAN:
250 reg_adc1 |= 4 << MC13783_ADC1_CHAN1_SHIFT;
251 break;
252 default:
253 return -EINVAL;
254 }
255
256 mc13783_reg_write(mc13783, MC13783_REG_ADC_0, reg_adc0);
257 mc13783_reg_write(mc13783, MC13783_REG_ADC_1, reg_adc1);
258
259 wait_for_completion_interruptible(&mc13783->adc_done);
260
261 for (i = 0; i < 4; i++)
262 mc13783_reg_read(mc13783, MC13783_REG_ADC_2, &sample[i]);
263
264 if (mc13783->ts_active)
265 mc13783_adc_set_ts_irq_mode(mc13783);
266
267 mutex_unlock(&mc13783->adc_conv_lock);
268
269 return 0;
270}
271EXPORT_SYMBOL_GPL(mc13783_adc_do_conversion);
272
273void mc13783_adc_set_ts_status(struct mc13783 *mc13783, unsigned int status)
274{
275 mc13783->ts_active = status;
276}
277EXPORT_SYMBOL_GPL(mc13783_adc_set_ts_status);
278
279static int mc13783_check_revision(struct mc13783 *mc13783)
280{
281 u32 rev_id, rev1, rev2, finid, icid;
282
283 mc13783_read(mc13783, MC13783_REG_REVISION, &rev_id);
284
285 rev1 = (rev_id & 0x018) >> 3;
286 rev2 = (rev_id & 0x007);
287 icid = (rev_id & 0x01C0) >> 6;
288 finid = (rev_id & 0x01E00) >> 9;
289
290 /* Ver 0.2 is actually 3.2a. Report as 3.2 */
291 if ((rev1 == 0) && (rev2 == 2))
292 rev1 = 3;
293
294 if (rev1 == 0 || icid != 2) {
295 dev_err(mc13783->dev, "No MC13783 detected.\n");
296 return -ENODEV;
297 }
298
299 mc13783->revision = ((rev1 * 10) + rev2);
300 dev_info(mc13783->dev, "MC13783 Rev %d.%d FinVer %x detected\n", rev1,
301 rev2, finid);
302
303 return 0;
304}
305
306/*
307 * Register a client device. This is non-fatal since there is no need to
308 * fail the entire device init due to a single platform device failing.
309 */
310static void mc13783_client_dev_register(struct mc13783 *mc13783,
311 const char *name)
312{
313 struct mfd_cell cell = {};
314
315 cell.name = name;
316
317 mfd_add_devices(mc13783->dev, -1, &cell, 1, NULL, 0);
318}
319
320static int __devinit mc13783_probe(struct spi_device *spi)
321{
322 struct mc13783 *mc13783;
323 struct mc13783_platform_data *pdata = spi->dev.platform_data;
324 int ret;
325
326 mc13783 = kzalloc(sizeof(struct mc13783), GFP_KERNEL);
327 if (!mc13783)
328 return -ENOMEM;
329
330 dev_set_drvdata(&spi->dev, mc13783);
331 spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
332 spi->bits_per_word = 32;
333 spi_setup(spi);
334
335 mc13783->spi_device = spi;
336 mc13783->dev = &spi->dev;
337 mc13783->irq = spi->irq;
338
339 INIT_WORK(&mc13783->work, mc13783_irq_work);
340 mutex_init(&mc13783->io_lock);
341 mutex_init(&mc13783->adc_conv_lock);
342 init_completion(&mc13783->adc_done);
343
344 if (pdata) {
345 mc13783->flags = pdata->flags;
346 mc13783->regulators = pdata->regulators;
347 mc13783->num_regulators = pdata->num_regulators;
348 }
349
350 if (mc13783_check_revision(mc13783)) {
351 ret = -ENODEV;
352 goto err_out;
353 }
354
355 /* clear and mask all interrupts */
356 mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_STATUS_0, 0x00ffffff);
357 mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_MASK_0, 0x00ffffff);
358 mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_STATUS_1, 0x00ffffff);
359 mc13783_reg_write(mc13783, MC13783_REG_INTERRUPT_MASK_1, 0x00ffffff);
360
361 /* unmask adcdone interrupts */
362 mc13783_set_bits(mc13783, MC13783_REG_INTERRUPT_MASK_0,
363 MC13783_INT_MASK_ADCDONEM, 0);
364
365 ret = request_irq(mc13783->irq, mc13783_interrupt,
366 IRQF_DISABLED | IRQF_TRIGGER_HIGH, "mc13783",
367 mc13783);
368 if (ret)
369 goto err_out;
370
371 if (mc13783->flags & MC13783_USE_CODEC)
372 mc13783_client_dev_register(mc13783, "mc13783-codec");
373 if (mc13783->flags & MC13783_USE_ADC)
374 mc13783_client_dev_register(mc13783, "mc13783-adc");
375 if (mc13783->flags & MC13783_USE_RTC)
376 mc13783_client_dev_register(mc13783, "mc13783-rtc");
377 if (mc13783->flags & MC13783_USE_REGULATOR)
378 mc13783_client_dev_register(mc13783, "mc13783-regulator");
379 if (mc13783->flags & MC13783_USE_TOUCHSCREEN)
380 mc13783_client_dev_register(mc13783, "mc13783-ts");
381
382 return 0;
383
384err_out:
385 kfree(mc13783);
386 return ret;
387}
388
389static int __devexit mc13783_remove(struct spi_device *spi)
390{
391 struct mc13783 *mc13783;
392
393 mc13783 = dev_get_drvdata(&spi->dev);
394
395 free_irq(mc13783->irq, mc13783);
396
397 mfd_remove_devices(&spi->dev);
398
399 return 0;
400}
401
402static struct spi_driver pmic_driver = {
403 .driver = {
404 .name = "mc13783",
405 .bus = &spi_bus_type,
406 .owner = THIS_MODULE,
407 },
408 .probe = mc13783_probe,
409 .remove = __devexit_p(mc13783_remove),
410};
411
412static int __init pmic_init(void)
413{
414 return spi_register_driver(&pmic_driver);
415}
416subsys_initcall(pmic_init);
417
418static void __exit pmic_exit(void)
419{
420 spi_unregister_driver(&pmic_driver);
421}
422module_exit(pmic_exit);
423
424MODULE_DESCRIPTION("Core/Protocol driver for Freescale MC13783 PMIC");
425MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
426MODULE_LICENSE("GPL");
427
diff --git a/drivers/mfd/mfd-core.c b/drivers/mfd/mfd-core.c
index 54ddf3772e0c..ae15e495e20e 100644
--- a/drivers/mfd/mfd-core.c
+++ b/drivers/mfd/mfd-core.c
@@ -25,7 +25,7 @@ static int mfd_add_device(struct device *parent, int id,
25 int ret = -ENOMEM; 25 int ret = -ENOMEM;
26 int r; 26 int r;
27 27
28 pdev = platform_device_alloc(cell->name, id); 28 pdev = platform_device_alloc(cell->name, id + cell->id);
29 if (!pdev) 29 if (!pdev)
30 goto fail_alloc; 30 goto fail_alloc;
31 31
diff --git a/drivers/mfd/pcf50633-adc.c b/drivers/mfd/pcf50633-adc.c
index c2d05becfa97..3d31e97d6a45 100644
--- a/drivers/mfd/pcf50633-adc.c
+++ b/drivers/mfd/pcf50633-adc.c
@@ -73,15 +73,10 @@ static void trigger_next_adc_job_if_any(struct pcf50633 *pcf)
73 struct pcf50633_adc *adc = __to_adc(pcf); 73 struct pcf50633_adc *adc = __to_adc(pcf);
74 int head; 74 int head;
75 75
76 mutex_lock(&adc->queue_mutex);
77
78 head = adc->queue_head; 76 head = adc->queue_head;
79 77
80 if (!adc->queue[head]) { 78 if (!adc->queue[head])
81 mutex_unlock(&adc->queue_mutex);
82 return; 79 return;
83 }
84 mutex_unlock(&adc->queue_mutex);
85 80
86 adc_setup(pcf, adc->queue[head]->mux, adc->queue[head]->avg); 81 adc_setup(pcf, adc->queue[head]->mux, adc->queue[head]->avg);
87} 82}
@@ -99,16 +94,17 @@ adc_enqueue_request(struct pcf50633 *pcf, struct pcf50633_adc_request *req)
99 94
100 if (adc->queue[tail]) { 95 if (adc->queue[tail]) {
101 mutex_unlock(&adc->queue_mutex); 96 mutex_unlock(&adc->queue_mutex);
97 dev_err(pcf->dev, "ADC queue is full, dropping request\n");
102 return -EBUSY; 98 return -EBUSY;
103 } 99 }
104 100
105 adc->queue[tail] = req; 101 adc->queue[tail] = req;
102 if (head == tail)
103 trigger_next_adc_job_if_any(pcf);
106 adc->queue_tail = (tail + 1) & (PCF50633_MAX_ADC_FIFO_DEPTH - 1); 104 adc->queue_tail = (tail + 1) & (PCF50633_MAX_ADC_FIFO_DEPTH - 1);
107 105
108 mutex_unlock(&adc->queue_mutex); 106 mutex_unlock(&adc->queue_mutex);
109 107
110 trigger_next_adc_job_if_any(pcf);
111
112 return 0; 108 return 0;
113} 109}
114 110
@@ -124,6 +120,7 @@ pcf50633_adc_sync_read_callback(struct pcf50633 *pcf, void *param, int result)
124int pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg) 120int pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg)
125{ 121{
126 struct pcf50633_adc_request *req; 122 struct pcf50633_adc_request *req;
123 int err;
127 124
128 /* req is freed when the result is ready, in interrupt handler */ 125 /* req is freed when the result is ready, in interrupt handler */
129 req = kzalloc(sizeof(*req), GFP_KERNEL); 126 req = kzalloc(sizeof(*req), GFP_KERNEL);
@@ -136,9 +133,13 @@ int pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg)
136 req->callback_param = req; 133 req->callback_param = req;
137 134
138 init_completion(&req->completion); 135 init_completion(&req->completion);
139 adc_enqueue_request(pcf, req); 136 err = adc_enqueue_request(pcf, req);
137 if (err)
138 return err;
139
140 wait_for_completion(&req->completion); 140 wait_for_completion(&req->completion);
141 141
142 /* FIXME by this time req might be already freed */
142 return req->result; 143 return req->result;
143} 144}
144EXPORT_SYMBOL_GPL(pcf50633_adc_sync_read); 145EXPORT_SYMBOL_GPL(pcf50633_adc_sync_read);
@@ -159,9 +160,7 @@ int pcf50633_adc_async_read(struct pcf50633 *pcf, int mux, int avg,
159 req->callback = callback; 160 req->callback = callback;
160 req->callback_param = callback_param; 161 req->callback_param = callback_param;
161 162
162 adc_enqueue_request(pcf, req); 163 return adc_enqueue_request(pcf, req);
163
164 return 0;
165} 164}
166EXPORT_SYMBOL_GPL(pcf50633_adc_async_read); 165EXPORT_SYMBOL_GPL(pcf50633_adc_async_read);
167 166
@@ -184,7 +183,7 @@ static void pcf50633_adc_irq(int irq, void *data)
184 struct pcf50633_adc *adc = data; 183 struct pcf50633_adc *adc = data;
185 struct pcf50633 *pcf = adc->pcf; 184 struct pcf50633 *pcf = adc->pcf;
186 struct pcf50633_adc_request *req; 185 struct pcf50633_adc_request *req;
187 int head; 186 int head, res;
188 187
189 mutex_lock(&adc->queue_mutex); 188 mutex_lock(&adc->queue_mutex);
190 head = adc->queue_head; 189 head = adc->queue_head;
@@ -199,12 +198,13 @@ static void pcf50633_adc_irq(int irq, void *data)
199 adc->queue_head = (head + 1) & 198 adc->queue_head = (head + 1) &
200 (PCF50633_MAX_ADC_FIFO_DEPTH - 1); 199 (PCF50633_MAX_ADC_FIFO_DEPTH - 1);
201 200
201 res = adc_result(pcf);
202 trigger_next_adc_job_if_any(pcf);
203
202 mutex_unlock(&adc->queue_mutex); 204 mutex_unlock(&adc->queue_mutex);
203 205
204 req->callback(pcf, req->callback_param, adc_result(pcf)); 206 req->callback(pcf, req->callback_param, res);
205 kfree(req); 207 kfree(req);
206
207 trigger_next_adc_job_if_any(pcf);
208} 208}
209 209
210static int __devinit pcf50633_adc_probe(struct platform_device *pdev) 210static int __devinit pcf50633_adc_probe(struct platform_device *pdev)
diff --git a/drivers/mfd/pcf50633-core.c b/drivers/mfd/pcf50633-core.c
index 8d3c38bf9714..d26d7747175e 100644
--- a/drivers/mfd/pcf50633-core.c
+++ b/drivers/mfd/pcf50633-core.c
@@ -444,7 +444,7 @@ static irqreturn_t pcf50633_irq(int irq, void *data)
444 444
445 get_device(pcf->dev); 445 get_device(pcf->dev);
446 disable_irq_nosync(pcf->irq); 446 disable_irq_nosync(pcf->irq);
447 schedule_work(&pcf->irq_work); 447 queue_work(pcf->work_queue, &pcf->irq_work);
448 448
449 return IRQ_HANDLED; 449 return IRQ_HANDLED;
450} 450}
@@ -575,6 +575,7 @@ static int __devinit pcf50633_probe(struct i2c_client *client,
575 pcf->dev = &client->dev; 575 pcf->dev = &client->dev;
576 pcf->i2c_client = client; 576 pcf->i2c_client = client;
577 pcf->irq = client->irq; 577 pcf->irq = client->irq;
578 pcf->work_queue = create_singlethread_workqueue("pcf50633");
578 579
579 INIT_WORK(&pcf->irq_work, pcf50633_irq_worker); 580 INIT_WORK(&pcf->irq_work, pcf50633_irq_worker);
580 581
@@ -651,6 +652,7 @@ static int __devinit pcf50633_probe(struct i2c_client *client,
651 return 0; 652 return 0;
652 653
653err: 654err:
655 destroy_workqueue(pcf->work_queue);
654 kfree(pcf); 656 kfree(pcf);
655 return ret; 657 return ret;
656} 658}
@@ -661,6 +663,7 @@ static int __devexit pcf50633_remove(struct i2c_client *client)
661 int i; 663 int i;
662 664
663 free_irq(pcf->irq, pcf); 665 free_irq(pcf->irq, pcf);
666 destroy_workqueue(pcf->work_queue);
664 667
665 platform_device_unregister(pcf->input_pdev); 668 platform_device_unregister(pcf->input_pdev);
666 platform_device_unregister(pcf->rtc_pdev); 669 platform_device_unregister(pcf->rtc_pdev);
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c
index ca54996ffd0e..e424cf6d8e9e 100644
--- a/drivers/mfd/twl4030-core.c
+++ b/drivers/mfd/twl4030-core.c
@@ -89,6 +89,12 @@
89#define twl_has_madc() false 89#define twl_has_madc() false
90#endif 90#endif
91 91
92#ifdef CONFIG_TWL4030_POWER
93#define twl_has_power() true
94#else
95#define twl_has_power() false
96#endif
97
92#if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE) 98#if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE)
93#define twl_has_rtc() true 99#define twl_has_rtc() true
94#else 100#else
@@ -115,6 +121,12 @@
115 121
116#define TWL4030_NUM_SLAVES 4 122#define TWL4030_NUM_SLAVES 4
117 123
124#if defined(CONFIG_INPUT_TWL4030_PWRBUTTON) \
125 || defined(CONFIG_INPUT_TWL4030_PWBUTTON_MODULE)
126#define twl_has_pwrbutton() true
127#else
128#define twl_has_pwrbutton() false
129#endif
118 130
119/* Base Address defns for twl4030_map[] */ 131/* Base Address defns for twl4030_map[] */
120 132
@@ -538,6 +550,13 @@ add_children(struct twl4030_platform_data *pdata, unsigned long features)
538 return PTR_ERR(child); 550 return PTR_ERR(child);
539 } 551 }
540 552
553 if (twl_has_pwrbutton()) {
554 child = add_child(1, "twl4030_pwrbutton",
555 NULL, 0, true, pdata->irq_base + 8 + 0, 0);
556 if (IS_ERR(child))
557 return PTR_ERR(child);
558 }
559
541 if (twl_has_regulator()) { 560 if (twl_has_regulator()) {
542 /* 561 /*
543 child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1); 562 child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1);
@@ -788,6 +807,10 @@ twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id)
788 /* setup clock framework */ 807 /* setup clock framework */
789 clocks_init(&client->dev); 808 clocks_init(&client->dev);
790 809
810 /* load power event scripts */
811 if (twl_has_power() && pdata->power)
812 twl4030_power_init(pdata->power);
813
791 /* Maybe init the T2 Interrupt subsystem */ 814 /* Maybe init the T2 Interrupt subsystem */
792 if (client->irq 815 if (client->irq
793 && pdata->irq_base 816 && pdata->irq_base
diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c
index 7d430835655f..fb194fe244c1 100644
--- a/drivers/mfd/twl4030-irq.c
+++ b/drivers/mfd/twl4030-irq.c
@@ -424,7 +424,7 @@ static void twl4030_sih_do_edge(struct work_struct *work)
424 /* see what work we have */ 424 /* see what work we have */
425 spin_lock_irq(&sih_agent_lock); 425 spin_lock_irq(&sih_agent_lock);
426 edge_change = agent->edge_change; 426 edge_change = agent->edge_change;
427 agent->edge_change = 0;; 427 agent->edge_change = 0;
428 sih = edge_change ? agent->sih : NULL; 428 sih = edge_change ? agent->sih : NULL;
429 spin_unlock_irq(&sih_agent_lock); 429 spin_unlock_irq(&sih_agent_lock);
430 if (!sih) 430 if (!sih)
diff --git a/drivers/mfd/twl4030-power.c b/drivers/mfd/twl4030-power.c
new file mode 100644
index 000000000000..d423e0c4176b
--- /dev/null
+++ b/drivers/mfd/twl4030-power.c
@@ -0,0 +1,472 @@
1/*
2 * linux/drivers/i2c/chips/twl4030-power.c
3 *
4 * Handle TWL4030 Power initialization
5 *
6 * Copyright (C) 2008 Nokia Corporation
7 * Copyright (C) 2006 Texas Instruments, Inc
8 *
9 * Written by Kalle Jokiniemi
10 * Peter De Schrijver <peter.de-schrijver@nokia.com>
11 * Several fixes by Amit Kucheria <amit.kucheria@verdurent.com>
12 *
13 * This file is subject to the terms and conditions of the GNU General
14 * Public License. See the file "COPYING" in the main directory of this
15 * archive for more details.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27#include <linux/module.h>
28#include <linux/pm.h>
29#include <linux/i2c/twl4030.h>
30#include <linux/platform_device.h>
31
32#include <asm/mach-types.h>
33
34static u8 twl4030_start_script_address = 0x2b;
35
36#define PWR_P1_SW_EVENTS 0x10
37#define PWR_DEVOFF (1<<0)
38
39#define PHY_TO_OFF_PM_MASTER(p) (p - 0x36)
40#define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b)
41
42/* resource - hfclk */
43#define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6)
44
45/* PM events */
46#define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46)
47#define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47)
48#define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48)
49#define R_CFG_P1_TRANSITION PHY_TO_OFF_PM_MASTER(0x36)
50#define R_CFG_P2_TRANSITION PHY_TO_OFF_PM_MASTER(0x37)
51#define R_CFG_P3_TRANSITION PHY_TO_OFF_PM_MASTER(0x38)
52
53#define LVL_WAKEUP 0x08
54
55#define ENABLE_WARMRESET (1<<4)
56
57#define END_OF_SCRIPT 0x3f
58
59#define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55)
60#define R_SEQ_ADD_S2A12 PHY_TO_OFF_PM_MASTER(0x56)
61#define R_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57)
62#define R_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58)
63#define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59)
64#define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a)
65
66#define R_PROTECT_KEY 0x0E
67#define R_KEY_1 0xC0
68#define R_KEY_2 0x0C
69
70/* resource configuration registers */
71
72#define DEVGROUP_OFFSET 0
73#define TYPE_OFFSET 1
74
75/* Bit positions */
76#define DEVGROUP_SHIFT 5
77#define DEVGROUP_MASK (7 << DEVGROUP_SHIFT)
78#define TYPE_SHIFT 0
79#define TYPE_MASK (7 << TYPE_SHIFT)
80#define TYPE2_SHIFT 3
81#define TYPE2_MASK (3 << TYPE2_SHIFT)
82
83static u8 res_config_addrs[] = {
84 [RES_VAUX1] = 0x17,
85 [RES_VAUX2] = 0x1b,
86 [RES_VAUX3] = 0x1f,
87 [RES_VAUX4] = 0x23,
88 [RES_VMMC1] = 0x27,
89 [RES_VMMC2] = 0x2b,
90 [RES_VPLL1] = 0x2f,
91 [RES_VPLL2] = 0x33,
92 [RES_VSIM] = 0x37,
93 [RES_VDAC] = 0x3b,
94 [RES_VINTANA1] = 0x3f,
95 [RES_VINTANA2] = 0x43,
96 [RES_VINTDIG] = 0x47,
97 [RES_VIO] = 0x4b,
98 [RES_VDD1] = 0x55,
99 [RES_VDD2] = 0x63,
100 [RES_VUSB_1V5] = 0x71,
101 [RES_VUSB_1V8] = 0x74,
102 [RES_VUSB_3V1] = 0x77,
103 [RES_VUSBCP] = 0x7a,
104 [RES_REGEN] = 0x7f,
105 [RES_NRES_PWRON] = 0x82,
106 [RES_CLKEN] = 0x85,
107 [RES_SYSEN] = 0x88,
108 [RES_HFCLKOUT] = 0x8b,
109 [RES_32KCLKOUT] = 0x8e,
110 [RES_RESET] = 0x91,
111 [RES_Main_Ref] = 0x94,
112};
113
114static int __init twl4030_write_script_byte(u8 address, u8 byte)
115{
116 int err;
117
118 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
119 R_MEMORY_ADDRESS);
120 if (err)
121 goto out;
122 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, byte,
123 R_MEMORY_DATA);
124out:
125 return err;
126}
127
128static int __init twl4030_write_script_ins(u8 address, u16 pmb_message,
129 u8 delay, u8 next)
130{
131 int err;
132
133 address *= 4;
134 err = twl4030_write_script_byte(address++, pmb_message >> 8);
135 if (err)
136 goto out;
137 err = twl4030_write_script_byte(address++, pmb_message & 0xff);
138 if (err)
139 goto out;
140 err = twl4030_write_script_byte(address++, delay);
141 if (err)
142 goto out;
143 err = twl4030_write_script_byte(address++, next);
144out:
145 return err;
146}
147
148static int __init twl4030_write_script(u8 address, struct twl4030_ins *script,
149 int len)
150{
151 int err;
152
153 for (; len; len--, address++, script++) {
154 if (len == 1) {
155 err = twl4030_write_script_ins(address,
156 script->pmb_message,
157 script->delay,
158 END_OF_SCRIPT);
159 if (err)
160 break;
161 } else {
162 err = twl4030_write_script_ins(address,
163 script->pmb_message,
164 script->delay,
165 address + 1);
166 if (err)
167 break;
168 }
169 }
170 return err;
171}
172
173static int __init twl4030_config_wakeup3_sequence(u8 address)
174{
175 int err;
176 u8 data;
177
178 /* Set SLEEP to ACTIVE SEQ address for P3 */
179 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
180 R_SEQ_ADD_S2A3);
181 if (err)
182 goto out;
183
184 /* P3 LVL_WAKEUP should be on LEVEL */
185 err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data,
186 R_P3_SW_EVENTS);
187 if (err)
188 goto out;
189 data |= LVL_WAKEUP;
190 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data,
191 R_P3_SW_EVENTS);
192out:
193 if (err)
194 pr_err("TWL4030 wakeup sequence for P3 config error\n");
195 return err;
196}
197
198static int __init twl4030_config_wakeup12_sequence(u8 address)
199{
200 int err = 0;
201 u8 data;
202
203 /* Set SLEEP to ACTIVE SEQ address for P1 and P2 */
204 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
205 R_SEQ_ADD_S2A12);
206 if (err)
207 goto out;
208
209 /* P1/P2 LVL_WAKEUP should be on LEVEL */
210 err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data,
211 R_P1_SW_EVENTS);
212 if (err)
213 goto out;
214
215 data |= LVL_WAKEUP;
216 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data,
217 R_P1_SW_EVENTS);
218 if (err)
219 goto out;
220
221 err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data,
222 R_P2_SW_EVENTS);
223 if (err)
224 goto out;
225
226 data |= LVL_WAKEUP;
227 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data,
228 R_P2_SW_EVENTS);
229 if (err)
230 goto out;
231
232 if (machine_is_omap_3430sdp() || machine_is_omap_ldp()) {
233 /* Disabling AC charger effect on sleep-active transitions */
234 err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &data,
235 R_CFG_P1_TRANSITION);
236 if (err)
237 goto out;
238 data &= ~(1<<1);
239 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, data ,
240 R_CFG_P1_TRANSITION);
241 if (err)
242 goto out;
243 }
244
245out:
246 if (err)
247 pr_err("TWL4030 wakeup sequence for P1 and P2" \
248 "config error\n");
249 return err;
250}
251
252static int __init twl4030_config_sleep_sequence(u8 address)
253{
254 int err;
255
256 /* Set ACTIVE to SLEEP SEQ address in T2 memory*/
257 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
258 R_SEQ_ADD_A2S);
259
260 if (err)
261 pr_err("TWL4030 sleep sequence config error\n");
262
263 return err;
264}
265
266static int __init twl4030_config_warmreset_sequence(u8 address)
267{
268 int err;
269 u8 rd_data;
270
271 /* Set WARM RESET SEQ address for P1 */
272 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, address,
273 R_SEQ_ADD_WARM);
274 if (err)
275 goto out;
276
277 /* P1/P2/P3 enable WARMRESET */
278 err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &rd_data,
279 R_P1_SW_EVENTS);
280 if (err)
281 goto out;
282
283 rd_data |= ENABLE_WARMRESET;
284 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, rd_data,
285 R_P1_SW_EVENTS);
286 if (err)
287 goto out;
288
289 err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &rd_data,
290 R_P2_SW_EVENTS);
291 if (err)
292 goto out;
293
294 rd_data |= ENABLE_WARMRESET;
295 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, rd_data,
296 R_P2_SW_EVENTS);
297 if (err)
298 goto out;
299
300 err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_MASTER, &rd_data,
301 R_P3_SW_EVENTS);
302 if (err)
303 goto out;
304
305 rd_data |= ENABLE_WARMRESET;
306 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, rd_data,
307 R_P3_SW_EVENTS);
308out:
309 if (err)
310 pr_err("TWL4030 warmreset seq config error\n");
311 return err;
312}
313
314static int __init twl4030_configure_resource(struct twl4030_resconfig *rconfig)
315{
316 int rconfig_addr;
317 int err;
318 u8 type;
319 u8 grp;
320
321 if (rconfig->resource > TOTAL_RESOURCES) {
322 pr_err("TWL4030 Resource %d does not exist\n",
323 rconfig->resource);
324 return -EINVAL;
325 }
326
327 rconfig_addr = res_config_addrs[rconfig->resource];
328
329 /* Set resource group */
330 err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &grp,
331 rconfig_addr + DEVGROUP_OFFSET);
332 if (err) {
333 pr_err("TWL4030 Resource %d group could not be read\n",
334 rconfig->resource);
335 return err;
336 }
337
338 if (rconfig->devgroup >= 0) {
339 grp &= ~DEVGROUP_MASK;
340 grp |= rconfig->devgroup << DEVGROUP_SHIFT;
341 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
342 grp, rconfig_addr + DEVGROUP_OFFSET);
343 if (err < 0) {
344 pr_err("TWL4030 failed to program devgroup\n");
345 return err;
346 }
347 }
348
349 /* Set resource types */
350 err = twl4030_i2c_read_u8(TWL4030_MODULE_PM_RECEIVER, &type,
351 rconfig_addr + TYPE_OFFSET);
352 if (err < 0) {
353 pr_err("TWL4030 Resource %d type could not be read\n",
354 rconfig->resource);
355 return err;
356 }
357
358 if (rconfig->type >= 0) {
359 type &= ~TYPE_MASK;
360 type |= rconfig->type << TYPE_SHIFT;
361 }
362
363 if (rconfig->type2 >= 0) {
364 type &= ~TYPE2_MASK;
365 type |= rconfig->type2 << TYPE2_SHIFT;
366 }
367
368 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER,
369 type, rconfig_addr + TYPE_OFFSET);
370 if (err < 0) {
371 pr_err("TWL4030 failed to program resource type\n");
372 return err;
373 }
374
375 return 0;
376}
377
378static int __init load_twl4030_script(struct twl4030_script *tscript,
379 u8 address)
380{
381 int err;
382 static int order;
383
384 /* Make sure the script isn't going beyond last valid address (0x3f) */
385 if ((address + tscript->size) > END_OF_SCRIPT) {
386 pr_err("TWL4030 scripts too big error\n");
387 return -EINVAL;
388 }
389
390 err = twl4030_write_script(address, tscript->script, tscript->size);
391 if (err)
392 goto out;
393
394 if (tscript->flags & TWL4030_WRST_SCRIPT) {
395 err = twl4030_config_warmreset_sequence(address);
396 if (err)
397 goto out;
398 }
399 if (tscript->flags & TWL4030_WAKEUP12_SCRIPT) {
400 err = twl4030_config_wakeup12_sequence(address);
401 if (err)
402 goto out;
403 order = 1;
404 }
405 if (tscript->flags & TWL4030_WAKEUP3_SCRIPT) {
406 err = twl4030_config_wakeup3_sequence(address);
407 if (err)
408 goto out;
409 }
410 if (tscript->flags & TWL4030_SLEEP_SCRIPT)
411 if (order)
412 pr_warning("TWL4030: Bad order of scripts (sleep "\
413 "script before wakeup) Leads to boot"\
414 "failure on some boards\n");
415 err = twl4030_config_sleep_sequence(address);
416out:
417 return err;
418}
419
420void __init twl4030_power_init(struct twl4030_power_data *twl4030_scripts)
421{
422 int err = 0;
423 int i;
424 struct twl4030_resconfig *resconfig;
425 u8 address = twl4030_start_script_address;
426
427 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, R_KEY_1,
428 R_PROTECT_KEY);
429 if (err)
430 goto unlock;
431
432 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, R_KEY_2,
433 R_PROTECT_KEY);
434 if (err)
435 goto unlock;
436
437 for (i = 0; i < twl4030_scripts->num; i++) {
438 err = load_twl4030_script(twl4030_scripts->scripts[i], address);
439 if (err)
440 goto load;
441 address += twl4030_scripts->scripts[i]->size;
442 }
443
444 resconfig = twl4030_scripts->resource_config;
445 if (resconfig) {
446 while (resconfig->resource) {
447 err = twl4030_configure_resource(resconfig);
448 if (err)
449 goto resource;
450 resconfig++;
451
452 }
453 }
454
455 err = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, R_PROTECT_KEY);
456 if (err)
457 pr_err("TWL4030 Unable to relock registers\n");
458 return;
459
460unlock:
461 if (err)
462 pr_err("TWL4030 Unable to unlock registers\n");
463 return;
464load:
465 if (err)
466 pr_err("TWL4030 failed to load scripts\n");
467 return;
468resource:
469 if (err)
470 pr_err("TWL4030 failed to configure resource\n");
471 return;
472}
diff --git a/drivers/mfd/wm831x-core.c b/drivers/mfd/wm831x-core.c
new file mode 100644
index 000000000000..49b7885c2702
--- /dev/null
+++ b/drivers/mfd/wm831x-core.c
@@ -0,0 +1,1549 @@
1/*
2 * wm831x-core.c -- Device access for Wolfson WM831x PMICs
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/i2c.h>
18#include <linux/bcd.h>
19#include <linux/delay.h>
20#include <linux/mfd/core.h>
21
22#include <linux/mfd/wm831x/core.h>
23#include <linux/mfd/wm831x/pdata.h>
24#include <linux/mfd/wm831x/irq.h>
25#include <linux/mfd/wm831x/auxadc.h>
26#include <linux/mfd/wm831x/otp.h>
27#include <linux/mfd/wm831x/regulator.h>
28
29/* Current settings - values are 2*2^(reg_val/4) microamps. These are
30 * exported since they are used by multiple drivers.
31 */
32int wm831x_isinkv_values[WM831X_ISINK_MAX_ISEL] = {
33 2,
34 2,
35 3,
36 3,
37 4,
38 5,
39 6,
40 7,
41 8,
42 10,
43 11,
44 13,
45 16,
46 19,
47 23,
48 27,
49 32,
50 38,
51 45,
52 54,
53 64,
54 76,
55 91,
56 108,
57 128,
58 152,
59 181,
60 215,
61 256,
62 304,
63 362,
64 431,
65 512,
66 609,
67 724,
68 861,
69 1024,
70 1218,
71 1448,
72 1722,
73 2048,
74 2435,
75 2896,
76 3444,
77 4096,
78 4871,
79 5793,
80 6889,
81 8192,
82 9742,
83 11585,
84 13777,
85 16384,
86 19484,
87 23170,
88 27554,
89};
90EXPORT_SYMBOL_GPL(wm831x_isinkv_values);
91
92enum wm831x_parent {
93 WM8310 = 0,
94 WM8311 = 1,
95 WM8312 = 2,
96};
97
98static int wm831x_reg_locked(struct wm831x *wm831x, unsigned short reg)
99{
100 if (!wm831x->locked)
101 return 0;
102
103 switch (reg) {
104 case WM831X_WATCHDOG:
105 case WM831X_DC4_CONTROL:
106 case WM831X_ON_PIN_CONTROL:
107 case WM831X_BACKUP_CHARGER_CONTROL:
108 case WM831X_CHARGER_CONTROL_1:
109 case WM831X_CHARGER_CONTROL_2:
110 return 1;
111
112 default:
113 return 0;
114 }
115}
116
117/**
118 * wm831x_reg_unlock: Unlock user keyed registers
119 *
120 * The WM831x has a user key preventing writes to particularly
121 * critical registers. This function locks those registers,
122 * allowing writes to them.
123 */
124void wm831x_reg_lock(struct wm831x *wm831x)
125{
126 int ret;
127
128 ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
129 if (ret == 0) {
130 dev_vdbg(wm831x->dev, "Registers locked\n");
131
132 mutex_lock(&wm831x->io_lock);
133 WARN_ON(wm831x->locked);
134 wm831x->locked = 1;
135 mutex_unlock(&wm831x->io_lock);
136 } else {
137 dev_err(wm831x->dev, "Failed to lock registers: %d\n", ret);
138 }
139
140}
141EXPORT_SYMBOL_GPL(wm831x_reg_lock);
142
143/**
144 * wm831x_reg_unlock: Unlock user keyed registers
145 *
146 * The WM831x has a user key preventing writes to particularly
147 * critical registers. This function locks those registers,
148 * preventing spurious writes.
149 */
150int wm831x_reg_unlock(struct wm831x *wm831x)
151{
152 int ret;
153
154 /* 0x9716 is the value required to unlock the registers */
155 ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0x9716);
156 if (ret == 0) {
157 dev_vdbg(wm831x->dev, "Registers unlocked\n");
158
159 mutex_lock(&wm831x->io_lock);
160 WARN_ON(!wm831x->locked);
161 wm831x->locked = 0;
162 mutex_unlock(&wm831x->io_lock);
163 }
164
165 return ret;
166}
167EXPORT_SYMBOL_GPL(wm831x_reg_unlock);
168
169static int wm831x_read(struct wm831x *wm831x, unsigned short reg,
170 int bytes, void *dest)
171{
172 int ret, i;
173 u16 *buf = dest;
174
175 BUG_ON(bytes % 2);
176 BUG_ON(bytes <= 0);
177
178 ret = wm831x->read_dev(wm831x, reg, bytes, dest);
179 if (ret < 0)
180 return ret;
181
182 for (i = 0; i < bytes / 2; i++) {
183 buf[i] = be16_to_cpu(buf[i]);
184
185 dev_vdbg(wm831x->dev, "Read %04x from R%d(0x%x)\n",
186 buf[i], reg + i, reg + i);
187 }
188
189 return 0;
190}
191
192/**
193 * wm831x_reg_read: Read a single WM831x register.
194 *
195 * @wm831x: Device to read from.
196 * @reg: Register to read.
197 */
198int wm831x_reg_read(struct wm831x *wm831x, unsigned short reg)
199{
200 unsigned short val;
201 int ret;
202
203 mutex_lock(&wm831x->io_lock);
204
205 ret = wm831x_read(wm831x, reg, 2, &val);
206
207 mutex_unlock(&wm831x->io_lock);
208
209 if (ret < 0)
210 return ret;
211 else
212 return val;
213}
214EXPORT_SYMBOL_GPL(wm831x_reg_read);
215
216/**
217 * wm831x_bulk_read: Read multiple WM831x registers
218 *
219 * @wm831x: Device to read from
220 * @reg: First register
221 * @count: Number of registers
222 * @buf: Buffer to fill.
223 */
224int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg,
225 int count, u16 *buf)
226{
227 int ret;
228
229 mutex_lock(&wm831x->io_lock);
230
231 ret = wm831x_read(wm831x, reg, count * 2, buf);
232
233 mutex_unlock(&wm831x->io_lock);
234
235 return ret;
236}
237EXPORT_SYMBOL_GPL(wm831x_bulk_read);
238
239static int wm831x_write(struct wm831x *wm831x, unsigned short reg,
240 int bytes, void *src)
241{
242 u16 *buf = src;
243 int i;
244
245 BUG_ON(bytes % 2);
246 BUG_ON(bytes <= 0);
247
248 for (i = 0; i < bytes / 2; i++) {
249 if (wm831x_reg_locked(wm831x, reg))
250 return -EPERM;
251
252 dev_vdbg(wm831x->dev, "Write %04x to R%d(0x%x)\n",
253 buf[i], reg + i, reg + i);
254
255 buf[i] = cpu_to_be16(buf[i]);
256 }
257
258 return wm831x->write_dev(wm831x, reg, bytes, src);
259}
260
261/**
262 * wm831x_reg_write: Write a single WM831x register.
263 *
264 * @wm831x: Device to write to.
265 * @reg: Register to write to.
266 * @val: Value to write.
267 */
268int wm831x_reg_write(struct wm831x *wm831x, unsigned short reg,
269 unsigned short val)
270{
271 int ret;
272
273 mutex_lock(&wm831x->io_lock);
274
275 ret = wm831x_write(wm831x, reg, 2, &val);
276
277 mutex_unlock(&wm831x->io_lock);
278
279 return ret;
280}
281EXPORT_SYMBOL_GPL(wm831x_reg_write);
282
283/**
284 * wm831x_set_bits: Set the value of a bitfield in a WM831x register
285 *
286 * @wm831x: Device to write to.
287 * @reg: Register to write to.
288 * @mask: Mask of bits to set.
289 * @val: Value to set (unshifted)
290 */
291int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg,
292 unsigned short mask, unsigned short val)
293{
294 int ret;
295 u16 r;
296
297 mutex_lock(&wm831x->io_lock);
298
299 ret = wm831x_read(wm831x, reg, 2, &r);
300 if (ret < 0)
301 goto out;
302
303 r &= ~mask;
304 r |= val;
305
306 ret = wm831x_write(wm831x, reg, 2, &r);
307
308out:
309 mutex_unlock(&wm831x->io_lock);
310
311 return ret;
312}
313EXPORT_SYMBOL_GPL(wm831x_set_bits);
314
315/**
316 * wm831x_auxadc_read: Read a value from the WM831x AUXADC
317 *
318 * @wm831x: Device to read from.
319 * @input: AUXADC input to read.
320 */
321int wm831x_auxadc_read(struct wm831x *wm831x, enum wm831x_auxadc input)
322{
323 int tries = 10;
324 int ret, src;
325
326 mutex_lock(&wm831x->auxadc_lock);
327
328 ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
329 WM831X_AUX_ENA, WM831X_AUX_ENA);
330 if (ret < 0) {
331 dev_err(wm831x->dev, "Failed to enable AUXADC: %d\n", ret);
332 goto out;
333 }
334
335 /* We force a single source at present */
336 src = input;
337 ret = wm831x_reg_write(wm831x, WM831X_AUXADC_SOURCE,
338 1 << src);
339 if (ret < 0) {
340 dev_err(wm831x->dev, "Failed to set AUXADC source: %d\n", ret);
341 goto out;
342 }
343
344 ret = wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL,
345 WM831X_AUX_CVT_ENA, WM831X_AUX_CVT_ENA);
346 if (ret < 0) {
347 dev_err(wm831x->dev, "Failed to start AUXADC: %d\n", ret);
348 goto disable;
349 }
350
351 do {
352 msleep(1);
353
354 ret = wm831x_reg_read(wm831x, WM831X_AUXADC_CONTROL);
355 if (ret < 0)
356 ret = WM831X_AUX_CVT_ENA;
357 } while ((ret & WM831X_AUX_CVT_ENA) && --tries);
358
359 if (ret & WM831X_AUX_CVT_ENA) {
360 dev_err(wm831x->dev, "Timed out reading AUXADC\n");
361 ret = -EBUSY;
362 goto disable;
363 }
364
365 ret = wm831x_reg_read(wm831x, WM831X_AUXADC_DATA);
366 if (ret < 0) {
367 dev_err(wm831x->dev, "Failed to read AUXADC data: %d\n", ret);
368 } else {
369 src = ((ret & WM831X_AUX_DATA_SRC_MASK)
370 >> WM831X_AUX_DATA_SRC_SHIFT) - 1;
371
372 if (src == 14)
373 src = WM831X_AUX_CAL;
374
375 if (src != input) {
376 dev_err(wm831x->dev, "Data from source %d not %d\n",
377 src, input);
378 ret = -EINVAL;
379 } else {
380 ret &= WM831X_AUX_DATA_MASK;
381 }
382 }
383
384disable:
385 wm831x_set_bits(wm831x, WM831X_AUXADC_CONTROL, WM831X_AUX_ENA, 0);
386out:
387 mutex_unlock(&wm831x->auxadc_lock);
388 return ret;
389}
390EXPORT_SYMBOL_GPL(wm831x_auxadc_read);
391
392/**
393 * wm831x_auxadc_read_uv: Read a voltage from the WM831x AUXADC
394 *
395 * @wm831x: Device to read from.
396 * @input: AUXADC input to read.
397 */
398int wm831x_auxadc_read_uv(struct wm831x *wm831x, enum wm831x_auxadc input)
399{
400 int ret;
401
402 ret = wm831x_auxadc_read(wm831x, input);
403 if (ret < 0)
404 return ret;
405
406 ret *= 1465;
407
408 return ret;
409}
410EXPORT_SYMBOL_GPL(wm831x_auxadc_read_uv);
411
412static struct resource wm831x_dcdc1_resources[] = {
413 {
414 .start = WM831X_DC1_CONTROL_1,
415 .end = WM831X_DC1_DVS_CONTROL,
416 .flags = IORESOURCE_IO,
417 },
418 {
419 .name = "UV",
420 .start = WM831X_IRQ_UV_DC1,
421 .end = WM831X_IRQ_UV_DC1,
422 .flags = IORESOURCE_IRQ,
423 },
424 {
425 .name = "HC",
426 .start = WM831X_IRQ_HC_DC1,
427 .end = WM831X_IRQ_HC_DC1,
428 .flags = IORESOURCE_IRQ,
429 },
430};
431
432
433static struct resource wm831x_dcdc2_resources[] = {
434 {
435 .start = WM831X_DC2_CONTROL_1,
436 .end = WM831X_DC2_DVS_CONTROL,
437 .flags = IORESOURCE_IO,
438 },
439 {
440 .name = "UV",
441 .start = WM831X_IRQ_UV_DC2,
442 .end = WM831X_IRQ_UV_DC2,
443 .flags = IORESOURCE_IRQ,
444 },
445 {
446 .name = "HC",
447 .start = WM831X_IRQ_HC_DC2,
448 .end = WM831X_IRQ_HC_DC2,
449 .flags = IORESOURCE_IRQ,
450 },
451};
452
453static struct resource wm831x_dcdc3_resources[] = {
454 {
455 .start = WM831X_DC3_CONTROL_1,
456 .end = WM831X_DC3_SLEEP_CONTROL,
457 .flags = IORESOURCE_IO,
458 },
459 {
460 .name = "UV",
461 .start = WM831X_IRQ_UV_DC3,
462 .end = WM831X_IRQ_UV_DC3,
463 .flags = IORESOURCE_IRQ,
464 },
465};
466
467static struct resource wm831x_dcdc4_resources[] = {
468 {
469 .start = WM831X_DC4_CONTROL,
470 .end = WM831X_DC4_SLEEP_CONTROL,
471 .flags = IORESOURCE_IO,
472 },
473 {
474 .name = "UV",
475 .start = WM831X_IRQ_UV_DC4,
476 .end = WM831X_IRQ_UV_DC4,
477 .flags = IORESOURCE_IRQ,
478 },
479};
480
481static struct resource wm831x_gpio_resources[] = {
482 {
483 .start = WM831X_IRQ_GPIO_1,
484 .end = WM831X_IRQ_GPIO_16,
485 .flags = IORESOURCE_IRQ,
486 },
487};
488
489static struct resource wm831x_isink1_resources[] = {
490 {
491 .start = WM831X_CURRENT_SINK_1,
492 .end = WM831X_CURRENT_SINK_1,
493 .flags = IORESOURCE_IO,
494 },
495 {
496 .start = WM831X_IRQ_CS1,
497 .end = WM831X_IRQ_CS1,
498 .flags = IORESOURCE_IRQ,
499 },
500};
501
502static struct resource wm831x_isink2_resources[] = {
503 {
504 .start = WM831X_CURRENT_SINK_2,
505 .end = WM831X_CURRENT_SINK_2,
506 .flags = IORESOURCE_IO,
507 },
508 {
509 .start = WM831X_IRQ_CS2,
510 .end = WM831X_IRQ_CS2,
511 .flags = IORESOURCE_IRQ,
512 },
513};
514
515static struct resource wm831x_ldo1_resources[] = {
516 {
517 .start = WM831X_LDO1_CONTROL,
518 .end = WM831X_LDO1_SLEEP_CONTROL,
519 .flags = IORESOURCE_IO,
520 },
521 {
522 .name = "UV",
523 .start = WM831X_IRQ_UV_LDO1,
524 .end = WM831X_IRQ_UV_LDO1,
525 .flags = IORESOURCE_IRQ,
526 },
527};
528
529static struct resource wm831x_ldo2_resources[] = {
530 {
531 .start = WM831X_LDO2_CONTROL,
532 .end = WM831X_LDO2_SLEEP_CONTROL,
533 .flags = IORESOURCE_IO,
534 },
535 {
536 .name = "UV",
537 .start = WM831X_IRQ_UV_LDO2,
538 .end = WM831X_IRQ_UV_LDO2,
539 .flags = IORESOURCE_IRQ,
540 },
541};
542
543static struct resource wm831x_ldo3_resources[] = {
544 {
545 .start = WM831X_LDO3_CONTROL,
546 .end = WM831X_LDO3_SLEEP_CONTROL,
547 .flags = IORESOURCE_IO,
548 },
549 {
550 .name = "UV",
551 .start = WM831X_IRQ_UV_LDO3,
552 .end = WM831X_IRQ_UV_LDO3,
553 .flags = IORESOURCE_IRQ,
554 },
555};
556
557static struct resource wm831x_ldo4_resources[] = {
558 {
559 .start = WM831X_LDO4_CONTROL,
560 .end = WM831X_LDO4_SLEEP_CONTROL,
561 .flags = IORESOURCE_IO,
562 },
563 {
564 .name = "UV",
565 .start = WM831X_IRQ_UV_LDO4,
566 .end = WM831X_IRQ_UV_LDO4,
567 .flags = IORESOURCE_IRQ,
568 },
569};
570
571static struct resource wm831x_ldo5_resources[] = {
572 {
573 .start = WM831X_LDO5_CONTROL,
574 .end = WM831X_LDO5_SLEEP_CONTROL,
575 .flags = IORESOURCE_IO,
576 },
577 {
578 .name = "UV",
579 .start = WM831X_IRQ_UV_LDO5,
580 .end = WM831X_IRQ_UV_LDO5,
581 .flags = IORESOURCE_IRQ,
582 },
583};
584
585static struct resource wm831x_ldo6_resources[] = {
586 {
587 .start = WM831X_LDO6_CONTROL,
588 .end = WM831X_LDO6_SLEEP_CONTROL,
589 .flags = IORESOURCE_IO,
590 },
591 {
592 .name = "UV",
593 .start = WM831X_IRQ_UV_LDO6,
594 .end = WM831X_IRQ_UV_LDO6,
595 .flags = IORESOURCE_IRQ,
596 },
597};
598
599static struct resource wm831x_ldo7_resources[] = {
600 {
601 .start = WM831X_LDO7_CONTROL,
602 .end = WM831X_LDO7_SLEEP_CONTROL,
603 .flags = IORESOURCE_IO,
604 },
605 {
606 .name = "UV",
607 .start = WM831X_IRQ_UV_LDO7,
608 .end = WM831X_IRQ_UV_LDO7,
609 .flags = IORESOURCE_IRQ,
610 },
611};
612
613static struct resource wm831x_ldo8_resources[] = {
614 {
615 .start = WM831X_LDO8_CONTROL,
616 .end = WM831X_LDO8_SLEEP_CONTROL,
617 .flags = IORESOURCE_IO,
618 },
619 {
620 .name = "UV",
621 .start = WM831X_IRQ_UV_LDO8,
622 .end = WM831X_IRQ_UV_LDO8,
623 .flags = IORESOURCE_IRQ,
624 },
625};
626
627static struct resource wm831x_ldo9_resources[] = {
628 {
629 .start = WM831X_LDO9_CONTROL,
630 .end = WM831X_LDO9_SLEEP_CONTROL,
631 .flags = IORESOURCE_IO,
632 },
633 {
634 .name = "UV",
635 .start = WM831X_IRQ_UV_LDO9,
636 .end = WM831X_IRQ_UV_LDO9,
637 .flags = IORESOURCE_IRQ,
638 },
639};
640
641static struct resource wm831x_ldo10_resources[] = {
642 {
643 .start = WM831X_LDO10_CONTROL,
644 .end = WM831X_LDO10_SLEEP_CONTROL,
645 .flags = IORESOURCE_IO,
646 },
647 {
648 .name = "UV",
649 .start = WM831X_IRQ_UV_LDO10,
650 .end = WM831X_IRQ_UV_LDO10,
651 .flags = IORESOURCE_IRQ,
652 },
653};
654
655static struct resource wm831x_ldo11_resources[] = {
656 {
657 .start = WM831X_LDO11_ON_CONTROL,
658 .end = WM831X_LDO11_SLEEP_CONTROL,
659 .flags = IORESOURCE_IO,
660 },
661};
662
663static struct resource wm831x_on_resources[] = {
664 {
665 .start = WM831X_IRQ_ON,
666 .end = WM831X_IRQ_ON,
667 .flags = IORESOURCE_IRQ,
668 },
669};
670
671
672static struct resource wm831x_power_resources[] = {
673 {
674 .name = "SYSLO",
675 .start = WM831X_IRQ_PPM_SYSLO,
676 .end = WM831X_IRQ_PPM_SYSLO,
677 .flags = IORESOURCE_IRQ,
678 },
679 {
680 .name = "PWR SRC",
681 .start = WM831X_IRQ_PPM_PWR_SRC,
682 .end = WM831X_IRQ_PPM_PWR_SRC,
683 .flags = IORESOURCE_IRQ,
684 },
685 {
686 .name = "USB CURR",
687 .start = WM831X_IRQ_PPM_USB_CURR,
688 .end = WM831X_IRQ_PPM_USB_CURR,
689 .flags = IORESOURCE_IRQ,
690 },
691 {
692 .name = "BATT HOT",
693 .start = WM831X_IRQ_CHG_BATT_HOT,
694 .end = WM831X_IRQ_CHG_BATT_HOT,
695 .flags = IORESOURCE_IRQ,
696 },
697 {
698 .name = "BATT COLD",
699 .start = WM831X_IRQ_CHG_BATT_COLD,
700 .end = WM831X_IRQ_CHG_BATT_COLD,
701 .flags = IORESOURCE_IRQ,
702 },
703 {
704 .name = "BATT FAIL",
705 .start = WM831X_IRQ_CHG_BATT_FAIL,
706 .end = WM831X_IRQ_CHG_BATT_FAIL,
707 .flags = IORESOURCE_IRQ,
708 },
709 {
710 .name = "OV",
711 .start = WM831X_IRQ_CHG_OV,
712 .end = WM831X_IRQ_CHG_OV,
713 .flags = IORESOURCE_IRQ,
714 },
715 {
716 .name = "END",
717 .start = WM831X_IRQ_CHG_END,
718 .end = WM831X_IRQ_CHG_END,
719 .flags = IORESOURCE_IRQ,
720 },
721 {
722 .name = "TO",
723 .start = WM831X_IRQ_CHG_TO,
724 .end = WM831X_IRQ_CHG_TO,
725 .flags = IORESOURCE_IRQ,
726 },
727 {
728 .name = "MODE",
729 .start = WM831X_IRQ_CHG_MODE,
730 .end = WM831X_IRQ_CHG_MODE,
731 .flags = IORESOURCE_IRQ,
732 },
733 {
734 .name = "START",
735 .start = WM831X_IRQ_CHG_START,
736 .end = WM831X_IRQ_CHG_START,
737 .flags = IORESOURCE_IRQ,
738 },
739};
740
741static struct resource wm831x_rtc_resources[] = {
742 {
743 .name = "PER",
744 .start = WM831X_IRQ_RTC_PER,
745 .end = WM831X_IRQ_RTC_PER,
746 .flags = IORESOURCE_IRQ,
747 },
748 {
749 .name = "ALM",
750 .start = WM831X_IRQ_RTC_ALM,
751 .end = WM831X_IRQ_RTC_ALM,
752 .flags = IORESOURCE_IRQ,
753 },
754};
755
756static struct resource wm831x_status1_resources[] = {
757 {
758 .start = WM831X_STATUS_LED_1,
759 .end = WM831X_STATUS_LED_1,
760 .flags = IORESOURCE_IO,
761 },
762};
763
764static struct resource wm831x_status2_resources[] = {
765 {
766 .start = WM831X_STATUS_LED_2,
767 .end = WM831X_STATUS_LED_2,
768 .flags = IORESOURCE_IO,
769 },
770};
771
772static struct resource wm831x_touch_resources[] = {
773 {
774 .name = "TCHPD",
775 .start = WM831X_IRQ_TCHPD,
776 .end = WM831X_IRQ_TCHPD,
777 .flags = IORESOURCE_IRQ,
778 },
779 {
780 .name = "TCHDATA",
781 .start = WM831X_IRQ_TCHDATA,
782 .end = WM831X_IRQ_TCHDATA,
783 .flags = IORESOURCE_IRQ,
784 },
785};
786
787static struct resource wm831x_wdt_resources[] = {
788 {
789 .start = WM831X_IRQ_WDOG_TO,
790 .end = WM831X_IRQ_WDOG_TO,
791 .flags = IORESOURCE_IRQ,
792 },
793};
794
795static struct mfd_cell wm8310_devs[] = {
796 {
797 .name = "wm831x-buckv",
798 .id = 1,
799 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
800 .resources = wm831x_dcdc1_resources,
801 },
802 {
803 .name = "wm831x-buckv",
804 .id = 2,
805 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
806 .resources = wm831x_dcdc2_resources,
807 },
808 {
809 .name = "wm831x-buckp",
810 .id = 3,
811 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
812 .resources = wm831x_dcdc3_resources,
813 },
814 {
815 .name = "wm831x-boostp",
816 .id = 4,
817 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
818 .resources = wm831x_dcdc4_resources,
819 },
820 {
821 .name = "wm831x-epe",
822 .id = 1,
823 },
824 {
825 .name = "wm831x-epe",
826 .id = 2,
827 },
828 {
829 .name = "wm831x-gpio",
830 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
831 .resources = wm831x_gpio_resources,
832 },
833 {
834 .name = "wm831x-hwmon",
835 },
836 {
837 .name = "wm831x-isink",
838 .id = 1,
839 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
840 .resources = wm831x_isink1_resources,
841 },
842 {
843 .name = "wm831x-isink",
844 .id = 2,
845 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
846 .resources = wm831x_isink2_resources,
847 },
848 {
849 .name = "wm831x-ldo",
850 .id = 1,
851 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
852 .resources = wm831x_ldo1_resources,
853 },
854 {
855 .name = "wm831x-ldo",
856 .id = 2,
857 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
858 .resources = wm831x_ldo2_resources,
859 },
860 {
861 .name = "wm831x-ldo",
862 .id = 3,
863 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
864 .resources = wm831x_ldo3_resources,
865 },
866 {
867 .name = "wm831x-ldo",
868 .id = 4,
869 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
870 .resources = wm831x_ldo4_resources,
871 },
872 {
873 .name = "wm831x-ldo",
874 .id = 5,
875 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
876 .resources = wm831x_ldo5_resources,
877 },
878 {
879 .name = "wm831x-ldo",
880 .id = 6,
881 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
882 .resources = wm831x_ldo6_resources,
883 },
884 {
885 .name = "wm831x-aldo",
886 .id = 7,
887 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
888 .resources = wm831x_ldo7_resources,
889 },
890 {
891 .name = "wm831x-aldo",
892 .id = 8,
893 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
894 .resources = wm831x_ldo8_resources,
895 },
896 {
897 .name = "wm831x-aldo",
898 .id = 9,
899 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
900 .resources = wm831x_ldo9_resources,
901 },
902 {
903 .name = "wm831x-aldo",
904 .id = 10,
905 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
906 .resources = wm831x_ldo10_resources,
907 },
908 {
909 .name = "wm831x-alive-ldo",
910 .id = 11,
911 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
912 .resources = wm831x_ldo11_resources,
913 },
914 {
915 .name = "wm831x-on",
916 .num_resources = ARRAY_SIZE(wm831x_on_resources),
917 .resources = wm831x_on_resources,
918 },
919 {
920 .name = "wm831x-power",
921 .num_resources = ARRAY_SIZE(wm831x_power_resources),
922 .resources = wm831x_power_resources,
923 },
924 {
925 .name = "wm831x-rtc",
926 .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
927 .resources = wm831x_rtc_resources,
928 },
929 {
930 .name = "wm831x-status",
931 .id = 1,
932 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
933 .resources = wm831x_status1_resources,
934 },
935 {
936 .name = "wm831x-status",
937 .id = 2,
938 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
939 .resources = wm831x_status2_resources,
940 },
941 {
942 .name = "wm831x-watchdog",
943 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
944 .resources = wm831x_wdt_resources,
945 },
946};
947
948static struct mfd_cell wm8311_devs[] = {
949 {
950 .name = "wm831x-buckv",
951 .id = 1,
952 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
953 .resources = wm831x_dcdc1_resources,
954 },
955 {
956 .name = "wm831x-buckv",
957 .id = 2,
958 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
959 .resources = wm831x_dcdc2_resources,
960 },
961 {
962 .name = "wm831x-buckp",
963 .id = 3,
964 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
965 .resources = wm831x_dcdc3_resources,
966 },
967 {
968 .name = "wm831x-boostp",
969 .id = 4,
970 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
971 .resources = wm831x_dcdc4_resources,
972 },
973 {
974 .name = "wm831x-epe",
975 .id = 1,
976 },
977 {
978 .name = "wm831x-epe",
979 .id = 2,
980 },
981 {
982 .name = "wm831x-gpio",
983 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
984 .resources = wm831x_gpio_resources,
985 },
986 {
987 .name = "wm831x-hwmon",
988 },
989 {
990 .name = "wm831x-isink",
991 .id = 1,
992 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
993 .resources = wm831x_isink1_resources,
994 },
995 {
996 .name = "wm831x-isink",
997 .id = 2,
998 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
999 .resources = wm831x_isink2_resources,
1000 },
1001 {
1002 .name = "wm831x-ldo",
1003 .id = 1,
1004 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1005 .resources = wm831x_ldo1_resources,
1006 },
1007 {
1008 .name = "wm831x-ldo",
1009 .id = 2,
1010 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1011 .resources = wm831x_ldo2_resources,
1012 },
1013 {
1014 .name = "wm831x-ldo",
1015 .id = 3,
1016 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1017 .resources = wm831x_ldo3_resources,
1018 },
1019 {
1020 .name = "wm831x-ldo",
1021 .id = 4,
1022 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1023 .resources = wm831x_ldo4_resources,
1024 },
1025 {
1026 .name = "wm831x-ldo",
1027 .id = 5,
1028 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1029 .resources = wm831x_ldo5_resources,
1030 },
1031 {
1032 .name = "wm831x-aldo",
1033 .id = 7,
1034 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1035 .resources = wm831x_ldo7_resources,
1036 },
1037 {
1038 .name = "wm831x-alive-ldo",
1039 .id = 11,
1040 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1041 .resources = wm831x_ldo11_resources,
1042 },
1043 {
1044 .name = "wm831x-on",
1045 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1046 .resources = wm831x_on_resources,
1047 },
1048 {
1049 .name = "wm831x-power",
1050 .num_resources = ARRAY_SIZE(wm831x_power_resources),
1051 .resources = wm831x_power_resources,
1052 },
1053 {
1054 .name = "wm831x-rtc",
1055 .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
1056 .resources = wm831x_rtc_resources,
1057 },
1058 {
1059 .name = "wm831x-status",
1060 .id = 1,
1061 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1062 .resources = wm831x_status1_resources,
1063 },
1064 {
1065 .name = "wm831x-status",
1066 .id = 2,
1067 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1068 .resources = wm831x_status2_resources,
1069 },
1070 {
1071 .name = "wm831x-touch",
1072 .num_resources = ARRAY_SIZE(wm831x_touch_resources),
1073 .resources = wm831x_touch_resources,
1074 },
1075 {
1076 .name = "wm831x-watchdog",
1077 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1078 .resources = wm831x_wdt_resources,
1079 },
1080};
1081
1082static struct mfd_cell wm8312_devs[] = {
1083 {
1084 .name = "wm831x-buckv",
1085 .id = 1,
1086 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1087 .resources = wm831x_dcdc1_resources,
1088 },
1089 {
1090 .name = "wm831x-buckv",
1091 .id = 2,
1092 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1093 .resources = wm831x_dcdc2_resources,
1094 },
1095 {
1096 .name = "wm831x-buckp",
1097 .id = 3,
1098 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1099 .resources = wm831x_dcdc3_resources,
1100 },
1101 {
1102 .name = "wm831x-boostp",
1103 .id = 4,
1104 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1105 .resources = wm831x_dcdc4_resources,
1106 },
1107 {
1108 .name = "wm831x-epe",
1109 .id = 1,
1110 },
1111 {
1112 .name = "wm831x-epe",
1113 .id = 2,
1114 },
1115 {
1116 .name = "wm831x-gpio",
1117 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1118 .resources = wm831x_gpio_resources,
1119 },
1120 {
1121 .name = "wm831x-hwmon",
1122 },
1123 {
1124 .name = "wm831x-isink",
1125 .id = 1,
1126 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1127 .resources = wm831x_isink1_resources,
1128 },
1129 {
1130 .name = "wm831x-isink",
1131 .id = 2,
1132 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1133 .resources = wm831x_isink2_resources,
1134 },
1135 {
1136 .name = "wm831x-ldo",
1137 .id = 1,
1138 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1139 .resources = wm831x_ldo1_resources,
1140 },
1141 {
1142 .name = "wm831x-ldo",
1143 .id = 2,
1144 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1145 .resources = wm831x_ldo2_resources,
1146 },
1147 {
1148 .name = "wm831x-ldo",
1149 .id = 3,
1150 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1151 .resources = wm831x_ldo3_resources,
1152 },
1153 {
1154 .name = "wm831x-ldo",
1155 .id = 4,
1156 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1157 .resources = wm831x_ldo4_resources,
1158 },
1159 {
1160 .name = "wm831x-ldo",
1161 .id = 5,
1162 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1163 .resources = wm831x_ldo5_resources,
1164 },
1165 {
1166 .name = "wm831x-ldo",
1167 .id = 6,
1168 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1169 .resources = wm831x_ldo6_resources,
1170 },
1171 {
1172 .name = "wm831x-aldo",
1173 .id = 7,
1174 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1175 .resources = wm831x_ldo7_resources,
1176 },
1177 {
1178 .name = "wm831x-aldo",
1179 .id = 8,
1180 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1181 .resources = wm831x_ldo8_resources,
1182 },
1183 {
1184 .name = "wm831x-aldo",
1185 .id = 9,
1186 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1187 .resources = wm831x_ldo9_resources,
1188 },
1189 {
1190 .name = "wm831x-aldo",
1191 .id = 10,
1192 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1193 .resources = wm831x_ldo10_resources,
1194 },
1195 {
1196 .name = "wm831x-alive-ldo",
1197 .id = 11,
1198 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1199 .resources = wm831x_ldo11_resources,
1200 },
1201 {
1202 .name = "wm831x-on",
1203 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1204 .resources = wm831x_on_resources,
1205 },
1206 {
1207 .name = "wm831x-power",
1208 .num_resources = ARRAY_SIZE(wm831x_power_resources),
1209 .resources = wm831x_power_resources,
1210 },
1211 {
1212 .name = "wm831x-rtc",
1213 .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
1214 .resources = wm831x_rtc_resources,
1215 },
1216 {
1217 .name = "wm831x-status",
1218 .id = 1,
1219 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1220 .resources = wm831x_status1_resources,
1221 },
1222 {
1223 .name = "wm831x-status",
1224 .id = 2,
1225 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1226 .resources = wm831x_status2_resources,
1227 },
1228 {
1229 .name = "wm831x-touch",
1230 .num_resources = ARRAY_SIZE(wm831x_touch_resources),
1231 .resources = wm831x_touch_resources,
1232 },
1233 {
1234 .name = "wm831x-watchdog",
1235 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1236 .resources = wm831x_wdt_resources,
1237 },
1238};
1239
1240static struct mfd_cell backlight_devs[] = {
1241 {
1242 .name = "wm831x-backlight",
1243 },
1244};
1245
1246/*
1247 * Instantiate the generic non-control parts of the device.
1248 */
1249static int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)
1250{
1251 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
1252 int rev;
1253 enum wm831x_parent parent;
1254 int ret;
1255
1256 mutex_init(&wm831x->io_lock);
1257 mutex_init(&wm831x->key_lock);
1258 mutex_init(&wm831x->auxadc_lock);
1259 dev_set_drvdata(wm831x->dev, wm831x);
1260
1261 ret = wm831x_reg_read(wm831x, WM831X_PARENT_ID);
1262 if (ret < 0) {
1263 dev_err(wm831x->dev, "Failed to read parent ID: %d\n", ret);
1264 goto err;
1265 }
1266 if (ret != 0x6204) {
1267 dev_err(wm831x->dev, "Device is not a WM831x: ID %x\n", ret);
1268 ret = -EINVAL;
1269 goto err;
1270 }
1271
1272 ret = wm831x_reg_read(wm831x, WM831X_REVISION);
1273 if (ret < 0) {
1274 dev_err(wm831x->dev, "Failed to read revision: %d\n", ret);
1275 goto err;
1276 }
1277 rev = (ret & WM831X_PARENT_REV_MASK) >> WM831X_PARENT_REV_SHIFT;
1278
1279 ret = wm831x_reg_read(wm831x, WM831X_RESET_ID);
1280 if (ret < 0) {
1281 dev_err(wm831x->dev, "Failed to read device ID: %d\n", ret);
1282 goto err;
1283 }
1284
1285 switch (ret) {
1286 case 0x8310:
1287 parent = WM8310;
1288 switch (rev) {
1289 case 0:
1290 dev_info(wm831x->dev, "WM8310 revision %c\n",
1291 'A' + rev);
1292 break;
1293 }
1294 break;
1295
1296 case 0x8311:
1297 parent = WM8311;
1298 switch (rev) {
1299 case 0:
1300 dev_info(wm831x->dev, "WM8311 revision %c\n",
1301 'A' + rev);
1302 break;
1303 }
1304 break;
1305
1306 case 0x8312:
1307 parent = WM8312;
1308 switch (rev) {
1309 case 0:
1310 dev_info(wm831x->dev, "WM8312 revision %c\n",
1311 'A' + rev);
1312 break;
1313 }
1314 break;
1315
1316 case 0:
1317 /* Some engineering samples do not have the ID set,
1318 * rely on the device being registered correctly.
1319 * This will need revisiting for future devices with
1320 * multiple dies.
1321 */
1322 parent = id;
1323 switch (rev) {
1324 case 0:
1325 dev_info(wm831x->dev, "WM831%d ES revision %c\n",
1326 parent, 'A' + rev);
1327 break;
1328 }
1329 break;
1330
1331 default:
1332 dev_err(wm831x->dev, "Unknown WM831x device %04x\n", ret);
1333 ret = -EINVAL;
1334 goto err;
1335 }
1336
1337 /* This will need revisiting in future but is OK for all
1338 * current parts.
1339 */
1340 if (parent != id)
1341 dev_warn(wm831x->dev, "Device was registered as a WM831%lu\n",
1342 id);
1343
1344 /* Bootstrap the user key */
1345 ret = wm831x_reg_read(wm831x, WM831X_SECURITY_KEY);
1346 if (ret < 0) {
1347 dev_err(wm831x->dev, "Failed to read security key: %d\n", ret);
1348 goto err;
1349 }
1350 if (ret != 0) {
1351 dev_warn(wm831x->dev, "Security key had non-zero value %x\n",
1352 ret);
1353 wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
1354 }
1355 wm831x->locked = 1;
1356
1357 if (pdata && pdata->pre_init) {
1358 ret = pdata->pre_init(wm831x);
1359 if (ret != 0) {
1360 dev_err(wm831x->dev, "pre_init() failed: %d\n", ret);
1361 goto err;
1362 }
1363 }
1364
1365 ret = wm831x_irq_init(wm831x, irq);
1366 if (ret != 0)
1367 goto err;
1368
1369 /* The core device is up, instantiate the subdevices. */
1370 switch (parent) {
1371 case WM8310:
1372 ret = mfd_add_devices(wm831x->dev, -1,
1373 wm8310_devs, ARRAY_SIZE(wm8310_devs),
1374 NULL, 0);
1375 break;
1376
1377 case WM8311:
1378 ret = mfd_add_devices(wm831x->dev, -1,
1379 wm8311_devs, ARRAY_SIZE(wm8311_devs),
1380 NULL, 0);
1381 break;
1382
1383 case WM8312:
1384 ret = mfd_add_devices(wm831x->dev, -1,
1385 wm8312_devs, ARRAY_SIZE(wm8312_devs),
1386 NULL, 0);
1387 break;
1388
1389 default:
1390 /* If this happens the bus probe function is buggy */
1391 BUG();
1392 }
1393
1394 if (ret != 0) {
1395 dev_err(wm831x->dev, "Failed to add children\n");
1396 goto err_irq;
1397 }
1398
1399 if (pdata && pdata->backlight) {
1400 /* Treat errors as non-critical */
1401 ret = mfd_add_devices(wm831x->dev, -1, backlight_devs,
1402 ARRAY_SIZE(backlight_devs), NULL, 0);
1403 if (ret < 0)
1404 dev_err(wm831x->dev, "Failed to add backlight: %d\n",
1405 ret);
1406 }
1407
1408 wm831x_otp_init(wm831x);
1409
1410 if (pdata && pdata->post_init) {
1411 ret = pdata->post_init(wm831x);
1412 if (ret != 0) {
1413 dev_err(wm831x->dev, "post_init() failed: %d\n", ret);
1414 goto err_irq;
1415 }
1416 }
1417
1418 return 0;
1419
1420err_irq:
1421 wm831x_irq_exit(wm831x);
1422err:
1423 mfd_remove_devices(wm831x->dev);
1424 kfree(wm831x);
1425 return ret;
1426}
1427
1428static void wm831x_device_exit(struct wm831x *wm831x)
1429{
1430 wm831x_otp_exit(wm831x);
1431 mfd_remove_devices(wm831x->dev);
1432 wm831x_irq_exit(wm831x);
1433 kfree(wm831x);
1434}
1435
1436static int wm831x_i2c_read_device(struct wm831x *wm831x, unsigned short reg,
1437 int bytes, void *dest)
1438{
1439 struct i2c_client *i2c = wm831x->control_data;
1440 int ret;
1441 u16 r = cpu_to_be16(reg);
1442
1443 ret = i2c_master_send(i2c, (unsigned char *)&r, 2);
1444 if (ret < 0)
1445 return ret;
1446 if (ret != 2)
1447 return -EIO;
1448
1449 ret = i2c_master_recv(i2c, dest, bytes);
1450 if (ret < 0)
1451 return ret;
1452 if (ret != bytes)
1453 return -EIO;
1454 return 0;
1455}
1456
1457/* Currently we allocate the write buffer on the stack; this is OK for
1458 * small writes - if we need to do large writes this will need to be
1459 * revised.
1460 */
1461static int wm831x_i2c_write_device(struct wm831x *wm831x, unsigned short reg,
1462 int bytes, void *src)
1463{
1464 struct i2c_client *i2c = wm831x->control_data;
1465 unsigned char msg[bytes + 2];
1466 int ret;
1467
1468 reg = cpu_to_be16(reg);
1469 memcpy(&msg[0], &reg, 2);
1470 memcpy(&msg[2], src, bytes);
1471
1472 ret = i2c_master_send(i2c, msg, bytes + 2);
1473 if (ret < 0)
1474 return ret;
1475 if (ret < bytes + 2)
1476 return -EIO;
1477
1478 return 0;
1479}
1480
1481static int wm831x_i2c_probe(struct i2c_client *i2c,
1482 const struct i2c_device_id *id)
1483{
1484 struct wm831x *wm831x;
1485
1486 wm831x = kzalloc(sizeof(struct wm831x), GFP_KERNEL);
1487 if (wm831x == NULL) {
1488 kfree(i2c);
1489 return -ENOMEM;
1490 }
1491
1492 i2c_set_clientdata(i2c, wm831x);
1493 wm831x->dev = &i2c->dev;
1494 wm831x->control_data = i2c;
1495 wm831x->read_dev = wm831x_i2c_read_device;
1496 wm831x->write_dev = wm831x_i2c_write_device;
1497
1498 return wm831x_device_init(wm831x, id->driver_data, i2c->irq);
1499}
1500
1501static int wm831x_i2c_remove(struct i2c_client *i2c)
1502{
1503 struct wm831x *wm831x = i2c_get_clientdata(i2c);
1504
1505 wm831x_device_exit(wm831x);
1506
1507 return 0;
1508}
1509
1510static const struct i2c_device_id wm831x_i2c_id[] = {
1511 { "wm8310", WM8310 },
1512 { "wm8311", WM8311 },
1513 { "wm8312", WM8312 },
1514 { }
1515};
1516MODULE_DEVICE_TABLE(i2c, wm831x_i2c_id);
1517
1518
1519static struct i2c_driver wm831x_i2c_driver = {
1520 .driver = {
1521 .name = "wm831x",
1522 .owner = THIS_MODULE,
1523 },
1524 .probe = wm831x_i2c_probe,
1525 .remove = wm831x_i2c_remove,
1526 .id_table = wm831x_i2c_id,
1527};
1528
1529static int __init wm831x_i2c_init(void)
1530{
1531 int ret;
1532
1533 ret = i2c_add_driver(&wm831x_i2c_driver);
1534 if (ret != 0)
1535 pr_err("Failed to register wm831x I2C driver: %d\n", ret);
1536
1537 return ret;
1538}
1539subsys_initcall(wm831x_i2c_init);
1540
1541static void __exit wm831x_i2c_exit(void)
1542{
1543 i2c_del_driver(&wm831x_i2c_driver);
1544}
1545module_exit(wm831x_i2c_exit);
1546
1547MODULE_DESCRIPTION("I2C support for the WM831X AudioPlus PMIC");
1548MODULE_LICENSE("GPL");
1549MODULE_AUTHOR("Mark Brown");
diff --git a/drivers/mfd/wm831x-irq.c b/drivers/mfd/wm831x-irq.c
new file mode 100644
index 000000000000..d3015dfb9134
--- /dev/null
+++ b/drivers/mfd/wm831x-irq.c
@@ -0,0 +1,559 @@
1/*
2 * wm831x-irq.c -- Interrupt controller support for Wolfson WM831x PMICs
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/i2c.h>
18#include <linux/mfd/core.h>
19#include <linux/interrupt.h>
20
21#include <linux/mfd/wm831x/core.h>
22#include <linux/mfd/wm831x/pdata.h>
23#include <linux/mfd/wm831x/irq.h>
24
25#include <linux/delay.h>
26
27/*
28 * Since generic IRQs don't currently support interrupt controllers on
29 * interrupt driven buses we don't use genirq but instead provide an
30 * interface that looks very much like the standard ones. This leads
31 * to some bodges, including storing interrupt handler information in
32 * the static irq_data table we use to look up the data for individual
33 * interrupts, but hopefully won't last too long.
34 */
35
36struct wm831x_irq_data {
37 int primary;
38 int reg;
39 int mask;
40 irq_handler_t handler;
41 void *handler_data;
42};
43
44static struct wm831x_irq_data wm831x_irqs[] = {
45 [WM831X_IRQ_TEMP_THW] = {
46 .primary = WM831X_TEMP_INT,
47 .reg = 1,
48 .mask = WM831X_TEMP_THW_EINT,
49 },
50 [WM831X_IRQ_GPIO_1] = {
51 .primary = WM831X_GP_INT,
52 .reg = 5,
53 .mask = WM831X_GP1_EINT,
54 },
55 [WM831X_IRQ_GPIO_2] = {
56 .primary = WM831X_GP_INT,
57 .reg = 5,
58 .mask = WM831X_GP2_EINT,
59 },
60 [WM831X_IRQ_GPIO_3] = {
61 .primary = WM831X_GP_INT,
62 .reg = 5,
63 .mask = WM831X_GP3_EINT,
64 },
65 [WM831X_IRQ_GPIO_4] = {
66 .primary = WM831X_GP_INT,
67 .reg = 5,
68 .mask = WM831X_GP4_EINT,
69 },
70 [WM831X_IRQ_GPIO_5] = {
71 .primary = WM831X_GP_INT,
72 .reg = 5,
73 .mask = WM831X_GP5_EINT,
74 },
75 [WM831X_IRQ_GPIO_6] = {
76 .primary = WM831X_GP_INT,
77 .reg = 5,
78 .mask = WM831X_GP6_EINT,
79 },
80 [WM831X_IRQ_GPIO_7] = {
81 .primary = WM831X_GP_INT,
82 .reg = 5,
83 .mask = WM831X_GP7_EINT,
84 },
85 [WM831X_IRQ_GPIO_8] = {
86 .primary = WM831X_GP_INT,
87 .reg = 5,
88 .mask = WM831X_GP8_EINT,
89 },
90 [WM831X_IRQ_GPIO_9] = {
91 .primary = WM831X_GP_INT,
92 .reg = 5,
93 .mask = WM831X_GP9_EINT,
94 },
95 [WM831X_IRQ_GPIO_10] = {
96 .primary = WM831X_GP_INT,
97 .reg = 5,
98 .mask = WM831X_GP10_EINT,
99 },
100 [WM831X_IRQ_GPIO_11] = {
101 .primary = WM831X_GP_INT,
102 .reg = 5,
103 .mask = WM831X_GP11_EINT,
104 },
105 [WM831X_IRQ_GPIO_12] = {
106 .primary = WM831X_GP_INT,
107 .reg = 5,
108 .mask = WM831X_GP12_EINT,
109 },
110 [WM831X_IRQ_GPIO_13] = {
111 .primary = WM831X_GP_INT,
112 .reg = 5,
113 .mask = WM831X_GP13_EINT,
114 },
115 [WM831X_IRQ_GPIO_14] = {
116 .primary = WM831X_GP_INT,
117 .reg = 5,
118 .mask = WM831X_GP14_EINT,
119 },
120 [WM831X_IRQ_GPIO_15] = {
121 .primary = WM831X_GP_INT,
122 .reg = 5,
123 .mask = WM831X_GP15_EINT,
124 },
125 [WM831X_IRQ_GPIO_16] = {
126 .primary = WM831X_GP_INT,
127 .reg = 5,
128 .mask = WM831X_GP16_EINT,
129 },
130 [WM831X_IRQ_ON] = {
131 .primary = WM831X_ON_PIN_INT,
132 .reg = 1,
133 .mask = WM831X_ON_PIN_EINT,
134 },
135 [WM831X_IRQ_PPM_SYSLO] = {
136 .primary = WM831X_PPM_INT,
137 .reg = 1,
138 .mask = WM831X_PPM_SYSLO_EINT,
139 },
140 [WM831X_IRQ_PPM_PWR_SRC] = {
141 .primary = WM831X_PPM_INT,
142 .reg = 1,
143 .mask = WM831X_PPM_PWR_SRC_EINT,
144 },
145 [WM831X_IRQ_PPM_USB_CURR] = {
146 .primary = WM831X_PPM_INT,
147 .reg = 1,
148 .mask = WM831X_PPM_USB_CURR_EINT,
149 },
150 [WM831X_IRQ_WDOG_TO] = {
151 .primary = WM831X_WDOG_INT,
152 .reg = 1,
153 .mask = WM831X_WDOG_TO_EINT,
154 },
155 [WM831X_IRQ_RTC_PER] = {
156 .primary = WM831X_RTC_INT,
157 .reg = 1,
158 .mask = WM831X_RTC_PER_EINT,
159 },
160 [WM831X_IRQ_RTC_ALM] = {
161 .primary = WM831X_RTC_INT,
162 .reg = 1,
163 .mask = WM831X_RTC_ALM_EINT,
164 },
165 [WM831X_IRQ_CHG_BATT_HOT] = {
166 .primary = WM831X_CHG_INT,
167 .reg = 2,
168 .mask = WM831X_CHG_BATT_HOT_EINT,
169 },
170 [WM831X_IRQ_CHG_BATT_COLD] = {
171 .primary = WM831X_CHG_INT,
172 .reg = 2,
173 .mask = WM831X_CHG_BATT_COLD_EINT,
174 },
175 [WM831X_IRQ_CHG_BATT_FAIL] = {
176 .primary = WM831X_CHG_INT,
177 .reg = 2,
178 .mask = WM831X_CHG_BATT_FAIL_EINT,
179 },
180 [WM831X_IRQ_CHG_OV] = {
181 .primary = WM831X_CHG_INT,
182 .reg = 2,
183 .mask = WM831X_CHG_OV_EINT,
184 },
185 [WM831X_IRQ_CHG_END] = {
186 .primary = WM831X_CHG_INT,
187 .reg = 2,
188 .mask = WM831X_CHG_END_EINT,
189 },
190 [WM831X_IRQ_CHG_TO] = {
191 .primary = WM831X_CHG_INT,
192 .reg = 2,
193 .mask = WM831X_CHG_TO_EINT,
194 },
195 [WM831X_IRQ_CHG_MODE] = {
196 .primary = WM831X_CHG_INT,
197 .reg = 2,
198 .mask = WM831X_CHG_MODE_EINT,
199 },
200 [WM831X_IRQ_CHG_START] = {
201 .primary = WM831X_CHG_INT,
202 .reg = 2,
203 .mask = WM831X_CHG_START_EINT,
204 },
205 [WM831X_IRQ_TCHDATA] = {
206 .primary = WM831X_TCHDATA_INT,
207 .reg = 1,
208 .mask = WM831X_TCHDATA_EINT,
209 },
210 [WM831X_IRQ_TCHPD] = {
211 .primary = WM831X_TCHPD_INT,
212 .reg = 1,
213 .mask = WM831X_TCHPD_EINT,
214 },
215 [WM831X_IRQ_AUXADC_DATA] = {
216 .primary = WM831X_AUXADC_INT,
217 .reg = 1,
218 .mask = WM831X_AUXADC_DATA_EINT,
219 },
220 [WM831X_IRQ_AUXADC_DCOMP1] = {
221 .primary = WM831X_AUXADC_INT,
222 .reg = 1,
223 .mask = WM831X_AUXADC_DCOMP1_EINT,
224 },
225 [WM831X_IRQ_AUXADC_DCOMP2] = {
226 .primary = WM831X_AUXADC_INT,
227 .reg = 1,
228 .mask = WM831X_AUXADC_DCOMP2_EINT,
229 },
230 [WM831X_IRQ_AUXADC_DCOMP3] = {
231 .primary = WM831X_AUXADC_INT,
232 .reg = 1,
233 .mask = WM831X_AUXADC_DCOMP3_EINT,
234 },
235 [WM831X_IRQ_AUXADC_DCOMP4] = {
236 .primary = WM831X_AUXADC_INT,
237 .reg = 1,
238 .mask = WM831X_AUXADC_DCOMP4_EINT,
239 },
240 [WM831X_IRQ_CS1] = {
241 .primary = WM831X_CS_INT,
242 .reg = 2,
243 .mask = WM831X_CS1_EINT,
244 },
245 [WM831X_IRQ_CS2] = {
246 .primary = WM831X_CS_INT,
247 .reg = 2,
248 .mask = WM831X_CS2_EINT,
249 },
250 [WM831X_IRQ_HC_DC1] = {
251 .primary = WM831X_HC_INT,
252 .reg = 4,
253 .mask = WM831X_HC_DC1_EINT,
254 },
255 [WM831X_IRQ_HC_DC2] = {
256 .primary = WM831X_HC_INT,
257 .reg = 4,
258 .mask = WM831X_HC_DC2_EINT,
259 },
260 [WM831X_IRQ_UV_LDO1] = {
261 .primary = WM831X_UV_INT,
262 .reg = 3,
263 .mask = WM831X_UV_LDO1_EINT,
264 },
265 [WM831X_IRQ_UV_LDO2] = {
266 .primary = WM831X_UV_INT,
267 .reg = 3,
268 .mask = WM831X_UV_LDO2_EINT,
269 },
270 [WM831X_IRQ_UV_LDO3] = {
271 .primary = WM831X_UV_INT,
272 .reg = 3,
273 .mask = WM831X_UV_LDO3_EINT,
274 },
275 [WM831X_IRQ_UV_LDO4] = {
276 .primary = WM831X_UV_INT,
277 .reg = 3,
278 .mask = WM831X_UV_LDO4_EINT,
279 },
280 [WM831X_IRQ_UV_LDO5] = {
281 .primary = WM831X_UV_INT,
282 .reg = 3,
283 .mask = WM831X_UV_LDO5_EINT,
284 },
285 [WM831X_IRQ_UV_LDO6] = {
286 .primary = WM831X_UV_INT,
287 .reg = 3,
288 .mask = WM831X_UV_LDO6_EINT,
289 },
290 [WM831X_IRQ_UV_LDO7] = {
291 .primary = WM831X_UV_INT,
292 .reg = 3,
293 .mask = WM831X_UV_LDO7_EINT,
294 },
295 [WM831X_IRQ_UV_LDO8] = {
296 .primary = WM831X_UV_INT,
297 .reg = 3,
298 .mask = WM831X_UV_LDO8_EINT,
299 },
300 [WM831X_IRQ_UV_LDO9] = {
301 .primary = WM831X_UV_INT,
302 .reg = 3,
303 .mask = WM831X_UV_LDO9_EINT,
304 },
305 [WM831X_IRQ_UV_LDO10] = {
306 .primary = WM831X_UV_INT,
307 .reg = 3,
308 .mask = WM831X_UV_LDO10_EINT,
309 },
310 [WM831X_IRQ_UV_DC1] = {
311 .primary = WM831X_UV_INT,
312 .reg = 4,
313 .mask = WM831X_UV_DC1_EINT,
314 },
315 [WM831X_IRQ_UV_DC2] = {
316 .primary = WM831X_UV_INT,
317 .reg = 4,
318 .mask = WM831X_UV_DC2_EINT,
319 },
320 [WM831X_IRQ_UV_DC3] = {
321 .primary = WM831X_UV_INT,
322 .reg = 4,
323 .mask = WM831X_UV_DC3_EINT,
324 },
325 [WM831X_IRQ_UV_DC4] = {
326 .primary = WM831X_UV_INT,
327 .reg = 4,
328 .mask = WM831X_UV_DC4_EINT,
329 },
330};
331
332static inline int irq_data_to_status_reg(struct wm831x_irq_data *irq_data)
333{
334 return WM831X_INTERRUPT_STATUS_1 - 1 + irq_data->reg;
335}
336
337static inline int irq_data_to_mask_reg(struct wm831x_irq_data *irq_data)
338{
339 return WM831X_INTERRUPT_STATUS_1_MASK - 1 + irq_data->reg;
340}
341
342static void __wm831x_enable_irq(struct wm831x *wm831x, int irq)
343{
344 struct wm831x_irq_data *irq_data = &wm831x_irqs[irq];
345
346 wm831x->irq_masks[irq_data->reg - 1] &= ~irq_data->mask;
347 wm831x_reg_write(wm831x, irq_data_to_mask_reg(irq_data),
348 wm831x->irq_masks[irq_data->reg - 1]);
349}
350
351void wm831x_enable_irq(struct wm831x *wm831x, int irq)
352{
353 mutex_lock(&wm831x->irq_lock);
354 __wm831x_enable_irq(wm831x, irq);
355 mutex_unlock(&wm831x->irq_lock);
356}
357EXPORT_SYMBOL_GPL(wm831x_enable_irq);
358
359static void __wm831x_disable_irq(struct wm831x *wm831x, int irq)
360{
361 struct wm831x_irq_data *irq_data = &wm831x_irqs[irq];
362
363 wm831x->irq_masks[irq_data->reg - 1] |= irq_data->mask;
364 wm831x_reg_write(wm831x, irq_data_to_mask_reg(irq_data),
365 wm831x->irq_masks[irq_data->reg - 1]);
366}
367
368void wm831x_disable_irq(struct wm831x *wm831x, int irq)
369{
370 mutex_lock(&wm831x->irq_lock);
371 __wm831x_disable_irq(wm831x, irq);
372 mutex_unlock(&wm831x->irq_lock);
373}
374EXPORT_SYMBOL_GPL(wm831x_disable_irq);
375
376int wm831x_request_irq(struct wm831x *wm831x,
377 unsigned int irq, irq_handler_t handler,
378 unsigned long flags, const char *name,
379 void *dev)
380{
381 int ret = 0;
382
383 if (irq < 0 || irq >= WM831X_NUM_IRQS)
384 return -EINVAL;
385
386 mutex_lock(&wm831x->irq_lock);
387
388 if (wm831x_irqs[irq].handler) {
389 dev_err(wm831x->dev, "Already have handler for IRQ %d\n", irq);
390 ret = -EINVAL;
391 goto out;
392 }
393
394 wm831x_irqs[irq].handler = handler;
395 wm831x_irqs[irq].handler_data = dev;
396
397 __wm831x_enable_irq(wm831x, irq);
398
399out:
400 mutex_unlock(&wm831x->irq_lock);
401
402 return ret;
403}
404EXPORT_SYMBOL_GPL(wm831x_request_irq);
405
406void wm831x_free_irq(struct wm831x *wm831x, unsigned int irq, void *data)
407{
408 if (irq < 0 || irq >= WM831X_NUM_IRQS)
409 return;
410
411 mutex_lock(&wm831x->irq_lock);
412
413 wm831x_irqs[irq].handler = NULL;
414 wm831x_irqs[irq].handler_data = NULL;
415
416 __wm831x_disable_irq(wm831x, irq);
417
418 mutex_unlock(&wm831x->irq_lock);
419}
420EXPORT_SYMBOL_GPL(wm831x_free_irq);
421
422
423static void wm831x_handle_irq(struct wm831x *wm831x, int irq, int status)
424{
425 struct wm831x_irq_data *irq_data = &wm831x_irqs[irq];
426
427 if (irq_data->handler) {
428 irq_data->handler(irq, irq_data->handler_data);
429 wm831x_reg_write(wm831x, irq_data_to_status_reg(irq_data),
430 irq_data->mask);
431 } else {
432 dev_err(wm831x->dev, "Unhandled IRQ %d, masking\n", irq);
433 __wm831x_disable_irq(wm831x, irq);
434 }
435}
436
437/* Main interrupt handling occurs in a workqueue since we need
438 * interrupts enabled to interact with the chip. */
439static void wm831x_irq_worker(struct work_struct *work)
440{
441 struct wm831x *wm831x = container_of(work, struct wm831x, irq_work);
442 unsigned int i;
443 int primary;
444 int status_regs[5];
445 int read[5] = { 0 };
446 int *status;
447
448 primary = wm831x_reg_read(wm831x, WM831X_SYSTEM_INTERRUPTS);
449 if (primary < 0) {
450 dev_err(wm831x->dev, "Failed to read system interrupt: %d\n",
451 primary);
452 goto out;
453 }
454
455 mutex_lock(&wm831x->irq_lock);
456
457 for (i = 0; i < ARRAY_SIZE(wm831x_irqs); i++) {
458 int offset = wm831x_irqs[i].reg - 1;
459
460 if (!(primary & wm831x_irqs[i].primary))
461 continue;
462
463 status = &status_regs[offset];
464
465 /* Hopefully there should only be one register to read
466 * each time otherwise we ought to do a block read. */
467 if (!read[offset]) {
468 *status = wm831x_reg_read(wm831x,
469 irq_data_to_status_reg(&wm831x_irqs[i]));
470 if (*status < 0) {
471 dev_err(wm831x->dev,
472 "Failed to read IRQ status: %d\n",
473 *status);
474 goto out_lock;
475 }
476
477 /* Mask out the disabled IRQs */
478 *status &= ~wm831x->irq_masks[offset];
479 read[offset] = 1;
480 }
481
482 if (*status & wm831x_irqs[i].mask)
483 wm831x_handle_irq(wm831x, i, *status);
484 }
485
486out_lock:
487 mutex_unlock(&wm831x->irq_lock);
488out:
489 enable_irq(wm831x->irq);
490}
491
492
493static irqreturn_t wm831x_cpu_irq(int irq, void *data)
494{
495 struct wm831x *wm831x = data;
496
497 /* Shut the interrupt to the CPU up and schedule the actual
498 * handler; we can't check that the IRQ is asserted. */
499 disable_irq_nosync(irq);
500
501 queue_work(wm831x->irq_wq, &wm831x->irq_work);
502
503 return IRQ_HANDLED;
504}
505
506int wm831x_irq_init(struct wm831x *wm831x, int irq)
507{
508 int i, ret;
509
510 if (!irq) {
511 dev_warn(wm831x->dev,
512 "No interrupt specified - functionality limited\n");
513 return 0;
514 }
515
516
517 wm831x->irq_wq = create_singlethread_workqueue("wm831x-irq");
518 if (!wm831x->irq_wq) {
519 dev_err(wm831x->dev, "Failed to allocate IRQ worker\n");
520 return -ESRCH;
521 }
522
523 wm831x->irq = irq;
524 mutex_init(&wm831x->irq_lock);
525 INIT_WORK(&wm831x->irq_work, wm831x_irq_worker);
526
527 /* Mask the individual interrupt sources */
528 for (i = 0; i < ARRAY_SIZE(wm831x->irq_masks); i++) {
529 wm831x->irq_masks[i] = 0xffff;
530 wm831x_reg_write(wm831x, WM831X_INTERRUPT_STATUS_1_MASK + i,
531 0xffff);
532 }
533
534 /* Enable top level interrupts, we mask at secondary level */
535 wm831x_reg_write(wm831x, WM831X_SYSTEM_INTERRUPTS_MASK, 0);
536
537 /* We're good to go. We set IRQF_SHARED since there's a
538 * chance the driver will interoperate with another driver but
539 * the need to disable the IRQ while handing via I2C/SPI means
540 * that this may break and performance will be impacted. If
541 * this does happen it's a hardware design issue and the only
542 * other alternative would be polling.
543 */
544 ret = request_irq(irq, wm831x_cpu_irq, IRQF_TRIGGER_LOW | IRQF_SHARED,
545 "wm831x", wm831x);
546 if (ret != 0) {
547 dev_err(wm831x->dev, "Failed to request IRQ %d: %d\n",
548 irq, ret);
549 return ret;
550 }
551
552 return 0;
553}
554
555void wm831x_irq_exit(struct wm831x *wm831x)
556{
557 if (wm831x->irq)
558 free_irq(wm831x->irq, wm831x);
559}
diff --git a/drivers/mfd/wm831x-otp.c b/drivers/mfd/wm831x-otp.c
new file mode 100644
index 000000000000..f742745ff354
--- /dev/null
+++ b/drivers/mfd/wm831x-otp.c
@@ -0,0 +1,83 @@
1/*
2 * wm831x-otp.c -- OTP for Wolfson WM831x PMICs
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/i2c.h>
18#include <linux/bcd.h>
19#include <linux/delay.h>
20#include <linux/mfd/core.h>
21
22#include <linux/mfd/wm831x/core.h>
23#include <linux/mfd/wm831x/otp.h>
24
25/* In bytes */
26#define WM831X_UNIQUE_ID_LEN 16
27
28/* Read the unique ID from the chip into id */
29static int wm831x_unique_id_read(struct wm831x *wm831x, char *id)
30{
31 int i, val;
32
33 for (i = 0; i < WM831X_UNIQUE_ID_LEN / 2; i++) {
34 val = wm831x_reg_read(wm831x, WM831X_UNIQUE_ID_1 + i);
35 if (val < 0)
36 return val;
37
38 id[i * 2] = (val >> 8) & 0xff;
39 id[(i * 2) + 1] = val & 0xff;
40 }
41
42 return 0;
43}
44
45static ssize_t wm831x_unique_id_show(struct device *dev,
46 struct device_attribute *attr, char *buf)
47{
48 struct wm831x *wm831x = dev_get_drvdata(dev);
49 int i, rval;
50 char id[WM831X_UNIQUE_ID_LEN];
51 ssize_t ret = 0;
52
53 rval = wm831x_unique_id_read(wm831x, id);
54 if (rval < 0)
55 return 0;
56
57 for (i = 0; i < WM831X_UNIQUE_ID_LEN; i++)
58 ret += sprintf(&buf[ret], "%02x", buf[i]);
59
60 ret += sprintf(&buf[ret], "\n");
61
62 return ret;
63}
64
65static DEVICE_ATTR(unique_id, 0444, wm831x_unique_id_show, NULL);
66
67int wm831x_otp_init(struct wm831x *wm831x)
68{
69 int ret;
70
71 ret = device_create_file(wm831x->dev, &dev_attr_unique_id);
72 if (ret != 0)
73 dev_err(wm831x->dev, "Unique ID attribute not created: %d\n",
74 ret);
75
76 return ret;
77}
78
79void wm831x_otp_exit(struct wm831x *wm831x)
80{
81 device_remove_file(wm831x->dev, &dev_attr_unique_id);
82}
83
diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c
index fe24079387c5..ba27c9dc1ad3 100644
--- a/drivers/mfd/wm8350-core.c
+++ b/drivers/mfd/wm8350-core.c
@@ -353,15 +353,15 @@ static void wm8350_irq_call_handler(struct wm8350 *wm8350, int irq)
353} 353}
354 354
355/* 355/*
356 * wm8350_irq_worker actually handles the interrupts. Since all 356 * This is a threaded IRQ handler so can access I2C/SPI. Since all
357 * interrupts are clear on read the IRQ line will be reasserted and 357 * interrupts are clear on read the IRQ line will be reasserted and
358 * the physical IRQ will be handled again if another interrupt is 358 * the physical IRQ will be handled again if another interrupt is
359 * asserted while we run - in the normal course of events this is a 359 * asserted while we run - in the normal course of events this is a
360 * rare occurrence so we save I2C/SPI reads. 360 * rare occurrence so we save I2C/SPI reads.
361 */ 361 */
362static void wm8350_irq_worker(struct work_struct *work) 362static irqreturn_t wm8350_irq(int irq, void *data)
363{ 363{
364 struct wm8350 *wm8350 = container_of(work, struct wm8350, irq_work); 364 struct wm8350 *wm8350 = data;
365 u16 level_one, status1, status2, comp; 365 u16 level_one, status1, status2, comp;
366 366
367 /* TODO: Use block reads to improve performance? */ 367 /* TODO: Use block reads to improve performance? */
@@ -552,16 +552,6 @@ static void wm8350_irq_worker(struct work_struct *work)
552 } 552 }
553 } 553 }
554 554
555 enable_irq(wm8350->chip_irq);
556}
557
558static irqreturn_t wm8350_irq(int irq, void *data)
559{
560 struct wm8350 *wm8350 = data;
561
562 disable_irq_nosync(irq);
563 schedule_work(&wm8350->irq_work);
564
565 return IRQ_HANDLED; 555 return IRQ_HANDLED;
566} 556}
567 557
@@ -1428,9 +1418,8 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq,
1428 1418
1429 mutex_init(&wm8350->auxadc_mutex); 1419 mutex_init(&wm8350->auxadc_mutex);
1430 mutex_init(&wm8350->irq_mutex); 1420 mutex_init(&wm8350->irq_mutex);
1431 INIT_WORK(&wm8350->irq_work, wm8350_irq_worker);
1432 if (irq) { 1421 if (irq) {
1433 int flags = 0; 1422 int flags = IRQF_ONESHOT;
1434 1423
1435 if (pdata && pdata->irq_high) { 1424 if (pdata && pdata->irq_high) {
1436 flags |= IRQF_TRIGGER_HIGH; 1425 flags |= IRQF_TRIGGER_HIGH;
@@ -1444,8 +1433,8 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq,
1444 WM8350_IRQ_POL); 1433 WM8350_IRQ_POL);
1445 } 1434 }
1446 1435
1447 ret = request_irq(irq, wm8350_irq, flags, 1436 ret = request_threaded_irq(irq, NULL, wm8350_irq, flags,
1448 "wm8350", wm8350); 1437 "wm8350", wm8350);
1449 if (ret != 0) { 1438 if (ret != 0) {
1450 dev_err(wm8350->dev, "Failed to request IRQ: %d\n", 1439 dev_err(wm8350->dev, "Failed to request IRQ: %d\n",
1451 ret); 1440 ret);
@@ -1472,6 +1461,8 @@ int wm8350_device_init(struct wm8350 *wm8350, int irq,
1472 &(wm8350->codec.pdev)); 1461 &(wm8350->codec.pdev));
1473 wm8350_client_dev_register(wm8350, "wm8350-gpio", 1462 wm8350_client_dev_register(wm8350, "wm8350-gpio",
1474 &(wm8350->gpio.pdev)); 1463 &(wm8350->gpio.pdev));
1464 wm8350_client_dev_register(wm8350, "wm8350-hwmon",
1465 &(wm8350->hwmon.pdev));
1475 wm8350_client_dev_register(wm8350, "wm8350-power", 1466 wm8350_client_dev_register(wm8350, "wm8350-power",
1476 &(wm8350->power.pdev)); 1467 &(wm8350->power.pdev));
1477 wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev)); 1468 wm8350_client_dev_register(wm8350, "wm8350-rtc", &(wm8350->rtc.pdev));
@@ -1498,11 +1489,11 @@ void wm8350_device_exit(struct wm8350 *wm8350)
1498 platform_device_unregister(wm8350->wdt.pdev); 1489 platform_device_unregister(wm8350->wdt.pdev);
1499 platform_device_unregister(wm8350->rtc.pdev); 1490 platform_device_unregister(wm8350->rtc.pdev);
1500 platform_device_unregister(wm8350->power.pdev); 1491 platform_device_unregister(wm8350->power.pdev);
1492 platform_device_unregister(wm8350->hwmon.pdev);
1501 platform_device_unregister(wm8350->gpio.pdev); 1493 platform_device_unregister(wm8350->gpio.pdev);
1502 platform_device_unregister(wm8350->codec.pdev); 1494 platform_device_unregister(wm8350->codec.pdev);
1503 1495
1504 free_irq(wm8350->chip_irq, wm8350); 1496 free_irq(wm8350->chip_irq, wm8350);
1505 flush_work(&wm8350->irq_work);
1506 kfree(wm8350->reg_cache); 1497 kfree(wm8350->reg_cache);
1507} 1498}
1508EXPORT_SYMBOL_GPL(wm8350_device_exit); 1499EXPORT_SYMBOL_GPL(wm8350_device_exit);
diff --git a/drivers/misc/sgi-xp/xpc_sn2.c b/drivers/misc/sgi-xp/xpc_sn2.c
index 915a3b495da5..8b70e03f939f 100644
--- a/drivers/misc/sgi-xp/xpc_sn2.c
+++ b/drivers/misc/sgi-xp/xpc_sn2.c
@@ -279,7 +279,7 @@ xpc_check_for_sent_chctl_flags_sn2(struct xpc_partition *part)
279 spin_unlock_irqrestore(&part->chctl_lock, irq_flags); 279 spin_unlock_irqrestore(&part->chctl_lock, irq_flags);
280 280
281 dev_dbg(xpc_chan, "received notify IRQ from partid=%d, chctl.all_flags=" 281 dev_dbg(xpc_chan, "received notify IRQ from partid=%d, chctl.all_flags="
282 "0x%lx\n", XPC_PARTID(part), chctl.all_flags); 282 "0x%llx\n", XPC_PARTID(part), chctl.all_flags);
283 283
284 xpc_wakeup_channel_mgr(part); 284 xpc_wakeup_channel_mgr(part);
285} 285}
@@ -615,7 +615,8 @@ xpc_get_partition_rsvd_page_pa_sn2(void *buf, u64 *cookie, unsigned long *rp_pa,
615 s64 status; 615 s64 status;
616 enum xp_retval ret; 616 enum xp_retval ret;
617 617
618 status = sn_partition_reserved_page_pa((u64)buf, cookie, rp_pa, len); 618 status = sn_partition_reserved_page_pa((u64)buf, cookie,
619 (u64 *)rp_pa, (u64 *)len);
619 if (status == SALRET_OK) 620 if (status == SALRET_OK)
620 ret = xpSuccess; 621 ret = xpSuccess;
621 else if (status == SALRET_MORE_PASSES) 622 else if (status == SALRET_MORE_PASSES)
@@ -777,8 +778,8 @@ xpc_get_remote_heartbeat_sn2(struct xpc_partition *part)
777 if (ret != xpSuccess) 778 if (ret != xpSuccess)
778 return ret; 779 return ret;
779 780
780 dev_dbg(xpc_part, "partid=%d, heartbeat=%ld, last_heartbeat=%ld, " 781 dev_dbg(xpc_part, "partid=%d, heartbeat=%lld, last_heartbeat=%lld, "
781 "heartbeat_offline=%ld, HB_mask[0]=0x%lx\n", XPC_PARTID(part), 782 "heartbeat_offline=%lld, HB_mask[0]=0x%lx\n", XPC_PARTID(part),
782 remote_vars->heartbeat, part->last_heartbeat, 783 remote_vars->heartbeat, part->last_heartbeat,
783 remote_vars->heartbeat_offline, 784 remote_vars->heartbeat_offline,
784 remote_vars->heartbeating_to_mask[0]); 785 remote_vars->heartbeating_to_mask[0]);
@@ -940,7 +941,7 @@ xpc_update_partition_info_sn2(struct xpc_partition *part, u8 remote_rp_version,
940 part_sn2->remote_vars_pa); 941 part_sn2->remote_vars_pa);
941 942
942 part->last_heartbeat = remote_vars->heartbeat - 1; 943 part->last_heartbeat = remote_vars->heartbeat - 1;
943 dev_dbg(xpc_part, " last_heartbeat = 0x%016lx\n", 944 dev_dbg(xpc_part, " last_heartbeat = 0x%016llx\n",
944 part->last_heartbeat); 945 part->last_heartbeat);
945 946
946 part_sn2->remote_vars_part_pa = remote_vars->vars_part_pa; 947 part_sn2->remote_vars_part_pa = remote_vars->vars_part_pa;
@@ -1029,7 +1030,8 @@ xpc_identify_activate_IRQ_req_sn2(int nasid)
1029 part->activate_IRQ_rcvd++; 1030 part->activate_IRQ_rcvd++;
1030 1031
1031 dev_dbg(xpc_part, "partid for nasid %d is %d; IRQs = %d; HB = " 1032 dev_dbg(xpc_part, "partid for nasid %d is %d; IRQs = %d; HB = "
1032 "%ld:0x%lx\n", (int)nasid, (int)partid, part->activate_IRQ_rcvd, 1033 "%lld:0x%lx\n", (int)nasid, (int)partid,
1034 part->activate_IRQ_rcvd,
1033 remote_vars->heartbeat, remote_vars->heartbeating_to_mask[0]); 1035 remote_vars->heartbeat, remote_vars->heartbeating_to_mask[0]);
1034 1036
1035 if (xpc_partition_disengaged(part) && 1037 if (xpc_partition_disengaged(part) &&
@@ -1129,7 +1131,7 @@ xpc_identify_activate_IRQ_sender_sn2(void)
1129 do { 1131 do {
1130 n_IRQs_detected++; 1132 n_IRQs_detected++;
1131 nasid = (l * BITS_PER_LONG + b) * 2; 1133 nasid = (l * BITS_PER_LONG + b) * 2;
1132 dev_dbg(xpc_part, "interrupt from nasid %ld\n", nasid); 1134 dev_dbg(xpc_part, "interrupt from nasid %lld\n", nasid);
1133 xpc_identify_activate_IRQ_req_sn2(nasid); 1135 xpc_identify_activate_IRQ_req_sn2(nasid);
1134 1136
1135 b = find_next_bit(&nasid_mask_long, BITS_PER_LONG, 1137 b = find_next_bit(&nasid_mask_long, BITS_PER_LONG,
@@ -1386,7 +1388,7 @@ xpc_pull_remote_vars_part_sn2(struct xpc_partition *part)
1386 1388
1387 if (pulled_entry->magic != 0) { 1389 if (pulled_entry->magic != 0) {
1388 dev_dbg(xpc_chan, "partition %d's XPC vars_part for " 1390 dev_dbg(xpc_chan, "partition %d's XPC vars_part for "
1389 "partition %d has bad magic value (=0x%lx)\n", 1391 "partition %d has bad magic value (=0x%llx)\n",
1390 partid, sn_partition_id, pulled_entry->magic); 1392 partid, sn_partition_id, pulled_entry->magic);
1391 return xpBadMagic; 1393 return xpBadMagic;
1392 } 1394 }
@@ -1730,14 +1732,14 @@ xpc_notify_senders_sn2(struct xpc_channel *ch, enum xp_retval reason, s64 put)
1730 1732
1731 if (notify->func != NULL) { 1733 if (notify->func != NULL) {
1732 dev_dbg(xpc_chan, "notify->func() called, notify=0x%p " 1734 dev_dbg(xpc_chan, "notify->func() called, notify=0x%p "
1733 "msg_number=%ld partid=%d channel=%d\n", 1735 "msg_number=%lld partid=%d channel=%d\n",
1734 (void *)notify, get, ch->partid, ch->number); 1736 (void *)notify, get, ch->partid, ch->number);
1735 1737
1736 notify->func(reason, ch->partid, ch->number, 1738 notify->func(reason, ch->partid, ch->number,
1737 notify->key); 1739 notify->key);
1738 1740
1739 dev_dbg(xpc_chan, "notify->func() returned, notify=0x%p" 1741 dev_dbg(xpc_chan, "notify->func() returned, notify=0x%p"
1740 " msg_number=%ld partid=%d channel=%d\n", 1742 " msg_number=%lld partid=%d channel=%d\n",
1741 (void *)notify, get, ch->partid, ch->number); 1743 (void *)notify, get, ch->partid, ch->number);
1742 } 1744 }
1743 } 1745 }
@@ -1858,7 +1860,7 @@ xpc_process_msg_chctl_flags_sn2(struct xpc_partition *part, int ch_number)
1858 1860
1859 ch_sn2->w_remote_GP.get = ch_sn2->remote_GP.get; 1861 ch_sn2->w_remote_GP.get = ch_sn2->remote_GP.get;
1860 1862
1861 dev_dbg(xpc_chan, "w_remote_GP.get changed to %ld, partid=%d, " 1863 dev_dbg(xpc_chan, "w_remote_GP.get changed to %lld, partid=%d, "
1862 "channel=%d\n", ch_sn2->w_remote_GP.get, ch->partid, 1864 "channel=%d\n", ch_sn2->w_remote_GP.get, ch->partid,
1863 ch->number); 1865 ch->number);
1864 1866
@@ -1885,7 +1887,7 @@ xpc_process_msg_chctl_flags_sn2(struct xpc_partition *part, int ch_number)
1885 smp_wmb(); /* ensure flags have been cleared before bte_copy */ 1887 smp_wmb(); /* ensure flags have been cleared before bte_copy */
1886 ch_sn2->w_remote_GP.put = ch_sn2->remote_GP.put; 1888 ch_sn2->w_remote_GP.put = ch_sn2->remote_GP.put;
1887 1889
1888 dev_dbg(xpc_chan, "w_remote_GP.put changed to %ld, partid=%d, " 1890 dev_dbg(xpc_chan, "w_remote_GP.put changed to %lld, partid=%d, "
1889 "channel=%d\n", ch_sn2->w_remote_GP.put, ch->partid, 1891 "channel=%d\n", ch_sn2->w_remote_GP.put, ch->partid,
1890 ch->number); 1892 ch->number);
1891 1893
@@ -1943,7 +1945,7 @@ xpc_pull_remote_msg_sn2(struct xpc_channel *ch, s64 get)
1943 if (ret != xpSuccess) { 1945 if (ret != xpSuccess) {
1944 1946
1945 dev_dbg(xpc_chan, "failed to pull %d msgs starting with" 1947 dev_dbg(xpc_chan, "failed to pull %d msgs starting with"
1946 " msg %ld from partition %d, channel=%d, " 1948 " msg %lld from partition %d, channel=%d, "
1947 "ret=%d\n", nmsgs, ch_sn2->next_msg_to_pull, 1949 "ret=%d\n", nmsgs, ch_sn2->next_msg_to_pull,
1948 ch->partid, ch->number, ret); 1950 ch->partid, ch->number, ret);
1949 1951
@@ -1995,7 +1997,7 @@ xpc_get_deliverable_payload_sn2(struct xpc_channel *ch)
1995 if (cmpxchg(&ch_sn2->w_local_GP.get, get, get + 1) == get) { 1997 if (cmpxchg(&ch_sn2->w_local_GP.get, get, get + 1) == get) {
1996 /* we got the entry referenced by get */ 1998 /* we got the entry referenced by get */
1997 1999
1998 dev_dbg(xpc_chan, "w_local_GP.get changed to %ld, " 2000 dev_dbg(xpc_chan, "w_local_GP.get changed to %lld, "
1999 "partid=%d, channel=%d\n", get + 1, 2001 "partid=%d, channel=%d\n", get + 1,
2000 ch->partid, ch->number); 2002 ch->partid, ch->number);
2001 2003
@@ -2062,7 +2064,7 @@ xpc_send_msgs_sn2(struct xpc_channel *ch, s64 initial_put)
2062 2064
2063 /* we just set the new value of local_GP->put */ 2065 /* we just set the new value of local_GP->put */
2064 2066
2065 dev_dbg(xpc_chan, "local_GP->put changed to %ld, partid=%d, " 2067 dev_dbg(xpc_chan, "local_GP->put changed to %lld, partid=%d, "
2066 "channel=%d\n", put, ch->partid, ch->number); 2068 "channel=%d\n", put, ch->partid, ch->number);
2067 2069
2068 send_msgrequest = 1; 2070 send_msgrequest = 1;
@@ -2147,8 +2149,8 @@ xpc_allocate_msg_sn2(struct xpc_channel *ch, u32 flags,
2147 DBUG_ON(msg->flags != 0); 2149 DBUG_ON(msg->flags != 0);
2148 msg->number = put; 2150 msg->number = put;
2149 2151
2150 dev_dbg(xpc_chan, "w_local_GP.put changed to %ld; msg=0x%p, " 2152 dev_dbg(xpc_chan, "w_local_GP.put changed to %lld; msg=0x%p, "
2151 "msg_number=%ld, partid=%d, channel=%d\n", put + 1, 2153 "msg_number=%lld, partid=%d, channel=%d\n", put + 1,
2152 (void *)msg, msg->number, ch->partid, ch->number); 2154 (void *)msg, msg->number, ch->partid, ch->number);
2153 2155
2154 *address_of_msg = msg; 2156 *address_of_msg = msg;
@@ -2296,7 +2298,7 @@ xpc_acknowledge_msgs_sn2(struct xpc_channel *ch, s64 initial_get, u8 msg_flags)
2296 2298
2297 /* we just set the new value of local_GP->get */ 2299 /* we just set the new value of local_GP->get */
2298 2300
2299 dev_dbg(xpc_chan, "local_GP->get changed to %ld, partid=%d, " 2301 dev_dbg(xpc_chan, "local_GP->get changed to %lld, partid=%d, "
2300 "channel=%d\n", get, ch->partid, ch->number); 2302 "channel=%d\n", get, ch->partid, ch->number);
2301 2303
2302 send_msgrequest = (msg_flags & XPC_M_SN2_INTERRUPT); 2304 send_msgrequest = (msg_flags & XPC_M_SN2_INTERRUPT);
@@ -2323,7 +2325,7 @@ xpc_received_payload_sn2(struct xpc_channel *ch, void *payload)
2323 msg = container_of(payload, struct xpc_msg_sn2, payload); 2325 msg = container_of(payload, struct xpc_msg_sn2, payload);
2324 msg_number = msg->number; 2326 msg_number = msg->number;
2325 2327
2326 dev_dbg(xpc_chan, "msg=0x%p, msg_number=%ld, partid=%d, channel=%d\n", 2328 dev_dbg(xpc_chan, "msg=0x%p, msg_number=%lld, partid=%d, channel=%d\n",
2327 (void *)msg, msg_number, ch->partid, ch->number); 2329 (void *)msg, msg_number, ch->partid, ch->number);
2328 2330
2329 DBUG_ON((((u64)msg - (u64)ch->sn.sn2.remote_msgqueue) / ch->entry_size) != 2331 DBUG_ON((((u64)msg - (u64)ch->sn.sn2.remote_msgqueue) / ch->entry_size) !=
diff --git a/drivers/mtd/nand/ams-delta.c b/drivers/mtd/nand/ams-delta.c
index 782994ead0e8..005b91f096f2 100644
--- a/drivers/mtd/nand/ams-delta.c
+++ b/drivers/mtd/nand/ams-delta.c
@@ -63,7 +63,7 @@ static void ams_delta_write_byte(struct mtd_info *mtd, u_char byte)
63{ 63{
64 struct nand_chip *this = mtd->priv; 64 struct nand_chip *this = mtd->priv;
65 65
66 omap_writew(0, (OMAP_MPUIO_BASE + OMAP_MPUIO_IO_CNTL)); 66 omap_writew(0, (OMAP1_MPUIO_BASE + OMAP_MPUIO_IO_CNTL));
67 omap_writew(byte, this->IO_ADDR_W); 67 omap_writew(byte, this->IO_ADDR_W);
68 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0); 68 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NWE, 0);
69 ndelay(40); 69 ndelay(40);
@@ -78,7 +78,7 @@ static u_char ams_delta_read_byte(struct mtd_info *mtd)
78 78
79 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0); 79 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 0);
80 ndelay(40); 80 ndelay(40);
81 omap_writew(~0, (OMAP_MPUIO_BASE + OMAP_MPUIO_IO_CNTL)); 81 omap_writew(~0, (OMAP1_MPUIO_BASE + OMAP_MPUIO_IO_CNTL));
82 res = omap_readw(this->IO_ADDR_R); 82 res = omap_readw(this->IO_ADDR_R);
83 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE, 83 ams_delta_latch2_write(AMS_DELTA_LATCH2_NAND_NRE,
84 AMS_DELTA_LATCH2_NAND_NRE); 84 AMS_DELTA_LATCH2_NAND_NRE);
@@ -178,8 +178,8 @@ static int __init ams_delta_init(void)
178 ams_delta_mtd->priv = this; 178 ams_delta_mtd->priv = this;
179 179
180 /* Set address of NAND IO lines */ 180 /* Set address of NAND IO lines */
181 this->IO_ADDR_R = (OMAP_MPUIO_BASE + OMAP_MPUIO_INPUT_LATCH); 181 this->IO_ADDR_R = (OMAP1_MPUIO_BASE + OMAP_MPUIO_INPUT_LATCH);
182 this->IO_ADDR_W = (OMAP_MPUIO_BASE + OMAP_MPUIO_OUTPUT); 182 this->IO_ADDR_W = (OMAP1_MPUIO_BASE + OMAP_MPUIO_OUTPUT);
183 this->read_byte = ams_delta_read_byte; 183 this->read_byte = ams_delta_read_byte;
184 this->write_buf = ams_delta_write_buf; 184 this->write_buf = ams_delta_write_buf;
185 this->read_buf = ams_delta_read_buf; 185 this->read_buf = ams_delta_read_buf;
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index f4317798e47c..2dc42bbf6fe9 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -82,6 +82,13 @@ config REGULATOR_TWL4030
82 This driver supports the voltage regulators provided by 82 This driver supports the voltage regulators provided by
83 this family of companion chips. 83 this family of companion chips.
84 84
85config REGULATOR_WM831X
86 tristate "Wolfson Microelcronics WM831x PMIC regulators"
87 depends on MFD_WM831X
88 help
89 Support the voltage and current regulators of the WM831x series
90 of PMIC devices.
91
85config REGULATOR_WM8350 92config REGULATOR_WM8350
86 tristate "Wolfson Microelectroncis WM8350 AudioPlus PMIC" 93 tristate "Wolfson Microelectroncis WM8350 AudioPlus PMIC"
87 depends on MFD_WM8350 94 depends on MFD_WM8350
@@ -117,4 +124,28 @@ config REGULATOR_LP3971
117 Say Y here to support the voltage regulators and convertors 124 Say Y here to support the voltage regulators and convertors
118 on National Semiconductors LP3971 PMIC 125 on National Semiconductors LP3971 PMIC
119 126
127config REGULATOR_PCAP
128 tristate "PCAP2 regulator driver"
129 depends on EZX_PCAP
130 help
131 This driver provides support for the voltage regulators of the
132 PCAP2 PMIC.
133
134config REGULATOR_MC13783
135 tristate "Support regulators on Freescale MC13783 PMIC"
136 depends on MFD_MC13783
137 help
138 Say y here to support the regulators found on the Freescale MC13783
139 PMIC.
140
141config REGULATOR_AB3100
142 tristate "ST-Ericsson AB3100 Regulator functions"
143 depends on AB3100_CORE
144 default y if AB3100_CORE
145 help
146 These regulators correspond to functionality in the
147 AB3100 analog baseband dealing with power regulators
148 for the system.
149
120endif 150endif
151
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 4d762c4cccfd..768b3316d6eb 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -12,9 +12,15 @@ obj-$(CONFIG_REGULATOR_BQ24022) += bq24022.o
12obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o 12obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o
13obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o 13obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o
14obj-$(CONFIG_REGULATOR_TWL4030) += twl4030-regulator.o 14obj-$(CONFIG_REGULATOR_TWL4030) += twl4030-regulator.o
15obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o
16obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o
17obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o
15obj-$(CONFIG_REGULATOR_WM8350) += wm8350-regulator.o 18obj-$(CONFIG_REGULATOR_WM8350) += wm8350-regulator.o
16obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o 19obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o
17obj-$(CONFIG_REGULATOR_DA903X) += da903x.o 20obj-$(CONFIG_REGULATOR_DA903X) += da903x.o
18obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o 21obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o
22obj-$(CONFIG_REGULATOR_PCAP) += pcap-regulator.o
23obj-$(CONFIG_REGULATOR_MC13783) += mc13783.o
24obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o
19 25
20ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG 26ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/ab3100.c b/drivers/regulator/ab3100.c
new file mode 100644
index 000000000000..49aeee823a25
--- /dev/null
+++ b/drivers/regulator/ab3100.c
@@ -0,0 +1,700 @@
1/*
2 * drivers/regulator/ab3100.c
3 *
4 * Copyright (C) 2008-2009 ST-Ericsson AB
5 * License terms: GNU General Public License (GPL) version 2
6 * Low-level control of the AB3100 IC Low Dropout (LDO)
7 * regulators, external regulator and buck converter
8 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
9 * Author: Linus Walleij <linus.walleij@stericsson.com>
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/err.h>
16#include <linux/delay.h>
17#include <linux/platform_device.h>
18#include <linux/regulator/driver.h>
19#include <linux/mfd/ab3100.h>
20
21/* LDO registers and some handy masking definitions for AB3100 */
22#define AB3100_LDO_A 0x40
23#define AB3100_LDO_C 0x41
24#define AB3100_LDO_D 0x42
25#define AB3100_LDO_E 0x43
26#define AB3100_LDO_E_SLEEP 0x44
27#define AB3100_LDO_F 0x45
28#define AB3100_LDO_G 0x46
29#define AB3100_LDO_H 0x47
30#define AB3100_LDO_H_SLEEP_MODE 0
31#define AB3100_LDO_H_SLEEP_EN 2
32#define AB3100_LDO_ON 4
33#define AB3100_LDO_H_VSEL_AC 5
34#define AB3100_LDO_K 0x48
35#define AB3100_LDO_EXT 0x49
36#define AB3100_BUCK 0x4A
37#define AB3100_BUCK_SLEEP 0x4B
38#define AB3100_REG_ON_MASK 0x10
39
40/**
41 * struct ab3100_regulator
42 * A struct passed around the individual regulator functions
43 * @platform_device: platform device holding this regulator
44 * @ab3100: handle to the AB3100 parent chip
45 * @plfdata: AB3100 platform data passed in at probe time
46 * @regreg: regulator register number in the AB3100
47 * @fixed_voltage: a fixed voltage for this regulator, if this
48 * 0 the voltages array is used instead.
49 * @typ_voltages: an array of available typical voltages for
50 * this regulator
51 * @voltages_len: length of the array of available voltages
52 */
53struct ab3100_regulator {
54 struct regulator_dev *rdev;
55 struct ab3100 *ab3100;
56 struct ab3100_platform_data *plfdata;
57 u8 regreg;
58 int fixed_voltage;
59 int const *typ_voltages;
60 u8 voltages_len;
61};
62
63/* The order in which registers are initialized */
64static const u8 ab3100_reg_init_order[AB3100_NUM_REGULATORS+2] = {
65 AB3100_LDO_A,
66 AB3100_LDO_C,
67 AB3100_LDO_E,
68 AB3100_LDO_E_SLEEP,
69 AB3100_LDO_F,
70 AB3100_LDO_G,
71 AB3100_LDO_H,
72 AB3100_LDO_K,
73 AB3100_LDO_EXT,
74 AB3100_BUCK,
75 AB3100_BUCK_SLEEP,
76 AB3100_LDO_D,
77};
78
79/* Preset (hardware defined) voltages for these regulators */
80#define LDO_A_VOLTAGE 2750000
81#define LDO_C_VOLTAGE 2650000
82#define LDO_D_VOLTAGE 2650000
83
84static const int const ldo_e_buck_typ_voltages[] = {
85 1800000,
86 1400000,
87 1300000,
88 1200000,
89 1100000,
90 1050000,
91 900000,
92};
93
94static const int const ldo_f_typ_voltages[] = {
95 1800000,
96 1400000,
97 1300000,
98 1200000,
99 1100000,
100 1050000,
101 2500000,
102 2650000,
103};
104
105static const int const ldo_g_typ_voltages[] = {
106 2850000,
107 2750000,
108 1800000,
109 1500000,
110};
111
112static const int const ldo_h_typ_voltages[] = {
113 2750000,
114 1800000,
115 1500000,
116 1200000,
117};
118
119static const int const ldo_k_typ_voltages[] = {
120 2750000,
121 1800000,
122};
123
124
125/* The regulator devices */
126static struct ab3100_regulator
127ab3100_regulators[AB3100_NUM_REGULATORS] = {
128 {
129 .regreg = AB3100_LDO_A,
130 .fixed_voltage = LDO_A_VOLTAGE,
131 },
132 {
133 .regreg = AB3100_LDO_C,
134 .fixed_voltage = LDO_C_VOLTAGE,
135 },
136 {
137 .regreg = AB3100_LDO_D,
138 .fixed_voltage = LDO_D_VOLTAGE,
139 },
140 {
141 .regreg = AB3100_LDO_E,
142 .typ_voltages = ldo_e_buck_typ_voltages,
143 .voltages_len = ARRAY_SIZE(ldo_e_buck_typ_voltages),
144 },
145 {
146 .regreg = AB3100_LDO_F,
147 .typ_voltages = ldo_f_typ_voltages,
148 .voltages_len = ARRAY_SIZE(ldo_f_typ_voltages),
149 },
150 {
151 .regreg = AB3100_LDO_G,
152 .typ_voltages = ldo_g_typ_voltages,
153 .voltages_len = ARRAY_SIZE(ldo_g_typ_voltages),
154 },
155 {
156 .regreg = AB3100_LDO_H,
157 .typ_voltages = ldo_h_typ_voltages,
158 .voltages_len = ARRAY_SIZE(ldo_h_typ_voltages),
159 },
160 {
161 .regreg = AB3100_LDO_K,
162 .typ_voltages = ldo_k_typ_voltages,
163 .voltages_len = ARRAY_SIZE(ldo_k_typ_voltages),
164 },
165 {
166 .regreg = AB3100_LDO_EXT,
167 /* No voltages for the external regulator */
168 },
169 {
170 .regreg = AB3100_BUCK,
171 .typ_voltages = ldo_e_buck_typ_voltages,
172 .voltages_len = ARRAY_SIZE(ldo_e_buck_typ_voltages),
173 },
174};
175
176/*
177 * General functions for enable, disable and is_enabled used for
178 * LDO: A,C,E,F,G,H,K,EXT and BUCK
179 */
180static int ab3100_enable_regulator(struct regulator_dev *reg)
181{
182 struct ab3100_regulator *abreg = reg->reg_data;
183 int err;
184 u8 regval;
185
186 err = ab3100_get_register_interruptible(abreg->ab3100, abreg->regreg,
187 &regval);
188 if (err) {
189 dev_warn(&reg->dev, "failed to get regid %d value\n",
190 abreg->regreg);
191 return err;
192 }
193
194 /* The regulator is already on, no reason to go further */
195 if (regval & AB3100_REG_ON_MASK)
196 return 0;
197
198 regval |= AB3100_REG_ON_MASK;
199
200 err = ab3100_set_register_interruptible(abreg->ab3100, abreg->regreg,
201 regval);
202 if (err) {
203 dev_warn(&reg->dev, "failed to set regid %d value\n",
204 abreg->regreg);
205 return err;
206 }
207
208 /* Per-regulator power on delay from spec */
209 switch (abreg->regreg) {
210 case AB3100_LDO_A: /* Fallthrough */
211 case AB3100_LDO_C: /* Fallthrough */
212 case AB3100_LDO_D: /* Fallthrough */
213 case AB3100_LDO_E: /* Fallthrough */
214 case AB3100_LDO_H: /* Fallthrough */
215 case AB3100_LDO_K:
216 udelay(200);
217 break;
218 case AB3100_LDO_F:
219 udelay(600);
220 break;
221 case AB3100_LDO_G:
222 udelay(400);
223 break;
224 case AB3100_BUCK:
225 mdelay(1);
226 break;
227 default:
228 break;
229 }
230
231 return 0;
232}
233
234static int ab3100_disable_regulator(struct regulator_dev *reg)
235{
236 struct ab3100_regulator *abreg = reg->reg_data;
237 int err;
238 u8 regval;
239
240 /*
241 * LDO D is a special regulator. When it is disabled, the entire
242 * system is shut down. So this is handled specially.
243 */
244 if (abreg->regreg == AB3100_LDO_D) {
245 int i;
246
247 dev_info(&reg->dev, "disabling LDO D - shut down system\n");
248 /*
249 * Set regulators to default values, ignore any errors,
250 * we're going DOWN
251 */
252 for (i = 0; i < ARRAY_SIZE(ab3100_reg_init_order); i++) {
253 (void) ab3100_set_register_interruptible(abreg->ab3100,
254 ab3100_reg_init_order[i],
255 abreg->plfdata->reg_initvals[i]);
256 }
257
258 /* Setting LDO D to 0x00 cuts the power to the SoC */
259 return ab3100_set_register_interruptible(abreg->ab3100,
260 AB3100_LDO_D, 0x00U);
261
262 }
263
264 /*
265 * All other regulators are handled here
266 */
267 err = ab3100_get_register_interruptible(abreg->ab3100, abreg->regreg,
268 &regval);
269 if (err) {
270 dev_err(&reg->dev, "unable to get register 0x%x\n",
271 abreg->regreg);
272 return err;
273 }
274 regval &= ~AB3100_REG_ON_MASK;
275 return ab3100_set_register_interruptible(abreg->ab3100, abreg->regreg,
276 regval);
277}
278
279static int ab3100_is_enabled_regulator(struct regulator_dev *reg)
280{
281 struct ab3100_regulator *abreg = reg->reg_data;
282 u8 regval;
283 int err;
284
285 err = ab3100_get_register_interruptible(abreg->ab3100, abreg->regreg,
286 &regval);
287 if (err) {
288 dev_err(&reg->dev, "unable to get register 0x%x\n",
289 abreg->regreg);
290 return err;
291 }
292
293 return regval & AB3100_REG_ON_MASK;
294}
295
296static int ab3100_list_voltage_regulator(struct regulator_dev *reg,
297 unsigned selector)
298{
299 struct ab3100_regulator *abreg = reg->reg_data;
300
301 if (selector > abreg->voltages_len)
302 return -EINVAL;
303 return abreg->typ_voltages[selector];
304}
305
306static int ab3100_get_voltage_regulator(struct regulator_dev *reg)
307{
308 struct ab3100_regulator *abreg = reg->reg_data;
309 u8 regval;
310 int err;
311
312 /* Return the voltage for fixed regulators immediately */
313 if (abreg->fixed_voltage)
314 return abreg->fixed_voltage;
315
316 /*
317 * For variable types, read out setting and index into
318 * supplied voltage list.
319 */
320 err = ab3100_get_register_interruptible(abreg->ab3100,
321 abreg->regreg, &regval);
322 if (err) {
323 dev_warn(&reg->dev,
324 "failed to get regulator value in register %02x\n",
325 abreg->regreg);
326 return err;
327 }
328
329 /* The 3 highest bits index voltages */
330 regval &= 0xE0;
331 regval >>= 5;
332
333 if (regval > abreg->voltages_len) {
334 dev_err(&reg->dev,
335 "regulator register %02x contains an illegal voltage setting\n",
336 abreg->regreg);
337 return -EINVAL;
338 }
339
340 return abreg->typ_voltages[regval];
341}
342
343static int ab3100_get_best_voltage_index(struct regulator_dev *reg,
344 int min_uV, int max_uV)
345{
346 struct ab3100_regulator *abreg = reg->reg_data;
347 int i;
348 int bestmatch;
349 int bestindex;
350
351 /*
352 * Locate the minimum voltage fitting the criteria on
353 * this regulator. The switchable voltages are not
354 * in strict falling order so we need to check them
355 * all for the best match.
356 */
357 bestmatch = INT_MAX;
358 bestindex = -1;
359 for (i = 0; i < abreg->voltages_len; i++) {
360 if (abreg->typ_voltages[i] <= max_uV &&
361 abreg->typ_voltages[i] >= min_uV &&
362 abreg->typ_voltages[i] < bestmatch) {
363 bestmatch = abreg->typ_voltages[i];
364 bestindex = i;
365 }
366 }
367
368 if (bestindex < 0) {
369 dev_warn(&reg->dev, "requested %d<=x<=%d uV, out of range!\n",
370 min_uV, max_uV);
371 return -EINVAL;
372 }
373 return bestindex;
374}
375
376static int ab3100_set_voltage_regulator(struct regulator_dev *reg,
377 int min_uV, int max_uV)
378{
379 struct ab3100_regulator *abreg = reg->reg_data;
380 u8 regval;
381 int err;
382 int bestindex;
383
384 bestindex = ab3100_get_best_voltage_index(reg, min_uV, max_uV);
385 if (bestindex < 0)
386 return bestindex;
387
388 err = ab3100_get_register_interruptible(abreg->ab3100,
389 abreg->regreg, &regval);
390 if (err) {
391 dev_warn(&reg->dev,
392 "failed to get regulator register %02x\n",
393 abreg->regreg);
394 return err;
395 }
396
397 /* The highest three bits control the variable regulators */
398 regval &= ~0xE0;
399 regval |= (bestindex << 5);
400
401 err = ab3100_set_register_interruptible(abreg->ab3100,
402 abreg->regreg, regval);
403 if (err)
404 dev_warn(&reg->dev, "failed to set regulator register %02x\n",
405 abreg->regreg);
406
407 return err;
408}
409
410static int ab3100_set_suspend_voltage_regulator(struct regulator_dev *reg,
411 int uV)
412{
413 struct ab3100_regulator *abreg = reg->reg_data;
414 u8 regval;
415 int err;
416 int bestindex;
417 u8 targetreg;
418
419 if (abreg->regreg == AB3100_LDO_E)
420 targetreg = AB3100_LDO_E_SLEEP;
421 else if (abreg->regreg == AB3100_BUCK)
422 targetreg = AB3100_BUCK_SLEEP;
423 else
424 return -EINVAL;
425
426 /* LDO E and BUCK have special suspend voltages you can set */
427 bestindex = ab3100_get_best_voltage_index(reg, uV, uV);
428
429 err = ab3100_get_register_interruptible(abreg->ab3100,
430 targetreg, &regval);
431 if (err) {
432 dev_warn(&reg->dev,
433 "failed to get regulator register %02x\n",
434 targetreg);
435 return err;
436 }
437
438 /* The highest three bits control the variable regulators */
439 regval &= ~0xE0;
440 regval |= (bestindex << 5);
441
442 err = ab3100_set_register_interruptible(abreg->ab3100,
443 targetreg, regval);
444 if (err)
445 dev_warn(&reg->dev, "failed to set regulator register %02x\n",
446 abreg->regreg);
447
448 return err;
449}
450
451/*
452 * The external regulator can just define a fixed voltage.
453 */
454static int ab3100_get_voltage_regulator_external(struct regulator_dev *reg)
455{
456 struct ab3100_regulator *abreg = reg->reg_data;
457
458 return abreg->plfdata->external_voltage;
459}
460
461static struct regulator_ops regulator_ops_fixed = {
462 .enable = ab3100_enable_regulator,
463 .disable = ab3100_disable_regulator,
464 .is_enabled = ab3100_is_enabled_regulator,
465 .get_voltage = ab3100_get_voltage_regulator,
466};
467
468static struct regulator_ops regulator_ops_variable = {
469 .enable = ab3100_enable_regulator,
470 .disable = ab3100_disable_regulator,
471 .is_enabled = ab3100_is_enabled_regulator,
472 .get_voltage = ab3100_get_voltage_regulator,
473 .set_voltage = ab3100_set_voltage_regulator,
474 .list_voltage = ab3100_list_voltage_regulator,
475};
476
477static struct regulator_ops regulator_ops_variable_sleepable = {
478 .enable = ab3100_enable_regulator,
479 .disable = ab3100_disable_regulator,
480 .is_enabled = ab3100_is_enabled_regulator,
481 .get_voltage = ab3100_get_voltage_regulator,
482 .set_voltage = ab3100_set_voltage_regulator,
483 .set_suspend_voltage = ab3100_set_suspend_voltage_regulator,
484 .list_voltage = ab3100_list_voltage_regulator,
485};
486
487/*
488 * LDO EXT is an external regulator so it is really
489 * not possible to set any voltage locally here, AB3100
490 * is an on/off switch plain an simple. The external
491 * voltage is defined in the board set-up if any.
492 */
493static struct regulator_ops regulator_ops_external = {
494 .enable = ab3100_enable_regulator,
495 .disable = ab3100_disable_regulator,
496 .is_enabled = ab3100_is_enabled_regulator,
497 .get_voltage = ab3100_get_voltage_regulator_external,
498};
499
500static struct regulator_desc
501ab3100_regulator_desc[AB3100_NUM_REGULATORS] = {
502 {
503 .name = "LDO_A",
504 .id = AB3100_LDO_A,
505 .ops = &regulator_ops_fixed,
506 .type = REGULATOR_VOLTAGE,
507 },
508 {
509 .name = "LDO_C",
510 .id = AB3100_LDO_C,
511 .ops = &regulator_ops_fixed,
512 .type = REGULATOR_VOLTAGE,
513 },
514 {
515 .name = "LDO_D",
516 .id = AB3100_LDO_D,
517 .ops = &regulator_ops_fixed,
518 .type = REGULATOR_VOLTAGE,
519 },
520 {
521 .name = "LDO_E",
522 .id = AB3100_LDO_E,
523 .ops = &regulator_ops_variable_sleepable,
524 .n_voltages = ARRAY_SIZE(ldo_e_buck_typ_voltages),
525 .type = REGULATOR_VOLTAGE,
526 },
527 {
528 .name = "LDO_F",
529 .id = AB3100_LDO_F,
530 .ops = &regulator_ops_variable,
531 .n_voltages = ARRAY_SIZE(ldo_f_typ_voltages),
532 .type = REGULATOR_VOLTAGE,
533 },
534 {
535 .name = "LDO_G",
536 .id = AB3100_LDO_G,
537 .ops = &regulator_ops_variable,
538 .n_voltages = ARRAY_SIZE(ldo_g_typ_voltages),
539 .type = REGULATOR_VOLTAGE,
540 },
541 {
542 .name = "LDO_H",
543 .id = AB3100_LDO_H,
544 .ops = &regulator_ops_variable,
545 .n_voltages = ARRAY_SIZE(ldo_h_typ_voltages),
546 .type = REGULATOR_VOLTAGE,
547 },
548 {
549 .name = "LDO_K",
550 .id = AB3100_LDO_K,
551 .ops = &regulator_ops_variable,
552 .n_voltages = ARRAY_SIZE(ldo_k_typ_voltages),
553 .type = REGULATOR_VOLTAGE,
554 },
555 {
556 .name = "LDO_EXT",
557 .id = AB3100_LDO_EXT,
558 .ops = &regulator_ops_external,
559 .type = REGULATOR_VOLTAGE,
560 },
561 {
562 .name = "BUCK",
563 .id = AB3100_BUCK,
564 .ops = &regulator_ops_variable_sleepable,
565 .n_voltages = ARRAY_SIZE(ldo_e_buck_typ_voltages),
566 .type = REGULATOR_VOLTAGE,
567 },
568};
569
570/*
571 * NOTE: the following functions are regulators pluralis - it is the
572 * binding to the AB3100 core driver and the parent platform device
573 * for all the different regulators.
574 */
575
576static int __init ab3100_regulators_probe(struct platform_device *pdev)
577{
578 struct ab3100_platform_data *plfdata = pdev->dev.platform_data;
579 struct ab3100 *ab3100 = platform_get_drvdata(pdev);
580 int err = 0;
581 u8 data;
582 int i;
583
584 /* Check chip state */
585 err = ab3100_get_register_interruptible(ab3100,
586 AB3100_LDO_D, &data);
587 if (err) {
588 dev_err(&pdev->dev, "could not read initial status of LDO_D\n");
589 return err;
590 }
591 if (data & 0x10)
592 dev_notice(&pdev->dev,
593 "chip is already in active mode (Warm start)\n");
594 else
595 dev_notice(&pdev->dev,
596 "chip is in inactive mode (Cold start)\n");
597
598 /* Set up regulators */
599 for (i = 0; i < ARRAY_SIZE(ab3100_reg_init_order); i++) {
600 err = ab3100_set_register_interruptible(ab3100,
601 ab3100_reg_init_order[i],
602 plfdata->reg_initvals[i]);
603 if (err) {
604 dev_err(&pdev->dev, "regulator initialization failed with error %d\n",
605 err);
606 return err;
607 }
608 }
609
610 if (err) {
611 dev_err(&pdev->dev,
612 "LDO D regulator initialization failed with error %d\n",
613 err);
614 return err;
615 }
616
617 /* Register the regulators */
618 for (i = 0; i < AB3100_NUM_REGULATORS; i++) {
619 struct ab3100_regulator *reg = &ab3100_regulators[i];
620 struct regulator_dev *rdev;
621
622 /*
623 * Initialize per-regulator struct.
624 * Inherit platform data, this comes down from the
625 * i2c boarddata, from the machine. So if you want to
626 * see what it looks like for a certain machine, go
627 * into the machine I2C setup.
628 */
629 reg->ab3100 = ab3100;
630 reg->plfdata = plfdata;
631
632 /*
633 * Register the regulator, pass around
634 * the ab3100_regulator struct
635 */
636 rdev = regulator_register(&ab3100_regulator_desc[i],
637 &pdev->dev,
638 &plfdata->reg_constraints[i],
639 reg);
640
641 if (IS_ERR(rdev)) {
642 err = PTR_ERR(rdev);
643 dev_err(&pdev->dev,
644 "%s: failed to register regulator %s err %d\n",
645 __func__, ab3100_regulator_desc[i].name,
646 err);
647 i--;
648 /* remove the already registered regulators */
649 while (i > 0) {
650 regulator_unregister(ab3100_regulators[i].rdev);
651 i--;
652 }
653 return err;
654 }
655
656 /* Then set a pointer back to the registered regulator */
657 reg->rdev = rdev;
658 }
659
660 return 0;
661}
662
663static int __exit ab3100_regulators_remove(struct platform_device *pdev)
664{
665 int i;
666
667 for (i = 0; i < AB3100_NUM_REGULATORS; i++) {
668 struct ab3100_regulator *reg = &ab3100_regulators[i];
669
670 regulator_unregister(reg->rdev);
671 }
672 return 0;
673}
674
675static struct platform_driver ab3100_regulators_driver = {
676 .driver = {
677 .name = "ab3100-regulators",
678 .owner = THIS_MODULE,
679 },
680 .probe = ab3100_regulators_probe,
681 .remove = __exit_p(ab3100_regulators_remove),
682};
683
684static __init int ab3100_regulators_init(void)
685{
686 return platform_driver_register(&ab3100_regulators_driver);
687}
688
689static __exit void ab3100_regulators_exit(void)
690{
691 platform_driver_register(&ab3100_regulators_driver);
692}
693
694subsys_initcall(ab3100_regulators_init);
695module_exit(ab3100_regulators_exit);
696
697MODULE_AUTHOR("Mattias Wallin <mattias.wallin@stericsson.com>");
698MODULE_DESCRIPTION("AB3100 Regulator driver");
699MODULE_LICENSE("GPL");
700MODULE_ALIAS("platform:ab3100-regulators");
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index 98c3a74e9949..91ba9bfaa706 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -1864,6 +1864,30 @@ int regulator_notifier_call_chain(struct regulator_dev *rdev,
1864} 1864}
1865EXPORT_SYMBOL_GPL(regulator_notifier_call_chain); 1865EXPORT_SYMBOL_GPL(regulator_notifier_call_chain);
1866 1866
1867/**
1868 * regulator_mode_to_status - convert a regulator mode into a status
1869 *
1870 * @mode: Mode to convert
1871 *
1872 * Convert a regulator mode into a status.
1873 */
1874int regulator_mode_to_status(unsigned int mode)
1875{
1876 switch (mode) {
1877 case REGULATOR_MODE_FAST:
1878 return REGULATOR_STATUS_FAST;
1879 case REGULATOR_MODE_NORMAL:
1880 return REGULATOR_STATUS_NORMAL;
1881 case REGULATOR_MODE_IDLE:
1882 return REGULATOR_STATUS_IDLE;
1883 case REGULATOR_STATUS_STANDBY:
1884 return REGULATOR_STATUS_STANDBY;
1885 default:
1886 return 0;
1887 }
1888}
1889EXPORT_SYMBOL_GPL(regulator_mode_to_status);
1890
1867/* 1891/*
1868 * To avoid cluttering sysfs (and memory) with useless state, only 1892 * To avoid cluttering sysfs (and memory) with useless state, only
1869 * create attributes that can be meaningfully displayed. 1893 * create attributes that can be meaningfully displayed.
diff --git a/drivers/regulator/mc13783.c b/drivers/regulator/mc13783.c
new file mode 100644
index 000000000000..710211f67449
--- /dev/null
+++ b/drivers/regulator/mc13783.c
@@ -0,0 +1,410 @@
1/*
2 * Regulator Driver for Freescale MC13783 PMIC
3 *
4 * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/mfd/mc13783-private.h>
12#include <linux/regulator/machine.h>
13#include <linux/regulator/driver.h>
14#include <linux/platform_device.h>
15#include <linux/mfd/mc13783.h>
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/err.h>
19
20struct mc13783_regulator {
21 struct regulator_desc desc;
22 int reg;
23 int enable_bit;
24};
25
26static struct regulator_ops mc13783_regulator_ops;
27
28static struct mc13783_regulator mc13783_regulators[] = {
29 [MC13783_SW_SW3] = {
30 .desc = {
31 .name = "SW_SW3",
32 .ops = &mc13783_regulator_ops,
33 .type = REGULATOR_VOLTAGE,
34 .id = MC13783_SW_SW3,
35 .owner = THIS_MODULE,
36 },
37 .reg = MC13783_REG_SWITCHERS_5,
38 .enable_bit = MC13783_SWCTRL_SW3_EN,
39 },
40 [MC13783_SW_PLL] = {
41 .desc = {
42 .name = "SW_PLL",
43 .ops = &mc13783_regulator_ops,
44 .type = REGULATOR_VOLTAGE,
45 .id = MC13783_SW_PLL,
46 .owner = THIS_MODULE,
47 },
48 .reg = MC13783_REG_SWITCHERS_4,
49 .enable_bit = MC13783_SWCTRL_PLL_EN,
50 },
51 [MC13783_REGU_VAUDIO] = {
52 .desc = {
53 .name = "REGU_VAUDIO",
54 .ops = &mc13783_regulator_ops,
55 .type = REGULATOR_VOLTAGE,
56 .id = MC13783_REGU_VAUDIO,
57 .owner = THIS_MODULE,
58 },
59 .reg = MC13783_REG_REGULATOR_MODE_0,
60 .enable_bit = MC13783_REGCTRL_VAUDIO_EN,
61 },
62 [MC13783_REGU_VIOHI] = {
63 .desc = {
64 .name = "REGU_VIOHI",
65 .ops = &mc13783_regulator_ops,
66 .type = REGULATOR_VOLTAGE,
67 .id = MC13783_REGU_VIOHI,
68 .owner = THIS_MODULE,
69 },
70 .reg = MC13783_REG_REGULATOR_MODE_0,
71 .enable_bit = MC13783_REGCTRL_VIOHI_EN,
72 },
73 [MC13783_REGU_VIOLO] = {
74 .desc = {
75 .name = "REGU_VIOLO",
76 .ops = &mc13783_regulator_ops,
77 .type = REGULATOR_VOLTAGE,
78 .id = MC13783_REGU_VIOLO,
79 .owner = THIS_MODULE,
80 },
81 .reg = MC13783_REG_REGULATOR_MODE_0,
82 .enable_bit = MC13783_REGCTRL_VIOLO_EN,
83 },
84 [MC13783_REGU_VDIG] = {
85 .desc = {
86 .name = "REGU_VDIG",
87 .ops = &mc13783_regulator_ops,
88 .type = REGULATOR_VOLTAGE,
89 .id = MC13783_REGU_VDIG,
90 .owner = THIS_MODULE,
91 },
92 .reg = MC13783_REG_REGULATOR_MODE_0,
93 .enable_bit = MC13783_REGCTRL_VDIG_EN,
94 },
95 [MC13783_REGU_VGEN] = {
96 .desc = {
97 .name = "REGU_VGEN",
98 .ops = &mc13783_regulator_ops,
99 .type = REGULATOR_VOLTAGE,
100 .id = MC13783_REGU_VGEN,
101 .owner = THIS_MODULE,
102 },
103 .reg = MC13783_REG_REGULATOR_MODE_0,
104 .enable_bit = MC13783_REGCTRL_VGEN_EN,
105 },
106 [MC13783_REGU_VRFDIG] = {
107 .desc = {
108 .name = "REGU_VRFDIG",
109 .ops = &mc13783_regulator_ops,
110 .type = REGULATOR_VOLTAGE,
111 .id = MC13783_REGU_VRFDIG,
112 .owner = THIS_MODULE,
113 },
114 .reg = MC13783_REG_REGULATOR_MODE_0,
115 .enable_bit = MC13783_REGCTRL_VRFDIG_EN,
116 },
117 [MC13783_REGU_VRFREF] = {
118 .desc = {
119 .name = "REGU_VRFREF",
120 .ops = &mc13783_regulator_ops,
121 .type = REGULATOR_VOLTAGE,
122 .id = MC13783_REGU_VRFREF,
123 .owner = THIS_MODULE,
124 },
125 .reg = MC13783_REG_REGULATOR_MODE_0,
126 .enable_bit = MC13783_REGCTRL_VRFREF_EN,
127 },
128 [MC13783_REGU_VRFCP] = {
129 .desc = {
130 .name = "REGU_VRFCP",
131 .ops = &mc13783_regulator_ops,
132 .type = REGULATOR_VOLTAGE,
133 .id = MC13783_REGU_VRFCP,
134 .owner = THIS_MODULE,
135 },
136 .reg = MC13783_REG_REGULATOR_MODE_0,
137 .enable_bit = MC13783_REGCTRL_VRFCP_EN,
138 },
139 [MC13783_REGU_VSIM] = {
140 .desc = {
141 .name = "REGU_VSIM",
142 .ops = &mc13783_regulator_ops,
143 .type = REGULATOR_VOLTAGE,
144 .id = MC13783_REGU_VSIM,
145 .owner = THIS_MODULE,
146 },
147 .reg = MC13783_REG_REGULATOR_MODE_1,
148 .enable_bit = MC13783_REGCTRL_VSIM_EN,
149 },
150 [MC13783_REGU_VESIM] = {
151 .desc = {
152 .name = "REGU_VESIM",
153 .ops = &mc13783_regulator_ops,
154 .type = REGULATOR_VOLTAGE,
155 .id = MC13783_REGU_VESIM,
156 .owner = THIS_MODULE,
157 },
158 .reg = MC13783_REG_REGULATOR_MODE_1,
159 .enable_bit = MC13783_REGCTRL_VESIM_EN,
160 },
161 [MC13783_REGU_VCAM] = {
162 .desc = {
163 .name = "REGU_VCAM",
164 .ops = &mc13783_regulator_ops,
165 .type = REGULATOR_VOLTAGE,
166 .id = MC13783_REGU_VCAM,
167 .owner = THIS_MODULE,
168 },
169 .reg = MC13783_REG_REGULATOR_MODE_1,
170 .enable_bit = MC13783_REGCTRL_VCAM_EN,
171 },
172 [MC13783_REGU_VRFBG] = {
173 .desc = {
174 .name = "REGU_VRFBG",
175 .ops = &mc13783_regulator_ops,
176 .type = REGULATOR_VOLTAGE,
177 .id = MC13783_REGU_VRFBG,
178 .owner = THIS_MODULE,
179 },
180 .reg = MC13783_REG_REGULATOR_MODE_1,
181 .enable_bit = MC13783_REGCTRL_VRFBG_EN,
182 },
183 [MC13783_REGU_VVIB] = {
184 .desc = {
185 .name = "REGU_VVIB",
186 .ops = &mc13783_regulator_ops,
187 .type = REGULATOR_VOLTAGE,
188 .id = MC13783_REGU_VVIB,
189 .owner = THIS_MODULE,
190 },
191 .reg = MC13783_REG_REGULATOR_MODE_1,
192 .enable_bit = MC13783_REGCTRL_VVIB_EN,
193 },
194 [MC13783_REGU_VRF1] = {
195 .desc = {
196 .name = "REGU_VRF1",
197 .ops = &mc13783_regulator_ops,
198 .type = REGULATOR_VOLTAGE,
199 .id = MC13783_REGU_VRF1,
200 .owner = THIS_MODULE,
201 },
202 .reg = MC13783_REG_REGULATOR_MODE_1,
203 .enable_bit = MC13783_REGCTRL_VRF1_EN,
204 },
205 [MC13783_REGU_VRF2] = {
206 .desc = {
207 .name = "REGU_VRF2",
208 .ops = &mc13783_regulator_ops,
209 .type = REGULATOR_VOLTAGE,
210 .id = MC13783_REGU_VRF2,
211 .owner = THIS_MODULE,
212 },
213 .reg = MC13783_REG_REGULATOR_MODE_1,
214 .enable_bit = MC13783_REGCTRL_VRF2_EN,
215 },
216 [MC13783_REGU_VMMC1] = {
217 .desc = {
218 .name = "REGU_VMMC1",
219 .ops = &mc13783_regulator_ops,
220 .type = REGULATOR_VOLTAGE,
221 .id = MC13783_REGU_VMMC1,
222 .owner = THIS_MODULE,
223 },
224 .reg = MC13783_REG_REGULATOR_MODE_1,
225 .enable_bit = MC13783_REGCTRL_VMMC1_EN,
226 },
227 [MC13783_REGU_VMMC2] = {
228 .desc = {
229 .name = "REGU_VMMC2",
230 .ops = &mc13783_regulator_ops,
231 .type = REGULATOR_VOLTAGE,
232 .id = MC13783_REGU_VMMC2,
233 .owner = THIS_MODULE,
234 },
235 .reg = MC13783_REG_REGULATOR_MODE_1,
236 .enable_bit = MC13783_REGCTRL_VMMC2_EN,
237 },
238 [MC13783_REGU_GPO1] = {
239 .desc = {
240 .name = "REGU_GPO1",
241 .ops = &mc13783_regulator_ops,
242 .type = REGULATOR_VOLTAGE,
243 .id = MC13783_REGU_GPO1,
244 .owner = THIS_MODULE,
245 },
246 .reg = MC13783_REG_POWER_MISCELLANEOUS,
247 .enable_bit = MC13783_REGCTRL_GPO1_EN,
248 },
249 [MC13783_REGU_GPO2] = {
250 .desc = {
251 .name = "REGU_GPO2",
252 .ops = &mc13783_regulator_ops,
253 .type = REGULATOR_VOLTAGE,
254 .id = MC13783_REGU_GPO2,
255 .owner = THIS_MODULE,
256 },
257 .reg = MC13783_REG_POWER_MISCELLANEOUS,
258 .enable_bit = MC13783_REGCTRL_GPO2_EN,
259 },
260 [MC13783_REGU_GPO3] = {
261 .desc = {
262 .name = "REGU_GPO3",
263 .ops = &mc13783_regulator_ops,
264 .type = REGULATOR_VOLTAGE,
265 .id = MC13783_REGU_GPO3,
266 .owner = THIS_MODULE,
267 },
268 .reg = MC13783_REG_POWER_MISCELLANEOUS,
269 .enable_bit = MC13783_REGCTRL_GPO3_EN,
270 },
271 [MC13783_REGU_GPO4] = {
272 .desc = {
273 .name = "REGU_GPO4",
274 .ops = &mc13783_regulator_ops,
275 .type = REGULATOR_VOLTAGE,
276 .id = MC13783_REGU_GPO4,
277 .owner = THIS_MODULE,
278 },
279 .reg = MC13783_REG_POWER_MISCELLANEOUS,
280 .enable_bit = MC13783_REGCTRL_GPO4_EN,
281 },
282};
283
284struct mc13783_priv {
285 struct regulator_desc desc[ARRAY_SIZE(mc13783_regulators)];
286 struct mc13783 *mc13783;
287 struct regulator_dev *regulators[0];
288};
289
290static int mc13783_enable(struct regulator_dev *rdev)
291{
292 struct mc13783_priv *priv = rdev_get_drvdata(rdev);
293 int id = rdev_get_id(rdev);
294
295 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
296
297 return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg,
298 mc13783_regulators[id].enable_bit,
299 mc13783_regulators[id].enable_bit);
300}
301
302static int mc13783_disable(struct regulator_dev *rdev)
303{
304 struct mc13783_priv *priv = rdev_get_drvdata(rdev);
305 int id = rdev_get_id(rdev);
306
307 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
308
309 return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg,
310 mc13783_regulators[id].enable_bit, 0);
311}
312
313static int mc13783_is_enabled(struct regulator_dev *rdev)
314{
315 struct mc13783_priv *priv = rdev_get_drvdata(rdev);
316 int ret, id = rdev_get_id(rdev);
317 unsigned int val;
318
319 ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val);
320 if (ret)
321 return ret;
322
323 return (val & mc13783_regulators[id].enable_bit) != 0;
324}
325
326static struct regulator_ops mc13783_regulator_ops = {
327 .enable = mc13783_enable,
328 .disable = mc13783_disable,
329 .is_enabled = mc13783_is_enabled,
330};
331
332static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
333{
334 struct mc13783_priv *priv;
335 struct mc13783 *mc13783 = dev_get_drvdata(pdev->dev.parent);
336 struct mc13783_regulator_init_data *init_data;
337 int i, ret;
338
339 dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id);
340
341 priv = kzalloc(sizeof(*priv) + mc13783->num_regulators * sizeof(void *),
342 GFP_KERNEL);
343 if (!priv)
344 return -ENOMEM;
345
346 priv->mc13783 = mc13783;
347
348 for (i = 0; i < mc13783->num_regulators; i++) {
349 init_data = &mc13783->regulators[i];
350 priv->regulators[i] = regulator_register(
351 &mc13783_regulators[init_data->id].desc,
352 &pdev->dev, init_data->init_data, priv);
353
354 if (IS_ERR(priv->regulators[i])) {
355 dev_err(&pdev->dev, "failed to register regulator %s\n",
356 mc13783_regulators[i].desc.name);
357 ret = PTR_ERR(priv->regulators[i]);
358 goto err;
359 }
360 }
361
362 platform_set_drvdata(pdev, priv);
363
364 return 0;
365err:
366 while (--i >= 0)
367 regulator_unregister(priv->regulators[i]);
368
369 kfree(priv);
370
371 return ret;
372}
373
374static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
375{
376 struct mc13783_priv *priv = platform_get_drvdata(pdev);
377 struct mc13783 *mc13783 = priv->mc13783;
378 int i;
379
380 for (i = 0; i < mc13783->num_regulators; i++)
381 regulator_unregister(priv->regulators[i]);
382
383 return 0;
384}
385
386static struct platform_driver mc13783_regulator_driver = {
387 .driver = {
388 .name = "mc13783-regulator",
389 .owner = THIS_MODULE,
390 },
391 .remove = __devexit_p(mc13783_regulator_remove),
392};
393
394static int __init mc13783_regulator_init(void)
395{
396 return platform_driver_probe(&mc13783_regulator_driver,
397 mc13783_regulator_probe);
398}
399subsys_initcall(mc13783_regulator_init);
400
401static void __exit mc13783_regulator_exit(void)
402{
403 platform_driver_unregister(&mc13783_regulator_driver);
404}
405module_exit(mc13783_regulator_exit);
406
407MODULE_LICENSE("GPL");
408MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
409MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
410MODULE_ALIAS("platform:mc13783-regulator");
diff --git a/drivers/regulator/pcap-regulator.c b/drivers/regulator/pcap-regulator.c
new file mode 100644
index 000000000000..33d7d899e030
--- /dev/null
+++ b/drivers/regulator/pcap-regulator.c
@@ -0,0 +1,318 @@
1/*
2 * PCAP2 Regulator Driver
3 *
4 * Copyright (c) 2009 Daniel Ribeiro <drwyrm@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/err.h>
16#include <linux/platform_device.h>
17#include <linux/regulator/driver.h>
18#include <linux/regulator/machine.h>
19#include <linux/mfd/ezx-pcap.h>
20
21static const u16 V1_table[] = {
22 2775, 1275, 1600, 1725, 1825, 1925, 2075, 2275,
23};
24
25static const u16 V2_table[] = {
26 2500, 2775,
27};
28
29static const u16 V3_table[] = {
30 1075, 1275, 1550, 1725, 1876, 1950, 2075, 2275,
31};
32
33static const u16 V4_table[] = {
34 1275, 1550, 1725, 1875, 1950, 2075, 2275, 2775,
35};
36
37static const u16 V5_table[] = {
38 1875, 2275, 2475, 2775,
39};
40
41static const u16 V6_table[] = {
42 2475, 2775,
43};
44
45static const u16 V7_table[] = {
46 1875, 2775,
47};
48
49#define V8_table V4_table
50
51static const u16 V9_table[] = {
52 1575, 1875, 2475, 2775,
53};
54
55static const u16 V10_table[] = {
56 5000,
57};
58
59static const u16 VAUX1_table[] = {
60 1875, 2475, 2775, 3000,
61};
62
63#define VAUX2_table VAUX1_table
64
65static const u16 VAUX3_table[] = {
66 1200, 1200, 1200, 1200, 1400, 1600, 1800, 2000,
67 2200, 2400, 2600, 2800, 3000, 3200, 3400, 3600,
68};
69
70static const u16 VAUX4_table[] = {
71 1800, 1800, 3000, 5000,
72};
73
74static const u16 VSIM_table[] = {
75 1875, 3000,
76};
77
78static const u16 VSIM2_table[] = {
79 1875,
80};
81
82static const u16 VVIB_table[] = {
83 1300, 1800, 2000, 3000,
84};
85
86static const u16 SW1_table[] = {
87 900, 950, 1000, 1050, 1100, 1150, 1200, 1250,
88 1300, 1350, 1400, 1450, 1500, 1600, 1875, 2250,
89};
90
91#define SW2_table SW1_table
92
93static const u16 SW3_table[] = {
94 4000, 4500, 5000, 5500,
95};
96
97struct pcap_regulator {
98 const u8 reg;
99 const u8 en;
100 const u8 index;
101 const u8 stby;
102 const u8 lowpwr;
103 const u8 n_voltages;
104 const u16 *voltage_table;
105};
106
107#define NA 0xff
108
109#define VREG_INFO(_vreg, _reg, _en, _index, _stby, _lowpwr) \
110 [_vreg] = { \
111 .reg = _reg, \
112 .en = _en, \
113 .index = _index, \
114 .stby = _stby, \
115 .lowpwr = _lowpwr, \
116 .n_voltages = ARRAY_SIZE(_vreg##_table), \
117 .voltage_table = _vreg##_table, \
118 }
119
120static struct pcap_regulator vreg_table[] = {
121 VREG_INFO(V1, PCAP_REG_VREG1, 1, 2, 18, 0),
122 VREG_INFO(V2, PCAP_REG_VREG1, 5, 6, 19, 22),
123 VREG_INFO(V3, PCAP_REG_VREG1, 7, 8, 20, 23),
124 VREG_INFO(V4, PCAP_REG_VREG1, 11, 12, 21, 24),
125 /* V5 STBY and LOWPWR are on PCAP_REG_VREG2 */
126 VREG_INFO(V5, PCAP_REG_VREG1, 15, 16, 12, 19),
127
128 VREG_INFO(V6, PCAP_REG_VREG2, 1, 2, 14, 20),
129 VREG_INFO(V7, PCAP_REG_VREG2, 3, 4, 15, 21),
130 VREG_INFO(V8, PCAP_REG_VREG2, 5, 6, 16, 22),
131 VREG_INFO(V9, PCAP_REG_VREG2, 9, 10, 17, 23),
132 VREG_INFO(V10, PCAP_REG_VREG2, 10, NA, 18, 24),
133
134 VREG_INFO(VAUX1, PCAP_REG_AUXVREG, 1, 2, 22, 23),
135 /* VAUX2 ... VSIM2 STBY and LOWPWR are on PCAP_REG_LOWPWR */
136 VREG_INFO(VAUX2, PCAP_REG_AUXVREG, 4, 5, 0, 1),
137 VREG_INFO(VAUX3, PCAP_REG_AUXVREG, 7, 8, 2, 3),
138 VREG_INFO(VAUX4, PCAP_REG_AUXVREG, 12, 13, 4, 5),
139 VREG_INFO(VSIM, PCAP_REG_AUXVREG, 17, 18, NA, 6),
140 VREG_INFO(VSIM2, PCAP_REG_AUXVREG, 16, NA, NA, 7),
141 VREG_INFO(VVIB, PCAP_REG_AUXVREG, 19, 20, NA, NA),
142
143 VREG_INFO(SW1, PCAP_REG_SWCTRL, 1, 2, NA, NA),
144 VREG_INFO(SW2, PCAP_REG_SWCTRL, 6, 7, NA, NA),
145 /* SW3 STBY is on PCAP_REG_AUXVREG */
146 VREG_INFO(SW3, PCAP_REG_SWCTRL, 11, 12, 24, NA),
147
148 /* SWxS used to control SWx voltage on standby */
149/* VREG_INFO(SW1S, PCAP_REG_LOWPWR, NA, 12, NA, NA),
150 VREG_INFO(SW2S, PCAP_REG_LOWPWR, NA, 20, NA, NA), */
151};
152
153static int pcap_regulator_set_voltage(struct regulator_dev *rdev,
154 int min_uV, int max_uV)
155{
156 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
157 void *pcap = rdev_get_drvdata(rdev);
158 int uV;
159 u8 i;
160
161 /* the regulator doesn't support voltage switching */
162 if (vreg->n_voltages == 1)
163 return -EINVAL;
164
165 for (i = 0; i < vreg->n_voltages; i++) {
166 /* For V1 the first is not the best match */
167 if (i == 0 && rdev_get_id(rdev) == V1)
168 i = 1;
169 else if (i + 1 == vreg->n_voltages && rdev_get_id(rdev) == V1)
170 i = 0;
171
172 uV = vreg->voltage_table[i] * 1000;
173 if (min_uV <= uV && uV <= max_uV)
174 return ezx_pcap_set_bits(pcap, vreg->reg,
175 (vreg->n_voltages - 1) << vreg->index,
176 i << vreg->index);
177
178 if (i == 0 && rdev_get_id(rdev) == V1)
179 i = vreg->n_voltages - 1;
180 }
181
182 /* the requested voltage range is not supported by this regulator */
183 return -EINVAL;
184}
185
186static int pcap_regulator_get_voltage(struct regulator_dev *rdev)
187{
188 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
189 void *pcap = rdev_get_drvdata(rdev);
190 u32 tmp;
191 int mV;
192
193 if (vreg->n_voltages == 1)
194 return vreg->voltage_table[0] * 1000;
195
196 ezx_pcap_read(pcap, vreg->reg, &tmp);
197 tmp = ((tmp >> vreg->index) & (vreg->n_voltages - 1));
198 mV = vreg->voltage_table[tmp];
199
200 return mV * 1000;
201}
202
203static int pcap_regulator_enable(struct regulator_dev *rdev)
204{
205 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
206 void *pcap = rdev_get_drvdata(rdev);
207
208 if (vreg->en == NA)
209 return -EINVAL;
210
211 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 1 << vreg->en);
212}
213
214static int pcap_regulator_disable(struct regulator_dev *rdev)
215{
216 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
217 void *pcap = rdev_get_drvdata(rdev);
218
219 if (vreg->en == NA)
220 return -EINVAL;
221
222 return ezx_pcap_set_bits(pcap, vreg->reg, 1 << vreg->en, 0);
223}
224
225static int pcap_regulator_is_enabled(struct regulator_dev *rdev)
226{
227 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
228 void *pcap = rdev_get_drvdata(rdev);
229 u32 tmp;
230
231 if (vreg->en == NA)
232 return -EINVAL;
233
234 ezx_pcap_read(pcap, vreg->reg, &tmp);
235 return (tmp >> vreg->en) & 1;
236}
237
238static int pcap_regulator_list_voltage(struct regulator_dev *rdev,
239 unsigned int index)
240{
241 struct pcap_regulator *vreg = &vreg_table[rdev_get_id(rdev)];
242
243 return vreg->voltage_table[index] * 1000;
244}
245
246static struct regulator_ops pcap_regulator_ops = {
247 .list_voltage = pcap_regulator_list_voltage,
248 .set_voltage = pcap_regulator_set_voltage,
249 .get_voltage = pcap_regulator_get_voltage,
250 .enable = pcap_regulator_enable,
251 .disable = pcap_regulator_disable,
252 .is_enabled = pcap_regulator_is_enabled,
253};
254
255#define VREG(_vreg) \
256 [_vreg] = { \
257 .name = #_vreg, \
258 .id = _vreg, \
259 .n_voltages = ARRAY_SIZE(_vreg##_table), \
260 .ops = &pcap_regulator_ops, \
261 .type = REGULATOR_VOLTAGE, \
262 .owner = THIS_MODULE, \
263 }
264
265static struct regulator_desc pcap_regulators[] = {
266 VREG(V1), VREG(V2), VREG(V3), VREG(V4), VREG(V5), VREG(V6), VREG(V7),
267 VREG(V8), VREG(V9), VREG(V10), VREG(VAUX1), VREG(VAUX2), VREG(VAUX3),
268 VREG(VAUX4), VREG(VSIM), VREG(VSIM2), VREG(VVIB), VREG(SW1), VREG(SW2),
269};
270
271static int __devinit pcap_regulator_probe(struct platform_device *pdev)
272{
273 struct regulator_dev *rdev;
274 void *pcap = dev_get_drvdata(pdev->dev.parent);
275
276 rdev = regulator_register(&pcap_regulators[pdev->id], &pdev->dev,
277 pdev->dev.platform_data, pcap);
278 if (IS_ERR(rdev))
279 return PTR_ERR(rdev);
280
281 platform_set_drvdata(pdev, rdev);
282
283 return 0;
284}
285
286static int __devexit pcap_regulator_remove(struct platform_device *pdev)
287{
288 struct regulator_dev *rdev = platform_get_drvdata(pdev);
289
290 regulator_unregister(rdev);
291
292 return 0;
293}
294
295static struct platform_driver pcap_regulator_driver = {
296 .driver = {
297 .name = "pcap-regulator",
298 },
299 .probe = pcap_regulator_probe,
300 .remove = __devexit_p(pcap_regulator_remove),
301};
302
303static int __init pcap_regulator_init(void)
304{
305 return platform_driver_register(&pcap_regulator_driver);
306}
307
308static void __exit pcap_regulator_exit(void)
309{
310 platform_driver_unregister(&pcap_regulator_driver);
311}
312
313subsys_initcall(pcap_regulator_init);
314module_exit(pcap_regulator_exit);
315
316MODULE_AUTHOR("Daniel Ribeiro <drwyrm@gmail.com>");
317MODULE_DESCRIPTION("PCAP2 Regulator Driver");
318MODULE_LICENSE("GPL");
diff --git a/drivers/regulator/wm831x-dcdc.c b/drivers/regulator/wm831x-dcdc.c
new file mode 100644
index 000000000000..2eefc1a0cf08
--- /dev/null
+++ b/drivers/regulator/wm831x-dcdc.c
@@ -0,0 +1,862 @@
1/*
2 * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/bitops.h>
18#include <linux/err.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22
23#include <linux/mfd/wm831x/core.h>
24#include <linux/mfd/wm831x/regulator.h>
25#include <linux/mfd/wm831x/pdata.h>
26
27#define WM831X_BUCKV_MAX_SELECTOR 0x68
28#define WM831X_BUCKP_MAX_SELECTOR 0x66
29
30#define WM831X_DCDC_MODE_FAST 0
31#define WM831X_DCDC_MODE_NORMAL 1
32#define WM831X_DCDC_MODE_IDLE 2
33#define WM831X_DCDC_MODE_STANDBY 3
34
35#define WM831X_DCDC_MAX_NAME 6
36
37/* Register offsets in control block */
38#define WM831X_DCDC_CONTROL_1 0
39#define WM831X_DCDC_CONTROL_2 1
40#define WM831X_DCDC_ON_CONFIG 2
41#define WM831X_DCDC_SLEEP_CONTROL 3
42
43/*
44 * Shared
45 */
46
47struct wm831x_dcdc {
48 char name[WM831X_DCDC_MAX_NAME];
49 struct regulator_desc desc;
50 int base;
51 struct wm831x *wm831x;
52 struct regulator_dev *regulator;
53};
54
55static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)
56{
57 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
58 struct wm831x *wm831x = dcdc->wm831x;
59 int mask = 1 << rdev_get_id(rdev);
60 int reg;
61
62 reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE);
63 if (reg < 0)
64 return reg;
65
66 if (reg & mask)
67 return 1;
68 else
69 return 0;
70}
71
72static int wm831x_dcdc_enable(struct regulator_dev *rdev)
73{
74 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
75 struct wm831x *wm831x = dcdc->wm831x;
76 int mask = 1 << rdev_get_id(rdev);
77
78 return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask);
79}
80
81static int wm831x_dcdc_disable(struct regulator_dev *rdev)
82{
83 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
84 struct wm831x *wm831x = dcdc->wm831x;
85 int mask = 1 << rdev_get_id(rdev);
86
87 return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0);
88}
89
90static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
91
92{
93 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
94 struct wm831x *wm831x = dcdc->wm831x;
95 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
96 int val;
97
98 val = wm831x_reg_read(wm831x, reg);
99 if (val < 0)
100 return val;
101
102 val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
103
104 switch (val) {
105 case WM831X_DCDC_MODE_FAST:
106 return REGULATOR_MODE_FAST;
107 case WM831X_DCDC_MODE_NORMAL:
108 return REGULATOR_MODE_NORMAL;
109 case WM831X_DCDC_MODE_STANDBY:
110 return REGULATOR_MODE_STANDBY;
111 case WM831X_DCDC_MODE_IDLE:
112 return REGULATOR_MODE_IDLE;
113 default:
114 BUG();
115 }
116}
117
118static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
119 unsigned int mode)
120{
121 int val;
122
123 switch (mode) {
124 case REGULATOR_MODE_FAST:
125 val = WM831X_DCDC_MODE_FAST;
126 break;
127 case REGULATOR_MODE_NORMAL:
128 val = WM831X_DCDC_MODE_NORMAL;
129 break;
130 case REGULATOR_MODE_STANDBY:
131 val = WM831X_DCDC_MODE_STANDBY;
132 break;
133 case REGULATOR_MODE_IDLE:
134 val = WM831X_DCDC_MODE_IDLE;
135 break;
136 default:
137 return -EINVAL;
138 }
139
140 return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
141 val << WM831X_DC1_ON_MODE_SHIFT);
142}
143
144static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
145{
146 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
147 struct wm831x *wm831x = dcdc->wm831x;
148 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
149
150 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
151}
152
153static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
154 unsigned int mode)
155{
156 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
157 struct wm831x *wm831x = dcdc->wm831x;
158 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
159
160 return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
161}
162
163static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
164{
165 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
166 struct wm831x *wm831x = dcdc->wm831x;
167 int ret;
168
169 /* First, check for errors */
170 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
171 if (ret < 0)
172 return ret;
173
174 if (ret & (1 << rdev_get_id(rdev))) {
175 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
176 rdev_get_id(rdev) + 1);
177 return REGULATOR_STATUS_ERROR;
178 }
179
180 /* DCDC1 and DCDC2 can additionally detect high voltage/current */
181 if (rdev_get_id(rdev) < 2) {
182 if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
183 dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
184 rdev_get_id(rdev) + 1);
185 return REGULATOR_STATUS_ERROR;
186 }
187
188 if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
189 dev_dbg(wm831x->dev, "DCDC%d over current\n",
190 rdev_get_id(rdev) + 1);
191 return REGULATOR_STATUS_ERROR;
192 }
193 }
194
195 /* Is the regulator on? */
196 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
197 if (ret < 0)
198 return ret;
199 if (!(ret & (1 << rdev_get_id(rdev))))
200 return REGULATOR_STATUS_OFF;
201
202 /* TODO: When we handle hardware control modes so we can report the
203 * current mode. */
204 return REGULATOR_STATUS_ON;
205}
206
207static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
208{
209 struct wm831x_dcdc *dcdc = data;
210
211 regulator_notifier_call_chain(dcdc->regulator,
212 REGULATOR_EVENT_UNDER_VOLTAGE,
213 NULL);
214
215 return IRQ_HANDLED;
216}
217
218static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
219{
220 struct wm831x_dcdc *dcdc = data;
221
222 regulator_notifier_call_chain(dcdc->regulator,
223 REGULATOR_EVENT_OVER_CURRENT,
224 NULL);
225
226 return IRQ_HANDLED;
227}
228
229/*
230 * BUCKV specifics
231 */
232
233static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
234 unsigned selector)
235{
236 if (selector <= 0x8)
237 return 600000;
238 if (selector <= WM831X_BUCKV_MAX_SELECTOR)
239 return 600000 + ((selector - 0x8) * 12500);
240 return -EINVAL;
241}
242
243static int wm831x_buckv_set_voltage_int(struct regulator_dev *rdev, int reg,
244 int min_uV, int max_uV)
245{
246 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
247 struct wm831x *wm831x = dcdc->wm831x;
248 u16 vsel;
249
250 if (min_uV < 600000)
251 vsel = 0;
252 else if (min_uV <= 1800000)
253 vsel = ((min_uV - 600000) / 12500) + 8;
254 else
255 return -EINVAL;
256
257 if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
258 return -EINVAL;
259
260 return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_VSEL_MASK, vsel);
261}
262
263static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
264 int min_uV, int max_uV)
265{
266 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
267 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
268
269 return wm831x_buckv_set_voltage_int(rdev, reg, min_uV, max_uV);
270}
271
272static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
273 int uV)
274{
275 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
276 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
277
278 return wm831x_buckv_set_voltage_int(rdev, reg, uV, uV);
279}
280
281static int wm831x_buckv_get_voltage(struct regulator_dev *rdev)
282{
283 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
284 struct wm831x *wm831x = dcdc->wm831x;
285 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
286 int val;
287
288 val = wm831x_reg_read(wm831x, reg);
289 if (val < 0)
290 return val;
291
292 return wm831x_buckv_list_voltage(rdev, val & WM831X_DC1_ON_VSEL_MASK);
293}
294
295/* Current limit options */
296static u16 wm831x_dcdc_ilim[] = {
297 125, 250, 375, 500, 625, 750, 875, 1000
298};
299
300static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
301 int min_uA, int max_uA)
302{
303 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
304 struct wm831x *wm831x = dcdc->wm831x;
305 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
306 int i;
307
308 for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) {
309 if (max_uA <= wm831x_dcdc_ilim[i])
310 break;
311 }
312 if (i == ARRAY_SIZE(wm831x_dcdc_ilim))
313 return -EINVAL;
314
315 return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK, i);
316}
317
318static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
319{
320 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
321 struct wm831x *wm831x = dcdc->wm831x;
322 u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
323 int val;
324
325 val = wm831x_reg_read(wm831x, reg);
326 if (val < 0)
327 return val;
328
329 return wm831x_dcdc_ilim[val & WM831X_DC1_HC_THR_MASK];
330}
331
332static struct regulator_ops wm831x_buckv_ops = {
333 .set_voltage = wm831x_buckv_set_voltage,
334 .get_voltage = wm831x_buckv_get_voltage,
335 .list_voltage = wm831x_buckv_list_voltage,
336 .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
337 .set_current_limit = wm831x_buckv_set_current_limit,
338 .get_current_limit = wm831x_buckv_get_current_limit,
339
340 .is_enabled = wm831x_dcdc_is_enabled,
341 .enable = wm831x_dcdc_enable,
342 .disable = wm831x_dcdc_disable,
343 .get_status = wm831x_dcdc_get_status,
344 .get_mode = wm831x_dcdc_get_mode,
345 .set_mode = wm831x_dcdc_set_mode,
346 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
347};
348
349static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
350{
351 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
352 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
353 int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
354 struct wm831x_dcdc *dcdc;
355 struct resource *res;
356 int ret, irq;
357
358 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
359
360 if (pdata == NULL || pdata->dcdc[id] == NULL)
361 return -ENODEV;
362
363 dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
364 if (dcdc == NULL) {
365 dev_err(&pdev->dev, "Unable to allocate private data\n");
366 return -ENOMEM;
367 }
368
369 dcdc->wm831x = wm831x;
370
371 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
372 if (res == NULL) {
373 dev_err(&pdev->dev, "No I/O resource\n");
374 ret = -EINVAL;
375 goto err;
376 }
377 dcdc->base = res->start;
378
379 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
380 dcdc->desc.name = dcdc->name;
381 dcdc->desc.id = id;
382 dcdc->desc.type = REGULATOR_VOLTAGE;
383 dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
384 dcdc->desc.ops = &wm831x_buckv_ops;
385 dcdc->desc.owner = THIS_MODULE;
386
387 dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
388 pdata->dcdc[id], dcdc);
389 if (IS_ERR(dcdc->regulator)) {
390 ret = PTR_ERR(dcdc->regulator);
391 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
392 id + 1, ret);
393 goto err;
394 }
395
396 irq = platform_get_irq_byname(pdev, "UV");
397 ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
398 IRQF_TRIGGER_RISING, dcdc->name,
399 dcdc);
400 if (ret != 0) {
401 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
402 irq, ret);
403 goto err_regulator;
404 }
405
406 irq = platform_get_irq_byname(pdev, "HC");
407 ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_oc_irq,
408 IRQF_TRIGGER_RISING, dcdc->name,
409 dcdc);
410 if (ret != 0) {
411 dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
412 irq, ret);
413 goto err_uv;
414 }
415
416 platform_set_drvdata(pdev, dcdc);
417
418 return 0;
419
420err_uv:
421 wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
422err_regulator:
423 regulator_unregister(dcdc->regulator);
424err:
425 kfree(dcdc);
426 return ret;
427}
428
429static __devexit int wm831x_buckv_remove(struct platform_device *pdev)
430{
431 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
432 struct wm831x *wm831x = dcdc->wm831x;
433
434 wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "HC"), dcdc);
435 wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
436 regulator_unregister(dcdc->regulator);
437 kfree(dcdc);
438
439 return 0;
440}
441
442static struct platform_driver wm831x_buckv_driver = {
443 .probe = wm831x_buckv_probe,
444 .remove = __devexit_p(wm831x_buckv_remove),
445 .driver = {
446 .name = "wm831x-buckv",
447 },
448};
449
450/*
451 * BUCKP specifics
452 */
453
454static int wm831x_buckp_list_voltage(struct regulator_dev *rdev,
455 unsigned selector)
456{
457 if (selector <= WM831X_BUCKP_MAX_SELECTOR)
458 return 850000 + (selector * 25000);
459 else
460 return -EINVAL;
461}
462
463static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg,
464 int min_uV, int max_uV)
465{
466 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
467 struct wm831x *wm831x = dcdc->wm831x;
468 u16 vsel;
469
470 if (min_uV <= 34000000)
471 vsel = (min_uV - 850000) / 25000;
472 else
473 return -EINVAL;
474
475 if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV)
476 return -EINVAL;
477
478 return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel);
479}
480
481static int wm831x_buckp_set_voltage(struct regulator_dev *rdev,
482 int min_uV, int max_uV)
483{
484 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
485 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
486
487 return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV);
488}
489
490static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev,
491 int uV)
492{
493 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
494 u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
495
496 return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV);
497}
498
499static int wm831x_buckp_get_voltage(struct regulator_dev *rdev)
500{
501 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
502 struct wm831x *wm831x = dcdc->wm831x;
503 u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
504 int val;
505
506 val = wm831x_reg_read(wm831x, reg);
507 if (val < 0)
508 return val;
509
510 return wm831x_buckp_list_voltage(rdev, val & WM831X_DC3_ON_VSEL_MASK);
511}
512
513static struct regulator_ops wm831x_buckp_ops = {
514 .set_voltage = wm831x_buckp_set_voltage,
515 .get_voltage = wm831x_buckp_get_voltage,
516 .list_voltage = wm831x_buckp_list_voltage,
517 .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
518
519 .is_enabled = wm831x_dcdc_is_enabled,
520 .enable = wm831x_dcdc_enable,
521 .disable = wm831x_dcdc_disable,
522 .get_status = wm831x_dcdc_get_status,
523 .get_mode = wm831x_dcdc_get_mode,
524 .set_mode = wm831x_dcdc_set_mode,
525 .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
526};
527
528static __devinit int wm831x_buckp_probe(struct platform_device *pdev)
529{
530 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
531 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
532 int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
533 struct wm831x_dcdc *dcdc;
534 struct resource *res;
535 int ret, irq;
536
537 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
538
539 if (pdata == NULL || pdata->dcdc[id] == NULL)
540 return -ENODEV;
541
542 dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
543 if (dcdc == NULL) {
544 dev_err(&pdev->dev, "Unable to allocate private data\n");
545 return -ENOMEM;
546 }
547
548 dcdc->wm831x = wm831x;
549
550 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
551 if (res == NULL) {
552 dev_err(&pdev->dev, "No I/O resource\n");
553 ret = -EINVAL;
554 goto err;
555 }
556 dcdc->base = res->start;
557
558 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
559 dcdc->desc.name = dcdc->name;
560 dcdc->desc.id = id;
561 dcdc->desc.type = REGULATOR_VOLTAGE;
562 dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
563 dcdc->desc.ops = &wm831x_buckp_ops;
564 dcdc->desc.owner = THIS_MODULE;
565
566 dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
567 pdata->dcdc[id], dcdc);
568 if (IS_ERR(dcdc->regulator)) {
569 ret = PTR_ERR(dcdc->regulator);
570 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
571 id + 1, ret);
572 goto err;
573 }
574
575 irq = platform_get_irq_byname(pdev, "UV");
576 ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
577 IRQF_TRIGGER_RISING, dcdc->name,
578 dcdc);
579 if (ret != 0) {
580 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
581 irq, ret);
582 goto err_regulator;
583 }
584
585 platform_set_drvdata(pdev, dcdc);
586
587 return 0;
588
589err_regulator:
590 regulator_unregister(dcdc->regulator);
591err:
592 kfree(dcdc);
593 return ret;
594}
595
596static __devexit int wm831x_buckp_remove(struct platform_device *pdev)
597{
598 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
599 struct wm831x *wm831x = dcdc->wm831x;
600
601 wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
602 regulator_unregister(dcdc->regulator);
603 kfree(dcdc);
604
605 return 0;
606}
607
608static struct platform_driver wm831x_buckp_driver = {
609 .probe = wm831x_buckp_probe,
610 .remove = __devexit_p(wm831x_buckp_remove),
611 .driver = {
612 .name = "wm831x-buckp",
613 },
614};
615
616/*
617 * DCDC boost convertors
618 */
619
620static int wm831x_boostp_get_status(struct regulator_dev *rdev)
621{
622 struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
623 struct wm831x *wm831x = dcdc->wm831x;
624 int ret;
625
626 /* First, check for errors */
627 ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
628 if (ret < 0)
629 return ret;
630
631 if (ret & (1 << rdev_get_id(rdev))) {
632 dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
633 rdev_get_id(rdev) + 1);
634 return REGULATOR_STATUS_ERROR;
635 }
636
637 /* Is the regulator on? */
638 ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
639 if (ret < 0)
640 return ret;
641 if (ret & (1 << rdev_get_id(rdev)))
642 return REGULATOR_STATUS_ON;
643 else
644 return REGULATOR_STATUS_OFF;
645}
646
647static struct regulator_ops wm831x_boostp_ops = {
648 .get_status = wm831x_boostp_get_status,
649
650 .is_enabled = wm831x_dcdc_is_enabled,
651 .enable = wm831x_dcdc_enable,
652 .disable = wm831x_dcdc_disable,
653};
654
655static __devinit int wm831x_boostp_probe(struct platform_device *pdev)
656{
657 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
658 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
659 int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
660 struct wm831x_dcdc *dcdc;
661 struct resource *res;
662 int ret, irq;
663
664 dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
665
666 if (pdata == NULL || pdata->dcdc[id] == NULL)
667 return -ENODEV;
668
669 dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
670 if (dcdc == NULL) {
671 dev_err(&pdev->dev, "Unable to allocate private data\n");
672 return -ENOMEM;
673 }
674
675 dcdc->wm831x = wm831x;
676
677 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
678 if (res == NULL) {
679 dev_err(&pdev->dev, "No I/O resource\n");
680 ret = -EINVAL;
681 goto err;
682 }
683 dcdc->base = res->start;
684
685 snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
686 dcdc->desc.name = dcdc->name;
687 dcdc->desc.id = id;
688 dcdc->desc.type = REGULATOR_VOLTAGE;
689 dcdc->desc.ops = &wm831x_boostp_ops;
690 dcdc->desc.owner = THIS_MODULE;
691
692 dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
693 pdata->dcdc[id], dcdc);
694 if (IS_ERR(dcdc->regulator)) {
695 ret = PTR_ERR(dcdc->regulator);
696 dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
697 id + 1, ret);
698 goto err;
699 }
700
701 irq = platform_get_irq_byname(pdev, "UV");
702 ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
703 IRQF_TRIGGER_RISING, dcdc->name,
704 dcdc);
705 if (ret != 0) {
706 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
707 irq, ret);
708 goto err_regulator;
709 }
710
711 platform_set_drvdata(pdev, dcdc);
712
713 return 0;
714
715err_regulator:
716 regulator_unregister(dcdc->regulator);
717err:
718 kfree(dcdc);
719 return ret;
720}
721
722static __devexit int wm831x_boostp_remove(struct platform_device *pdev)
723{
724 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
725 struct wm831x *wm831x = dcdc->wm831x;
726
727 wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
728 regulator_unregister(dcdc->regulator);
729 kfree(dcdc);
730
731 return 0;
732}
733
734static struct platform_driver wm831x_boostp_driver = {
735 .probe = wm831x_boostp_probe,
736 .remove = __devexit_p(wm831x_boostp_remove),
737 .driver = {
738 .name = "wm831x-boostp",
739 },
740};
741
742/*
743 * External Power Enable
744 *
745 * These aren't actually DCDCs but look like them in hardware so share
746 * code.
747 */
748
749#define WM831X_EPE_BASE 6
750
751static struct regulator_ops wm831x_epe_ops = {
752 .is_enabled = wm831x_dcdc_is_enabled,
753 .enable = wm831x_dcdc_enable,
754 .disable = wm831x_dcdc_disable,
755 .get_status = wm831x_dcdc_get_status,
756};
757
758static __devinit int wm831x_epe_probe(struct platform_device *pdev)
759{
760 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
761 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
762 int id = pdev->id % ARRAY_SIZE(pdata->epe);
763 struct wm831x_dcdc *dcdc;
764 int ret;
765
766 dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
767
768 if (pdata == NULL || pdata->epe[id] == NULL)
769 return -ENODEV;
770
771 dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
772 if (dcdc == NULL) {
773 dev_err(&pdev->dev, "Unable to allocate private data\n");
774 return -ENOMEM;
775 }
776
777 dcdc->wm831x = wm831x;
778
779 /* For current parts this is correct; probably need to revisit
780 * in future.
781 */
782 snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
783 dcdc->desc.name = dcdc->name;
784 dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
785 dcdc->desc.ops = &wm831x_epe_ops;
786 dcdc->desc.type = REGULATOR_VOLTAGE;
787 dcdc->desc.owner = THIS_MODULE;
788
789 dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
790 pdata->epe[id], dcdc);
791 if (IS_ERR(dcdc->regulator)) {
792 ret = PTR_ERR(dcdc->regulator);
793 dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
794 id + 1, ret);
795 goto err;
796 }
797
798 platform_set_drvdata(pdev, dcdc);
799
800 return 0;
801
802err:
803 kfree(dcdc);
804 return ret;
805}
806
807static __devexit int wm831x_epe_remove(struct platform_device *pdev)
808{
809 struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
810
811 regulator_unregister(dcdc->regulator);
812 kfree(dcdc);
813
814 return 0;
815}
816
817static struct platform_driver wm831x_epe_driver = {
818 .probe = wm831x_epe_probe,
819 .remove = __devexit_p(wm831x_epe_remove),
820 .driver = {
821 .name = "wm831x-epe",
822 },
823};
824
825static int __init wm831x_dcdc_init(void)
826{
827 int ret;
828 ret = platform_driver_register(&wm831x_buckv_driver);
829 if (ret != 0)
830 pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
831
832 ret = platform_driver_register(&wm831x_buckp_driver);
833 if (ret != 0)
834 pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
835
836 ret = platform_driver_register(&wm831x_boostp_driver);
837 if (ret != 0)
838 pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
839
840 ret = platform_driver_register(&wm831x_epe_driver);
841 if (ret != 0)
842 pr_err("Failed to register WM831x EPE driver: %d\n", ret);
843
844 return 0;
845}
846subsys_initcall(wm831x_dcdc_init);
847
848static void __exit wm831x_dcdc_exit(void)
849{
850 platform_driver_unregister(&wm831x_epe_driver);
851 platform_driver_unregister(&wm831x_boostp_driver);
852 platform_driver_unregister(&wm831x_buckp_driver);
853 platform_driver_unregister(&wm831x_buckv_driver);
854}
855module_exit(wm831x_dcdc_exit);
856
857/* Module information */
858MODULE_AUTHOR("Mark Brown");
859MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
860MODULE_LICENSE("GPL");
861MODULE_ALIAS("platform:wm831x-buckv");
862MODULE_ALIAS("platform:wm831x-buckp");
diff --git a/drivers/regulator/wm831x-isink.c b/drivers/regulator/wm831x-isink.c
new file mode 100644
index 000000000000..1d8d9879d3a1
--- /dev/null
+++ b/drivers/regulator/wm831x-isink.c
@@ -0,0 +1,260 @@
1/*
2 * wm831x-isink.c -- Current sink driver for the WM831x series
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/bitops.h>
18#include <linux/err.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22
23#include <linux/mfd/wm831x/core.h>
24#include <linux/mfd/wm831x/regulator.h>
25#include <linux/mfd/wm831x/pdata.h>
26
27#define WM831X_ISINK_MAX_NAME 7
28
29struct wm831x_isink {
30 char name[WM831X_ISINK_MAX_NAME];
31 struct regulator_desc desc;
32 int reg;
33 struct wm831x *wm831x;
34 struct regulator_dev *regulator;
35};
36
37static int wm831x_isink_enable(struct regulator_dev *rdev)
38{
39 struct wm831x_isink *isink = rdev_get_drvdata(rdev);
40 struct wm831x *wm831x = isink->wm831x;
41 int ret;
42
43 /* We have a two stage enable: first start the ISINK... */
44 ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA,
45 WM831X_CS1_ENA);
46 if (ret != 0)
47 return ret;
48
49 /* ...then enable drive */
50 ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_DRIVE,
51 WM831X_CS1_DRIVE);
52 if (ret != 0)
53 wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA, 0);
54
55 return ret;
56
57}
58
59static int wm831x_isink_disable(struct regulator_dev *rdev)
60{
61 struct wm831x_isink *isink = rdev_get_drvdata(rdev);
62 struct wm831x *wm831x = isink->wm831x;
63 int ret;
64
65 ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_DRIVE, 0);
66 if (ret < 0)
67 return ret;
68
69 ret = wm831x_set_bits(wm831x, isink->reg, WM831X_CS1_ENA, 0);
70 if (ret < 0)
71 return ret;
72
73 return ret;
74
75}
76
77static int wm831x_isink_is_enabled(struct regulator_dev *rdev)
78{
79 struct wm831x_isink *isink = rdev_get_drvdata(rdev);
80 struct wm831x *wm831x = isink->wm831x;
81 int ret;
82
83 ret = wm831x_reg_read(wm831x, isink->reg);
84 if (ret < 0)
85 return ret;
86
87 if ((ret & (WM831X_CS1_ENA | WM831X_CS1_DRIVE)) ==
88 (WM831X_CS1_ENA | WM831X_CS1_DRIVE))
89 return 1;
90 else
91 return 0;
92}
93
94static int wm831x_isink_set_current(struct regulator_dev *rdev,
95 int min_uA, int max_uA)
96{
97 struct wm831x_isink *isink = rdev_get_drvdata(rdev);
98 struct wm831x *wm831x = isink->wm831x;
99 int ret, i;
100
101 for (i = 0; i < ARRAY_SIZE(wm831x_isinkv_values); i++) {
102 int val = wm831x_isinkv_values[i];
103 if (min_uA >= val && val <= max_uA) {
104 ret = wm831x_set_bits(wm831x, isink->reg,
105 WM831X_CS1_ISEL_MASK, i);
106 return ret;
107 }
108 }
109
110 return -EINVAL;
111}
112
113static int wm831x_isink_get_current(struct regulator_dev *rdev)
114{
115 struct wm831x_isink *isink = rdev_get_drvdata(rdev);
116 struct wm831x *wm831x = isink->wm831x;
117 int ret;
118
119 ret = wm831x_reg_read(wm831x, isink->reg);
120 if (ret < 0)
121 return ret;
122
123 ret &= WM831X_CS1_ISEL_MASK;
124 if (ret > WM831X_ISINK_MAX_ISEL)
125 ret = WM831X_ISINK_MAX_ISEL;
126
127 return wm831x_isinkv_values[ret];
128}
129
130static struct regulator_ops wm831x_isink_ops = {
131 .is_enabled = wm831x_isink_is_enabled,
132 .enable = wm831x_isink_enable,
133 .disable = wm831x_isink_disable,
134 .set_current_limit = wm831x_isink_set_current,
135 .get_current_limit = wm831x_isink_get_current,
136};
137
138static irqreturn_t wm831x_isink_irq(int irq, void *data)
139{
140 struct wm831x_isink *isink = data;
141
142 regulator_notifier_call_chain(isink->regulator,
143 REGULATOR_EVENT_OVER_CURRENT,
144 NULL);
145
146 return IRQ_HANDLED;
147}
148
149
150static __devinit int wm831x_isink_probe(struct platform_device *pdev)
151{
152 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
153 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
154 struct wm831x_isink *isink;
155 int id = pdev->id % ARRAY_SIZE(pdata->isink);
156 struct resource *res;
157 int ret, irq;
158
159 dev_dbg(&pdev->dev, "Probing ISINK%d\n", id + 1);
160
161 if (pdata == NULL || pdata->isink[id] == NULL)
162 return -ENODEV;
163
164 isink = kzalloc(sizeof(struct wm831x_isink), GFP_KERNEL);
165 if (isink == NULL) {
166 dev_err(&pdev->dev, "Unable to allocate private data\n");
167 return -ENOMEM;
168 }
169
170 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
171 if (res == NULL) {
172 dev_err(&pdev->dev, "No I/O resource\n");
173 ret = -EINVAL;
174 goto err;
175 }
176 isink->reg = res->start;
177
178 /* For current parts this is correct; probably need to revisit
179 * in future.
180 */
181 snprintf(isink->name, sizeof(isink->name), "ISINK%d", id + 1);
182 isink->desc.name = isink->name;
183 isink->desc.id = id;
184 isink->desc.ops = &wm831x_isink_ops;
185 isink->desc.type = REGULATOR_CURRENT;
186 isink->desc.owner = THIS_MODULE;
187
188 isink->regulator = regulator_register(&isink->desc, &pdev->dev,
189 pdata->isink[id], isink);
190 if (IS_ERR(isink->regulator)) {
191 ret = PTR_ERR(isink->regulator);
192 dev_err(wm831x->dev, "Failed to register ISINK%d: %d\n",
193 id + 1, ret);
194 goto err;
195 }
196
197 irq = platform_get_irq(pdev, 0);
198 ret = wm831x_request_irq(wm831x, irq, wm831x_isink_irq,
199 IRQF_TRIGGER_RISING, isink->name,
200 isink);
201 if (ret != 0) {
202 dev_err(&pdev->dev, "Failed to request ISINK IRQ %d: %d\n",
203 irq, ret);
204 goto err_regulator;
205 }
206
207 platform_set_drvdata(pdev, isink);
208
209 return 0;
210
211err_regulator:
212 regulator_unregister(isink->regulator);
213err:
214 kfree(isink);
215 return ret;
216}
217
218static __devexit int wm831x_isink_remove(struct platform_device *pdev)
219{
220 struct wm831x_isink *isink = platform_get_drvdata(pdev);
221 struct wm831x *wm831x = isink->wm831x;
222
223 wm831x_free_irq(wm831x, platform_get_irq(pdev, 0), isink);
224
225 regulator_unregister(isink->regulator);
226 kfree(isink);
227
228 return 0;
229}
230
231static struct platform_driver wm831x_isink_driver = {
232 .probe = wm831x_isink_probe,
233 .remove = __devexit_p(wm831x_isink_remove),
234 .driver = {
235 .name = "wm831x-isink",
236 },
237};
238
239static int __init wm831x_isink_init(void)
240{
241 int ret;
242 ret = platform_driver_register(&wm831x_isink_driver);
243 if (ret != 0)
244 pr_err("Failed to register WM831x ISINK driver: %d\n", ret);
245
246 return ret;
247}
248subsys_initcall(wm831x_isink_init);
249
250static void __exit wm831x_isink_exit(void)
251{
252 platform_driver_unregister(&wm831x_isink_driver);
253}
254module_exit(wm831x_isink_exit);
255
256/* Module information */
257MODULE_AUTHOR("Mark Brown");
258MODULE_DESCRIPTION("WM831x current sink driver");
259MODULE_LICENSE("GPL");
260MODULE_ALIAS("platform:wm831x-isink");
diff --git a/drivers/regulator/wm831x-ldo.c b/drivers/regulator/wm831x-ldo.c
new file mode 100644
index 000000000000..bb61aede4801
--- /dev/null
+++ b/drivers/regulator/wm831x-ldo.c
@@ -0,0 +1,852 @@
1/*
2 * wm831x-ldo.c -- LDO driver for the WM831x series
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/bitops.h>
18#include <linux/err.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22
23#include <linux/mfd/wm831x/core.h>
24#include <linux/mfd/wm831x/regulator.h>
25#include <linux/mfd/wm831x/pdata.h>
26
27#define WM831X_LDO_MAX_NAME 6
28
29#define WM831X_LDO_CONTROL 0
30#define WM831X_LDO_ON_CONTROL 1
31#define WM831X_LDO_SLEEP_CONTROL 2
32
33#define WM831X_ALIVE_LDO_ON_CONTROL 0
34#define WM831X_ALIVE_LDO_SLEEP_CONTROL 1
35
36struct wm831x_ldo {
37 char name[WM831X_LDO_MAX_NAME];
38 struct regulator_desc desc;
39 int base;
40 struct wm831x *wm831x;
41 struct regulator_dev *regulator;
42};
43
44/*
45 * Shared
46 */
47
48static int wm831x_ldo_is_enabled(struct regulator_dev *rdev)
49{
50 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
51 struct wm831x *wm831x = ldo->wm831x;
52 int mask = 1 << rdev_get_id(rdev);
53 int reg;
54
55 reg = wm831x_reg_read(wm831x, WM831X_LDO_ENABLE);
56 if (reg < 0)
57 return reg;
58
59 if (reg & mask)
60 return 1;
61 else
62 return 0;
63}
64
65static int wm831x_ldo_enable(struct regulator_dev *rdev)
66{
67 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
68 struct wm831x *wm831x = ldo->wm831x;
69 int mask = 1 << rdev_get_id(rdev);
70
71 return wm831x_set_bits(wm831x, WM831X_LDO_ENABLE, mask, mask);
72}
73
74static int wm831x_ldo_disable(struct regulator_dev *rdev)
75{
76 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
77 struct wm831x *wm831x = ldo->wm831x;
78 int mask = 1 << rdev_get_id(rdev);
79
80 return wm831x_set_bits(wm831x, WM831X_LDO_ENABLE, mask, 0);
81}
82
83static irqreturn_t wm831x_ldo_uv_irq(int irq, void *data)
84{
85 struct wm831x_ldo *ldo = data;
86
87 regulator_notifier_call_chain(ldo->regulator,
88 REGULATOR_EVENT_UNDER_VOLTAGE,
89 NULL);
90
91 return IRQ_HANDLED;
92}
93
94/*
95 * General purpose LDOs
96 */
97
98#define WM831X_GP_LDO_SELECTOR_LOW 0xe
99#define WM831X_GP_LDO_MAX_SELECTOR 0x1f
100
101static int wm831x_gp_ldo_list_voltage(struct regulator_dev *rdev,
102 unsigned int selector)
103{
104 /* 0.9-1.6V in 50mV steps */
105 if (selector <= WM831X_GP_LDO_SELECTOR_LOW)
106 return 900000 + (selector * 50000);
107 /* 1.7-3.3V in 50mV steps */
108 if (selector <= WM831X_GP_LDO_MAX_SELECTOR)
109 return 1600000 + ((selector - WM831X_GP_LDO_SELECTOR_LOW)
110 * 100000);
111 return -EINVAL;
112}
113
114static int wm831x_gp_ldo_set_voltage_int(struct regulator_dev *rdev, int reg,
115 int min_uV, int max_uV)
116{
117 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
118 struct wm831x *wm831x = ldo->wm831x;
119 int vsel, ret;
120
121 if (min_uV < 900000)
122 vsel = 0;
123 else if (min_uV < 1700000)
124 vsel = ((min_uV - 900000) / 50000);
125 else
126 vsel = ((min_uV - 1700000) / 100000)
127 + WM831X_GP_LDO_SELECTOR_LOW + 1;
128
129 ret = wm831x_gp_ldo_list_voltage(rdev, vsel);
130 if (ret < 0)
131 return ret;
132 if (ret < min_uV || ret > max_uV)
133 return -EINVAL;
134
135 return wm831x_set_bits(wm831x, reg, WM831X_LDO1_ON_VSEL_MASK, vsel);
136}
137
138static int wm831x_gp_ldo_set_voltage(struct regulator_dev *rdev,
139 int min_uV, int max_uV)
140{
141 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
142 int reg = ldo->base + WM831X_LDO_ON_CONTROL;
143
144 return wm831x_gp_ldo_set_voltage_int(rdev, reg, min_uV, max_uV);
145}
146
147static int wm831x_gp_ldo_set_suspend_voltage(struct regulator_dev *rdev,
148 int uV)
149{
150 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
151 int reg = ldo->base + WM831X_LDO_SLEEP_CONTROL;
152
153 return wm831x_gp_ldo_set_voltage_int(rdev, reg, uV, uV);
154}
155
156static int wm831x_gp_ldo_get_voltage(struct regulator_dev *rdev)
157{
158 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
159 struct wm831x *wm831x = ldo->wm831x;
160 int reg = ldo->base + WM831X_LDO_ON_CONTROL;
161 int ret;
162
163 ret = wm831x_reg_read(wm831x, reg);
164 if (ret < 0)
165 return ret;
166
167 ret &= WM831X_LDO1_ON_VSEL_MASK;
168
169 return wm831x_gp_ldo_list_voltage(rdev, ret);
170}
171
172static unsigned int wm831x_gp_ldo_get_mode(struct regulator_dev *rdev)
173{
174 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
175 struct wm831x *wm831x = ldo->wm831x;
176 int ctrl_reg = ldo->base + WM831X_LDO_CONTROL;
177 int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
178 unsigned int ret;
179
180 ret = wm831x_reg_read(wm831x, on_reg);
181 if (ret < 0)
182 return 0;
183
184 if (!(ret & WM831X_LDO1_ON_MODE))
185 return REGULATOR_MODE_NORMAL;
186
187 ret = wm831x_reg_read(wm831x, ctrl_reg);
188 if (ret < 0)
189 return 0;
190
191 if (ret & WM831X_LDO1_LP_MODE)
192 return REGULATOR_MODE_STANDBY;
193 else
194 return REGULATOR_MODE_IDLE;
195}
196
197static int wm831x_gp_ldo_set_mode(struct regulator_dev *rdev,
198 unsigned int mode)
199{
200 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
201 struct wm831x *wm831x = ldo->wm831x;
202 int ctrl_reg = ldo->base + WM831X_LDO_CONTROL;
203 int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
204 int ret;
205
206
207 switch (mode) {
208 case REGULATOR_MODE_NORMAL:
209 ret = wm831x_set_bits(wm831x, on_reg,
210 WM831X_LDO1_ON_MODE, 0);
211 if (ret < 0)
212 return ret;
213 break;
214
215 case REGULATOR_MODE_IDLE:
216 ret = wm831x_set_bits(wm831x, ctrl_reg,
217 WM831X_LDO1_LP_MODE,
218 WM831X_LDO1_LP_MODE);
219 if (ret < 0)
220 return ret;
221
222 ret = wm831x_set_bits(wm831x, on_reg,
223 WM831X_LDO1_ON_MODE,
224 WM831X_LDO1_ON_MODE);
225 if (ret < 0)
226 return ret;
227
228 case REGULATOR_MODE_STANDBY:
229 ret = wm831x_set_bits(wm831x, ctrl_reg,
230 WM831X_LDO1_LP_MODE, 0);
231 if (ret < 0)
232 return ret;
233
234 ret = wm831x_set_bits(wm831x, on_reg,
235 WM831X_LDO1_ON_MODE,
236 WM831X_LDO1_ON_MODE);
237 if (ret < 0)
238 return ret;
239 break;
240
241 default:
242 return -EINVAL;
243 }
244
245 return 0;
246}
247
248static int wm831x_gp_ldo_get_status(struct regulator_dev *rdev)
249{
250 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
251 struct wm831x *wm831x = ldo->wm831x;
252 int mask = 1 << rdev_get_id(rdev);
253 int ret;
254
255 /* Is the regulator on? */
256 ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS);
257 if (ret < 0)
258 return ret;
259 if (!(ret & mask))
260 return REGULATOR_STATUS_OFF;
261
262 /* Is it reporting under voltage? */
263 ret = wm831x_reg_read(wm831x, WM831X_LDO_UV_STATUS);
264 if (ret & mask)
265 return REGULATOR_STATUS_ERROR;
266
267 ret = wm831x_gp_ldo_get_mode(rdev);
268 if (ret < 0)
269 return ret;
270 else
271 return regulator_mode_to_status(ret);
272}
273
274static unsigned int wm831x_gp_ldo_get_optimum_mode(struct regulator_dev *rdev,
275 int input_uV,
276 int output_uV, int load_uA)
277{
278 if (load_uA < 20000)
279 return REGULATOR_MODE_STANDBY;
280 if (load_uA < 50000)
281 return REGULATOR_MODE_IDLE;
282 return REGULATOR_MODE_NORMAL;
283}
284
285
286static struct regulator_ops wm831x_gp_ldo_ops = {
287 .list_voltage = wm831x_gp_ldo_list_voltage,
288 .get_voltage = wm831x_gp_ldo_get_voltage,
289 .set_voltage = wm831x_gp_ldo_set_voltage,
290 .set_suspend_voltage = wm831x_gp_ldo_set_suspend_voltage,
291 .get_mode = wm831x_gp_ldo_get_mode,
292 .set_mode = wm831x_gp_ldo_set_mode,
293 .get_status = wm831x_gp_ldo_get_status,
294 .get_optimum_mode = wm831x_gp_ldo_get_optimum_mode,
295
296 .is_enabled = wm831x_ldo_is_enabled,
297 .enable = wm831x_ldo_enable,
298 .disable = wm831x_ldo_disable,
299};
300
301static __devinit int wm831x_gp_ldo_probe(struct platform_device *pdev)
302{
303 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
304 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
305 int id = pdev->id % ARRAY_SIZE(pdata->ldo);
306 struct wm831x_ldo *ldo;
307 struct resource *res;
308 int ret, irq;
309
310 dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1);
311
312 if (pdata == NULL || pdata->ldo[id] == NULL)
313 return -ENODEV;
314
315 ldo = kzalloc(sizeof(struct wm831x_ldo), GFP_KERNEL);
316 if (ldo == NULL) {
317 dev_err(&pdev->dev, "Unable to allocate private data\n");
318 return -ENOMEM;
319 }
320
321 ldo->wm831x = wm831x;
322
323 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
324 if (res == NULL) {
325 dev_err(&pdev->dev, "No I/O resource\n");
326 ret = -EINVAL;
327 goto err;
328 }
329 ldo->base = res->start;
330
331 snprintf(ldo->name, sizeof(ldo->name), "LDO%d", id + 1);
332 ldo->desc.name = ldo->name;
333 ldo->desc.id = id;
334 ldo->desc.type = REGULATOR_VOLTAGE;
335 ldo->desc.n_voltages = WM831X_GP_LDO_MAX_SELECTOR + 1;
336 ldo->desc.ops = &wm831x_gp_ldo_ops;
337 ldo->desc.owner = THIS_MODULE;
338
339 ldo->regulator = regulator_register(&ldo->desc, &pdev->dev,
340 pdata->ldo[id], ldo);
341 if (IS_ERR(ldo->regulator)) {
342 ret = PTR_ERR(ldo->regulator);
343 dev_err(wm831x->dev, "Failed to register LDO%d: %d\n",
344 id + 1, ret);
345 goto err;
346 }
347
348 irq = platform_get_irq_byname(pdev, "UV");
349 ret = wm831x_request_irq(wm831x, irq, wm831x_ldo_uv_irq,
350 IRQF_TRIGGER_RISING, ldo->name,
351 ldo);
352 if (ret != 0) {
353 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
354 irq, ret);
355 goto err_regulator;
356 }
357
358 platform_set_drvdata(pdev, ldo);
359
360 return 0;
361
362err_regulator:
363 regulator_unregister(ldo->regulator);
364err:
365 kfree(ldo);
366 return ret;
367}
368
369static __devexit int wm831x_gp_ldo_remove(struct platform_device *pdev)
370{
371 struct wm831x_ldo *ldo = platform_get_drvdata(pdev);
372 struct wm831x *wm831x = ldo->wm831x;
373
374 wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), ldo);
375 regulator_unregister(ldo->regulator);
376 kfree(ldo);
377
378 return 0;
379}
380
381static struct platform_driver wm831x_gp_ldo_driver = {
382 .probe = wm831x_gp_ldo_probe,
383 .remove = __devexit_p(wm831x_gp_ldo_remove),
384 .driver = {
385 .name = "wm831x-ldo",
386 },
387};
388
389/*
390 * Analogue LDOs
391 */
392
393
394#define WM831X_ALDO_SELECTOR_LOW 0xc
395#define WM831X_ALDO_MAX_SELECTOR 0x1f
396
397static int wm831x_aldo_list_voltage(struct regulator_dev *rdev,
398 unsigned int selector)
399{
400 /* 1-1.6V in 50mV steps */
401 if (selector <= WM831X_ALDO_SELECTOR_LOW)
402 return 1000000 + (selector * 50000);
403 /* 1.7-3.5V in 50mV steps */
404 if (selector <= WM831X_ALDO_MAX_SELECTOR)
405 return 1600000 + ((selector - WM831X_ALDO_SELECTOR_LOW)
406 * 100000);
407 return -EINVAL;
408}
409
410static int wm831x_aldo_set_voltage_int(struct regulator_dev *rdev, int reg,
411 int min_uV, int max_uV)
412{
413 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
414 struct wm831x *wm831x = ldo->wm831x;
415 int vsel, ret;
416
417 if (min_uV < 1000000)
418 vsel = 0;
419 else if (min_uV < 1700000)
420 vsel = ((min_uV - 1000000) / 50000);
421 else
422 vsel = ((min_uV - 1700000) / 100000)
423 + WM831X_ALDO_SELECTOR_LOW + 1;
424
425 ret = wm831x_aldo_list_voltage(rdev, vsel);
426 if (ret < 0)
427 return ret;
428 if (ret < min_uV || ret > max_uV)
429 return -EINVAL;
430
431 return wm831x_set_bits(wm831x, reg, WM831X_LDO7_ON_VSEL_MASK, vsel);
432}
433
434static int wm831x_aldo_set_voltage(struct regulator_dev *rdev,
435 int min_uV, int max_uV)
436{
437 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
438 int reg = ldo->base + WM831X_LDO_ON_CONTROL;
439
440 return wm831x_aldo_set_voltage_int(rdev, reg, min_uV, max_uV);
441}
442
443static int wm831x_aldo_set_suspend_voltage(struct regulator_dev *rdev,
444 int uV)
445{
446 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
447 int reg = ldo->base + WM831X_LDO_SLEEP_CONTROL;
448
449 return wm831x_aldo_set_voltage_int(rdev, reg, uV, uV);
450}
451
452static int wm831x_aldo_get_voltage(struct regulator_dev *rdev)
453{
454 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
455 struct wm831x *wm831x = ldo->wm831x;
456 int reg = ldo->base + WM831X_LDO_ON_CONTROL;
457 int ret;
458
459 ret = wm831x_reg_read(wm831x, reg);
460 if (ret < 0)
461 return ret;
462
463 ret &= WM831X_LDO7_ON_VSEL_MASK;
464
465 return wm831x_aldo_list_voltage(rdev, ret);
466}
467
468static unsigned int wm831x_aldo_get_mode(struct regulator_dev *rdev)
469{
470 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
471 struct wm831x *wm831x = ldo->wm831x;
472 int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
473 unsigned int ret;
474
475 ret = wm831x_reg_read(wm831x, on_reg);
476 if (ret < 0)
477 return 0;
478
479 if (ret & WM831X_LDO7_ON_MODE)
480 return REGULATOR_MODE_IDLE;
481 else
482 return REGULATOR_MODE_NORMAL;
483}
484
485static int wm831x_aldo_set_mode(struct regulator_dev *rdev,
486 unsigned int mode)
487{
488 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
489 struct wm831x *wm831x = ldo->wm831x;
490 int ctrl_reg = ldo->base + WM831X_LDO_CONTROL;
491 int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
492 int ret;
493
494
495 switch (mode) {
496 case REGULATOR_MODE_NORMAL:
497 ret = wm831x_set_bits(wm831x, on_reg,
498 WM831X_LDO7_ON_MODE, 0);
499 if (ret < 0)
500 return ret;
501 break;
502
503 case REGULATOR_MODE_IDLE:
504 ret = wm831x_set_bits(wm831x, ctrl_reg,
505 WM831X_LDO7_ON_MODE,
506 WM831X_LDO7_ON_MODE);
507 if (ret < 0)
508 return ret;
509 break;
510
511 default:
512 return -EINVAL;
513 }
514
515 return 0;
516}
517
518static int wm831x_aldo_get_status(struct regulator_dev *rdev)
519{
520 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
521 struct wm831x *wm831x = ldo->wm831x;
522 int mask = 1 << rdev_get_id(rdev);
523 int ret;
524
525 /* Is the regulator on? */
526 ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS);
527 if (ret < 0)
528 return ret;
529 if (!(ret & mask))
530 return REGULATOR_STATUS_OFF;
531
532 /* Is it reporting under voltage? */
533 ret = wm831x_reg_read(wm831x, WM831X_LDO_UV_STATUS);
534 if (ret & mask)
535 return REGULATOR_STATUS_ERROR;
536
537 ret = wm831x_aldo_get_mode(rdev);
538 if (ret < 0)
539 return ret;
540 else
541 return regulator_mode_to_status(ret);
542}
543
544static struct regulator_ops wm831x_aldo_ops = {
545 .list_voltage = wm831x_aldo_list_voltage,
546 .get_voltage = wm831x_aldo_get_voltage,
547 .set_voltage = wm831x_aldo_set_voltage,
548 .set_suspend_voltage = wm831x_aldo_set_suspend_voltage,
549 .get_mode = wm831x_aldo_get_mode,
550 .set_mode = wm831x_aldo_set_mode,
551 .get_status = wm831x_aldo_get_status,
552
553 .is_enabled = wm831x_ldo_is_enabled,
554 .enable = wm831x_ldo_enable,
555 .disable = wm831x_ldo_disable,
556};
557
558static __devinit int wm831x_aldo_probe(struct platform_device *pdev)
559{
560 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
561 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
562 int id = pdev->id % ARRAY_SIZE(pdata->ldo);
563 struct wm831x_ldo *ldo;
564 struct resource *res;
565 int ret, irq;
566
567 dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1);
568
569 if (pdata == NULL || pdata->ldo[id] == NULL)
570 return -ENODEV;
571
572 ldo = kzalloc(sizeof(struct wm831x_ldo), GFP_KERNEL);
573 if (ldo == NULL) {
574 dev_err(&pdev->dev, "Unable to allocate private data\n");
575 return -ENOMEM;
576 }
577
578 ldo->wm831x = wm831x;
579
580 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
581 if (res == NULL) {
582 dev_err(&pdev->dev, "No I/O resource\n");
583 ret = -EINVAL;
584 goto err;
585 }
586 ldo->base = res->start;
587
588 snprintf(ldo->name, sizeof(ldo->name), "LDO%d", id + 1);
589 ldo->desc.name = ldo->name;
590 ldo->desc.id = id;
591 ldo->desc.type = REGULATOR_VOLTAGE;
592 ldo->desc.n_voltages = WM831X_ALDO_MAX_SELECTOR + 1;
593 ldo->desc.ops = &wm831x_aldo_ops;
594 ldo->desc.owner = THIS_MODULE;
595
596 ldo->regulator = regulator_register(&ldo->desc, &pdev->dev,
597 pdata->ldo[id], ldo);
598 if (IS_ERR(ldo->regulator)) {
599 ret = PTR_ERR(ldo->regulator);
600 dev_err(wm831x->dev, "Failed to register LDO%d: %d\n",
601 id + 1, ret);
602 goto err;
603 }
604
605 irq = platform_get_irq_byname(pdev, "UV");
606 ret = wm831x_request_irq(wm831x, irq, wm831x_ldo_uv_irq,
607 IRQF_TRIGGER_RISING, ldo->name,
608 ldo);
609 if (ret != 0) {
610 dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
611 irq, ret);
612 goto err_regulator;
613 }
614
615 platform_set_drvdata(pdev, ldo);
616
617 return 0;
618
619err_regulator:
620 regulator_unregister(ldo->regulator);
621err:
622 kfree(ldo);
623 return ret;
624}
625
626static __devexit int wm831x_aldo_remove(struct platform_device *pdev)
627{
628 struct wm831x_ldo *ldo = platform_get_drvdata(pdev);
629 struct wm831x *wm831x = ldo->wm831x;
630
631 wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), ldo);
632 regulator_unregister(ldo->regulator);
633 kfree(ldo);
634
635 return 0;
636}
637
638static struct platform_driver wm831x_aldo_driver = {
639 .probe = wm831x_aldo_probe,
640 .remove = __devexit_p(wm831x_aldo_remove),
641 .driver = {
642 .name = "wm831x-aldo",
643 },
644};
645
646/*
647 * Alive LDO
648 */
649
650#define WM831X_ALIVE_LDO_MAX_SELECTOR 0xf
651
652static int wm831x_alive_ldo_list_voltage(struct regulator_dev *rdev,
653 unsigned int selector)
654{
655 /* 0.8-1.55V in 50mV steps */
656 if (selector <= WM831X_ALIVE_LDO_MAX_SELECTOR)
657 return 800000 + (selector * 50000);
658 return -EINVAL;
659}
660
661static int wm831x_alive_ldo_set_voltage_int(struct regulator_dev *rdev,
662 int reg,
663 int min_uV, int max_uV)
664{
665 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
666 struct wm831x *wm831x = ldo->wm831x;
667 int vsel, ret;
668
669 vsel = (min_uV - 800000) / 50000;
670
671 ret = wm831x_alive_ldo_list_voltage(rdev, vsel);
672 if (ret < 0)
673 return ret;
674 if (ret < min_uV || ret > max_uV)
675 return -EINVAL;
676
677 return wm831x_set_bits(wm831x, reg, WM831X_LDO11_ON_VSEL_MASK, vsel);
678}
679
680static int wm831x_alive_ldo_set_voltage(struct regulator_dev *rdev,
681 int min_uV, int max_uV)
682{
683 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
684 int reg = ldo->base + WM831X_ALIVE_LDO_ON_CONTROL;
685
686 return wm831x_alive_ldo_set_voltage_int(rdev, reg, min_uV, max_uV);
687}
688
689static int wm831x_alive_ldo_set_suspend_voltage(struct regulator_dev *rdev,
690 int uV)
691{
692 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
693 int reg = ldo->base + WM831X_ALIVE_LDO_SLEEP_CONTROL;
694
695 return wm831x_alive_ldo_set_voltage_int(rdev, reg, uV, uV);
696}
697
698static int wm831x_alive_ldo_get_voltage(struct regulator_dev *rdev)
699{
700 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
701 struct wm831x *wm831x = ldo->wm831x;
702 int reg = ldo->base + WM831X_ALIVE_LDO_ON_CONTROL;
703 int ret;
704
705 ret = wm831x_reg_read(wm831x, reg);
706 if (ret < 0)
707 return ret;
708
709 ret &= WM831X_LDO11_ON_VSEL_MASK;
710
711 return wm831x_alive_ldo_list_voltage(rdev, ret);
712}
713
714static int wm831x_alive_ldo_get_status(struct regulator_dev *rdev)
715{
716 struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
717 struct wm831x *wm831x = ldo->wm831x;
718 int mask = 1 << rdev_get_id(rdev);
719 int ret;
720
721 /* Is the regulator on? */
722 ret = wm831x_reg_read(wm831x, WM831X_LDO_STATUS);
723 if (ret < 0)
724 return ret;
725 if (ret & mask)
726 return REGULATOR_STATUS_ON;
727 else
728 return REGULATOR_STATUS_OFF;
729}
730
731static struct regulator_ops wm831x_alive_ldo_ops = {
732 .list_voltage = wm831x_alive_ldo_list_voltage,
733 .get_voltage = wm831x_alive_ldo_get_voltage,
734 .set_voltage = wm831x_alive_ldo_set_voltage,
735 .set_suspend_voltage = wm831x_alive_ldo_set_suspend_voltage,
736 .get_status = wm831x_alive_ldo_get_status,
737
738 .is_enabled = wm831x_ldo_is_enabled,
739 .enable = wm831x_ldo_enable,
740 .disable = wm831x_ldo_disable,
741};
742
743static __devinit int wm831x_alive_ldo_probe(struct platform_device *pdev)
744{
745 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
746 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
747 int id = pdev->id % ARRAY_SIZE(pdata->ldo);
748 struct wm831x_ldo *ldo;
749 struct resource *res;
750 int ret;
751
752 dev_dbg(&pdev->dev, "Probing LDO%d\n", id + 1);
753
754 if (pdata == NULL || pdata->ldo[id] == NULL)
755 return -ENODEV;
756
757 ldo = kzalloc(sizeof(struct wm831x_ldo), GFP_KERNEL);
758 if (ldo == NULL) {
759 dev_err(&pdev->dev, "Unable to allocate private data\n");
760 return -ENOMEM;
761 }
762
763 ldo->wm831x = wm831x;
764
765 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
766 if (res == NULL) {
767 dev_err(&pdev->dev, "No I/O resource\n");
768 ret = -EINVAL;
769 goto err;
770 }
771 ldo->base = res->start;
772
773 snprintf(ldo->name, sizeof(ldo->name), "LDO%d", id + 1);
774 ldo->desc.name = ldo->name;
775 ldo->desc.id = id;
776 ldo->desc.type = REGULATOR_VOLTAGE;
777 ldo->desc.n_voltages = WM831X_ALIVE_LDO_MAX_SELECTOR + 1;
778 ldo->desc.ops = &wm831x_alive_ldo_ops;
779 ldo->desc.owner = THIS_MODULE;
780
781 ldo->regulator = regulator_register(&ldo->desc, &pdev->dev,
782 pdata->ldo[id], ldo);
783 if (IS_ERR(ldo->regulator)) {
784 ret = PTR_ERR(ldo->regulator);
785 dev_err(wm831x->dev, "Failed to register LDO%d: %d\n",
786 id + 1, ret);
787 goto err;
788 }
789
790 platform_set_drvdata(pdev, ldo);
791
792 return 0;
793
794err:
795 kfree(ldo);
796 return ret;
797}
798
799static __devexit int wm831x_alive_ldo_remove(struct platform_device *pdev)
800{
801 struct wm831x_ldo *ldo = platform_get_drvdata(pdev);
802
803 regulator_unregister(ldo->regulator);
804 kfree(ldo);
805
806 return 0;
807}
808
809static struct platform_driver wm831x_alive_ldo_driver = {
810 .probe = wm831x_alive_ldo_probe,
811 .remove = __devexit_p(wm831x_alive_ldo_remove),
812 .driver = {
813 .name = "wm831x-alive-ldo",
814 },
815};
816
817static int __init wm831x_ldo_init(void)
818{
819 int ret;
820
821 ret = platform_driver_register(&wm831x_gp_ldo_driver);
822 if (ret != 0)
823 pr_err("Failed to register WM831x GP LDO driver: %d\n", ret);
824
825 ret = platform_driver_register(&wm831x_aldo_driver);
826 if (ret != 0)
827 pr_err("Failed to register WM831x ALDO driver: %d\n", ret);
828
829 ret = platform_driver_register(&wm831x_alive_ldo_driver);
830 if (ret != 0)
831 pr_err("Failed to register WM831x alive LDO driver: %d\n",
832 ret);
833
834 return 0;
835}
836subsys_initcall(wm831x_ldo_init);
837
838static void __exit wm831x_ldo_exit(void)
839{
840 platform_driver_unregister(&wm831x_alive_ldo_driver);
841 platform_driver_unregister(&wm831x_aldo_driver);
842 platform_driver_unregister(&wm831x_gp_ldo_driver);
843}
844module_exit(wm831x_ldo_exit);
845
846/* Module information */
847MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
848MODULE_DESCRIPTION("WM831x LDO driver");
849MODULE_LICENSE("GPL");
850MODULE_ALIAS("platform:wm831x-ldo");
851MODULE_ALIAS("platform:wm831x-aldo");
852MODULE_ALIAS("platform:wm831x-aliveldo");
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 81adbdbd5042..73771b09fbd3 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -518,6 +518,16 @@ config RTC_DRV_V3020
518 This driver can also be built as a module. If so, the module 518 This driver can also be built as a module. If so, the module
519 will be called rtc-v3020. 519 will be called rtc-v3020.
520 520
521config RTC_DRV_WM831X
522 tristate "Wolfson Microelectronics WM831x RTC"
523 depends on MFD_WM831X
524 help
525 If you say yes here you will get support for the RTC subsystem
526 of the Wolfson Microelectronics WM831X series PMICs.
527
528 This driver can also be built as a module. If so, the module
529 will be called "rtc-wm831x".
530
521config RTC_DRV_WM8350 531config RTC_DRV_WM8350
522 tristate "Wolfson Microelectronics WM8350 RTC" 532 tristate "Wolfson Microelectronics WM8350 RTC"
523 depends on MFD_WM8350 533 depends on MFD_WM8350
@@ -535,6 +545,15 @@ config RTC_DRV_PCF50633
535 If you say yes here you get support for the RTC subsystem of the 545 If you say yes here you get support for the RTC subsystem of the
536 NXP PCF50633 used in embedded systems. 546 NXP PCF50633 used in embedded systems.
537 547
548config RTC_DRV_AB3100
549 tristate "ST-Ericsson AB3100 RTC"
550 depends on AB3100_CORE
551 default y if AB3100_CORE
552 help
553 Select this to enable the ST-Ericsson AB3100 Mixed Signal IC RTC
554 support. This chip contains a battery- and capacitor-backed RTC.
555
556
538comment "on-CPU RTC drivers" 557comment "on-CPU RTC drivers"
539 558
540config RTC_DRV_OMAP 559config RTC_DRV_OMAP
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 3c0f2b2ac927..5e152ffe5058 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -17,6 +17,7 @@ rtc-core-$(CONFIG_RTC_INTF_SYSFS) += rtc-sysfs.o
17 17
18# Keep the list ordered. 18# Keep the list ordered.
19 19
20obj-$(CONFIG_RTC_DRV_AB3100) += rtc-ab3100.o
20obj-$(CONFIG_RTC_DRV_AT32AP700X)+= rtc-at32ap700x.o 21obj-$(CONFIG_RTC_DRV_AT32AP700X)+= rtc-at32ap700x.o
21obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o 22obj-$(CONFIG_RTC_DRV_AT91RM9200)+= rtc-at91rm9200.o
22obj-$(CONFIG_RTC_DRV_AT91SAM9) += rtc-at91sam9.o 23obj-$(CONFIG_RTC_DRV_AT91SAM9) += rtc-at91sam9.o
@@ -74,6 +75,7 @@ obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl4030.o
74obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o 75obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o
75obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o 76obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o
76obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o 77obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o
78obj-$(CONFIG_RTC_DRV_WM831X) += rtc-wm831x.o
77obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o 79obj-$(CONFIG_RTC_DRV_WM8350) += rtc-wm8350.o
78obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o 80obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o
79obj-$(CONFIG_RTC_DRV_PCF50633) += rtc-pcf50633.o 81obj-$(CONFIG_RTC_DRV_PCF50633) += rtc-pcf50633.o
diff --git a/drivers/rtc/rtc-ab3100.c b/drivers/rtc/rtc-ab3100.c
new file mode 100644
index 000000000000..4704aac2b5af
--- /dev/null
+++ b/drivers/rtc/rtc-ab3100.c
@@ -0,0 +1,281 @@
1/*
2 * Copyright (C) 2007-2009 ST-Ericsson AB
3 * License terms: GNU General Public License (GPL) version 2
4 * RTC clock driver for the AB3100 Analog Baseband Chip
5 * Author: Linus Walleij <linus.walleij@stericsson.com>
6 */
7#include <linux/module.h>
8#include <linux/kernel.h>
9#include <linux/init.h>
10#include <linux/platform_device.h>
11#include <linux/rtc.h>
12#include <linux/mfd/ab3100.h>
13
14/* Clock rate in Hz */
15#define AB3100_RTC_CLOCK_RATE 32768
16
17/*
18 * The AB3100 RTC registers. These are the same for
19 * AB3000 and AB3100.
20 * Control register:
21 * Bit 0: RTC Monitor cleared=0, active=1, if you set it
22 * to 1 it remains active until RTC power is lost.
23 * Bit 1: 32 kHz Oscillator, 0 = on, 1 = bypass
24 * Bit 2: Alarm on, 0 = off, 1 = on
25 * Bit 3: 32 kHz buffer disabling, 0 = enabled, 1 = disabled
26 */
27#define AB3100_RTC 0x53
28/* default setting, buffer disabled, alarm on */
29#define RTC_SETTING 0x30
30/* Alarm when AL0-AL3 == TI0-TI3 */
31#define AB3100_AL0 0x56
32#define AB3100_AL1 0x57
33#define AB3100_AL2 0x58
34#define AB3100_AL3 0x59
35/* This 48-bit register that counts up at 32768 Hz */
36#define AB3100_TI0 0x5a
37#define AB3100_TI1 0x5b
38#define AB3100_TI2 0x5c
39#define AB3100_TI3 0x5d
40#define AB3100_TI4 0x5e
41#define AB3100_TI5 0x5f
42
43/*
44 * RTC clock functions and device struct declaration
45 */
46static int ab3100_rtc_set_mmss(struct device *dev, unsigned long secs)
47{
48 struct ab3100 *ab3100_data = dev_get_drvdata(dev);
49 u8 regs[] = {AB3100_TI0, AB3100_TI1, AB3100_TI2,
50 AB3100_TI3, AB3100_TI4, AB3100_TI5};
51 unsigned char buf[6];
52 u64 fat_time = (u64) secs * AB3100_RTC_CLOCK_RATE * 2;
53 int err = 0;
54 int i;
55
56 buf[0] = (fat_time) & 0xFF;
57 buf[1] = (fat_time >> 8) & 0xFF;
58 buf[2] = (fat_time >> 16) & 0xFF;
59 buf[3] = (fat_time >> 24) & 0xFF;
60 buf[4] = (fat_time >> 32) & 0xFF;
61 buf[5] = (fat_time >> 40) & 0xFF;
62
63 for (i = 0; i < 6; i++) {
64 err = ab3100_set_register_interruptible(ab3100_data,
65 regs[i], buf[i]);
66 if (err)
67 return err;
68 }
69
70 /* Set the flag to mark that the clock is now set */
71 return ab3100_mask_and_set_register_interruptible(ab3100_data,
72 AB3100_RTC,
73 0xFE, 0x01);
74
75}
76
77static int ab3100_rtc_read_time(struct device *dev, struct rtc_time *tm)
78{
79 struct ab3100 *ab3100_data = dev_get_drvdata(dev);
80 unsigned long time;
81 u8 rtcval;
82 int err;
83
84 err = ab3100_get_register_interruptible(ab3100_data,
85 AB3100_RTC, &rtcval);
86 if (err)
87 return err;
88
89 if (!(rtcval & 0x01)) {
90 dev_info(dev, "clock not set (lost power)");
91 return -EINVAL;
92 } else {
93 u64 fat_time;
94 u8 buf[6];
95
96 /* Read out time registers */
97 err = ab3100_get_register_page_interruptible(ab3100_data,
98 AB3100_TI0,
99 buf, 6);
100 if (err != 0)
101 return err;
102
103 fat_time = ((u64) buf[5] << 40) | ((u64) buf[4] << 32) |
104 ((u64) buf[3] << 24) | ((u64) buf[2] << 16) |
105 ((u64) buf[1] << 8) | (u64) buf[0];
106 time = (unsigned long) (fat_time /
107 (u64) (AB3100_RTC_CLOCK_RATE * 2));
108 }
109
110 rtc_time_to_tm(time, tm);
111
112 return rtc_valid_tm(tm);
113}
114
115static int ab3100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
116{
117 struct ab3100 *ab3100_data = dev_get_drvdata(dev);
118 unsigned long time;
119 u64 fat_time;
120 u8 buf[6];
121 u8 rtcval;
122 int err;
123
124 /* Figure out if alarm is enabled or not */
125 err = ab3100_get_register_interruptible(ab3100_data,
126 AB3100_RTC, &rtcval);
127 if (err)
128 return err;
129 if (rtcval & 0x04)
130 alarm->enabled = 1;
131 else
132 alarm->enabled = 0;
133 /* No idea how this could be represented */
134 alarm->pending = 0;
135 /* Read out alarm registers, only 4 bytes */
136 err = ab3100_get_register_page_interruptible(ab3100_data,
137 AB3100_AL0, buf, 4);
138 if (err)
139 return err;
140 fat_time = ((u64) buf[3] << 40) | ((u64) buf[2] << 32) |
141 ((u64) buf[1] << 24) | ((u64) buf[0] << 16);
142 time = (unsigned long) (fat_time / (u64) (AB3100_RTC_CLOCK_RATE * 2));
143
144 rtc_time_to_tm(time, &alarm->time);
145
146 return rtc_valid_tm(&alarm->time);
147}
148
149static int ab3100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
150{
151 struct ab3100 *ab3100_data = dev_get_drvdata(dev);
152 u8 regs[] = {AB3100_AL0, AB3100_AL1, AB3100_AL2, AB3100_AL3};
153 unsigned char buf[4];
154 unsigned long secs;
155 u64 fat_time;
156 int err;
157 int i;
158
159 rtc_tm_to_time(&alarm->time, &secs);
160 fat_time = (u64) secs * AB3100_RTC_CLOCK_RATE * 2;
161 buf[0] = (fat_time >> 16) & 0xFF;
162 buf[1] = (fat_time >> 24) & 0xFF;
163 buf[2] = (fat_time >> 32) & 0xFF;
164 buf[3] = (fat_time >> 40) & 0xFF;
165
166 /* Set the alarm */
167 for (i = 0; i < 4; i++) {
168 err = ab3100_set_register_interruptible(ab3100_data,
169 regs[i], buf[i]);
170 if (err)
171 return err;
172 }
173 /* Then enable the alarm */
174 return ab3100_mask_and_set_register_interruptible(ab3100_data,
175 AB3100_RTC, ~(1 << 2),
176 alarm->enabled << 2);
177}
178
179static int ab3100_rtc_irq_enable(struct device *dev, unsigned int enabled)
180{
181 struct ab3100 *ab3100_data = dev_get_drvdata(dev);
182
183 /*
184 * It's not possible to enable/disable the alarm IRQ for this RTC.
185 * It does not actually trigger any IRQ: instead its only function is
186 * to power up the system, if it wasn't on. This will manifest as
187 * a "power up cause" in the AB3100 power driver (battery charging etc)
188 * and need to be handled there instead.
189 */
190 if (enabled)
191 return ab3100_mask_and_set_register_interruptible(ab3100_data,
192 AB3100_RTC, ~(1 << 2),
193 1 << 2);
194 else
195 return ab3100_mask_and_set_register_interruptible(ab3100_data,
196 AB3100_RTC, ~(1 << 2),
197 0);
198}
199
200static const struct rtc_class_ops ab3100_rtc_ops = {
201 .read_time = ab3100_rtc_read_time,
202 .set_mmss = ab3100_rtc_set_mmss,
203 .read_alarm = ab3100_rtc_read_alarm,
204 .set_alarm = ab3100_rtc_set_alarm,
205 .alarm_irq_enable = ab3100_rtc_irq_enable,
206};
207
208static int __init ab3100_rtc_probe(struct platform_device *pdev)
209{
210 int err;
211 u8 regval;
212 struct rtc_device *rtc;
213 struct ab3100 *ab3100_data = platform_get_drvdata(pdev);
214
215 /* The first RTC register needs special treatment */
216 err = ab3100_get_register_interruptible(ab3100_data,
217 AB3100_RTC, &regval);
218 if (err) {
219 dev_err(&pdev->dev, "unable to read RTC register\n");
220 return -ENODEV;
221 }
222
223 if ((regval & 0xFE) != RTC_SETTING) {
224 dev_warn(&pdev->dev, "not default value in RTC reg 0x%x\n",
225 regval);
226 }
227
228 if ((regval & 1) == 0) {
229 /*
230 * Set bit to detect power loss.
231 * This bit remains until RTC power is lost.
232 */
233 regval = 1 | RTC_SETTING;
234 err = ab3100_set_register_interruptible(ab3100_data,
235 AB3100_RTC, regval);
236 /* Ignore any error on this write */
237 }
238
239 rtc = rtc_device_register("ab3100-rtc", &pdev->dev, &ab3100_rtc_ops,
240 THIS_MODULE);
241 if (IS_ERR(rtc)) {
242 err = PTR_ERR(rtc);
243 return err;
244 }
245
246 return 0;
247}
248
249static int __exit ab3100_rtc_remove(struct platform_device *pdev)
250{
251 struct rtc_device *rtc = platform_get_drvdata(pdev);
252
253 rtc_device_unregister(rtc);
254 return 0;
255}
256
257static struct platform_driver ab3100_rtc_driver = {
258 .driver = {
259 .name = "ab3100-rtc",
260 .owner = THIS_MODULE,
261 },
262 .remove = __exit_p(ab3100_rtc_remove),
263};
264
265static int __init ab3100_rtc_init(void)
266{
267 return platform_driver_probe(&ab3100_rtc_driver,
268 ab3100_rtc_probe);
269}
270
271static void __exit ab3100_rtc_exit(void)
272{
273 platform_driver_unregister(&ab3100_rtc_driver);
274}
275
276module_init(ab3100_rtc_init);
277module_exit(ab3100_rtc_exit);
278
279MODULE_AUTHOR("Linus Walleij <linus.walleij@stericsson.com>");
280MODULE_DESCRIPTION("AB3100 RTC Driver");
281MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/rtc-ds1302.c b/drivers/rtc/rtc-ds1302.c
index 184556620778..d490628b64da 100644
--- a/drivers/rtc/rtc-ds1302.c
+++ b/drivers/rtc/rtc-ds1302.c
@@ -1,26 +1,25 @@
1/* 1/*
2 * Dallas DS1302 RTC Support 2 * Dallas DS1302 RTC Support
3 * 3 *
4 * Copyright (C) 2002 David McCullough 4 * Copyright (C) 2002 David McCullough
5 * Copyright (C) 2003 - 2007 Paul Mundt 5 * Copyright (C) 2003 - 2007 Paul Mundt
6 * 6 *
7 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
8 * License version 2. See the file "COPYING" in the main directory of 8 * License version 2. See the file "COPYING" in the main directory of
9 * this archive for more details. 9 * this archive for more details.
10 */ 10 */
11
11#include <linux/init.h> 12#include <linux/init.h>
12#include <linux/module.h> 13#include <linux/module.h>
13#include <linux/kernel.h> 14#include <linux/kernel.h>
14#include <linux/platform_device.h> 15#include <linux/platform_device.h>
15#include <linux/time.h>
16#include <linux/rtc.h> 16#include <linux/rtc.h>
17#include <linux/spinlock.h>
18#include <linux/io.h> 17#include <linux/io.h>
19#include <linux/bcd.h> 18#include <linux/bcd.h>
20#include <asm/rtc.h> 19#include <asm/rtc.h>
21 20
22#define DRV_NAME "rtc-ds1302" 21#define DRV_NAME "rtc-ds1302"
23#define DRV_VERSION "0.1.0" 22#define DRV_VERSION "0.1.1"
24 23
25#define RTC_CMD_READ 0x81 /* Read command */ 24#define RTC_CMD_READ 0x81 /* Read command */
26#define RTC_CMD_WRITE 0x80 /* Write command */ 25#define RTC_CMD_WRITE 0x80 /* Write command */
@@ -47,11 +46,6 @@
47#error "Add support for your platform" 46#error "Add support for your platform"
48#endif 47#endif
49 48
50struct ds1302_rtc {
51 struct rtc_device *rtc_dev;
52 spinlock_t lock;
53};
54
55static void ds1302_sendbits(unsigned int val) 49static void ds1302_sendbits(unsigned int val)
56{ 50{
57 int i; 51 int i;
@@ -103,10 +97,6 @@ static void ds1302_writebyte(unsigned int addr, unsigned int val)
103 97
104static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm) 98static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm)
105{ 99{
106 struct ds1302_rtc *rtc = dev_get_drvdata(dev);
107
108 spin_lock_irq(&rtc->lock);
109
110 tm->tm_sec = bcd2bin(ds1302_readbyte(RTC_ADDR_SEC)); 100 tm->tm_sec = bcd2bin(ds1302_readbyte(RTC_ADDR_SEC));
111 tm->tm_min = bcd2bin(ds1302_readbyte(RTC_ADDR_MIN)); 101 tm->tm_min = bcd2bin(ds1302_readbyte(RTC_ADDR_MIN));
112 tm->tm_hour = bcd2bin(ds1302_readbyte(RTC_ADDR_HOUR)); 102 tm->tm_hour = bcd2bin(ds1302_readbyte(RTC_ADDR_HOUR));
@@ -118,26 +108,17 @@ static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm)
118 if (tm->tm_year < 70) 108 if (tm->tm_year < 70)
119 tm->tm_year += 100; 109 tm->tm_year += 100;
120 110
121 spin_unlock_irq(&rtc->lock);
122
123 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " 111 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
124 "mday=%d, mon=%d, year=%d, wday=%d\n", 112 "mday=%d, mon=%d, year=%d, wday=%d\n",
125 __func__, 113 __func__,
126 tm->tm_sec, tm->tm_min, tm->tm_hour, 114 tm->tm_sec, tm->tm_min, tm->tm_hour,
127 tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday); 115 tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
128 116
129 if (rtc_valid_tm(tm) < 0) 117 return rtc_valid_tm(tm);
130 dev_err(dev, "invalid date\n");
131
132 return 0;
133} 118}
134 119
135static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm) 120static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm)
136{ 121{
137 struct ds1302_rtc *rtc = dev_get_drvdata(dev);
138
139 spin_lock_irq(&rtc->lock);
140
141 /* Stop RTC */ 122 /* Stop RTC */
142 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80); 123 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
143 124
@@ -152,8 +133,6 @@ static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm)
152 /* Start RTC */ 133 /* Start RTC */
153 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80); 134 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80);
154 135
155 spin_unlock_irq(&rtc->lock);
156
157 return 0; 136 return 0;
158} 137}
159 138
@@ -170,9 +149,7 @@ static int ds1302_rtc_ioctl(struct device *dev, unsigned int cmd,
170 if (copy_from_user(&tcs_val, (int __user *)arg, sizeof(int))) 149 if (copy_from_user(&tcs_val, (int __user *)arg, sizeof(int)))
171 return -EFAULT; 150 return -EFAULT;
172 151
173 spin_lock_irq(&rtc->lock);
174 ds1302_writebyte(RTC_ADDR_TCR, (0xa0 | tcs_val * 0xf)); 152 ds1302_writebyte(RTC_ADDR_TCR, (0xa0 | tcs_val * 0xf));
175 spin_unlock_irq(&rtc->lock);
176 return 0; 153 return 0;
177 } 154 }
178#endif 155#endif
@@ -187,10 +164,9 @@ static struct rtc_class_ops ds1302_rtc_ops = {
187 .ioctl = ds1302_rtc_ioctl, 164 .ioctl = ds1302_rtc_ioctl,
188}; 165};
189 166
190static int __devinit ds1302_rtc_probe(struct platform_device *pdev) 167static int __init ds1302_rtc_probe(struct platform_device *pdev)
191{ 168{
192 struct ds1302_rtc *rtc; 169 struct rtc_device *rtc;
193 int ret;
194 170
195 /* Reset */ 171 /* Reset */
196 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); 172 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
@@ -200,37 +176,23 @@ static int __devinit ds1302_rtc_probe(struct platform_device *pdev)
200 if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42) 176 if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42)
201 return -ENODEV; 177 return -ENODEV;
202 178
203 rtc = kzalloc(sizeof(struct ds1302_rtc), GFP_KERNEL); 179 rtc = rtc_device_register("ds1302", &pdev->dev,
204 if (unlikely(!rtc))
205 return -ENOMEM;
206
207 spin_lock_init(&rtc->lock);
208 rtc->rtc_dev = rtc_device_register("ds1302", &pdev->dev,
209 &ds1302_rtc_ops, THIS_MODULE); 180 &ds1302_rtc_ops, THIS_MODULE);
210 if (IS_ERR(rtc->rtc_dev)) { 181 if (IS_ERR(rtc))
211 ret = PTR_ERR(rtc->rtc_dev); 182 return PTR_ERR(rtc);
212 goto out;
213 }
214 183
215 platform_set_drvdata(pdev, rtc); 184 platform_set_drvdata(pdev, rtc);
216 185
217 return 0; 186 return 0;
218out:
219 kfree(rtc);
220 return ret;
221} 187}
222 188
223static int __devexit ds1302_rtc_remove(struct platform_device *pdev) 189static int __devexit ds1302_rtc_remove(struct platform_device *pdev)
224{ 190{
225 struct ds1302_rtc *rtc = platform_get_drvdata(pdev); 191 struct rtc_device *rtc = platform_get_drvdata(pdev);
226
227 if (likely(rtc->rtc_dev))
228 rtc_device_unregister(rtc->rtc_dev);
229 192
193 rtc_device_unregister(rtc);
230 platform_set_drvdata(pdev, NULL); 194 platform_set_drvdata(pdev, NULL);
231 195
232 kfree(rtc);
233
234 return 0; 196 return 0;
235} 197}
236 198
@@ -239,13 +201,12 @@ static struct platform_driver ds1302_platform_driver = {
239 .name = DRV_NAME, 201 .name = DRV_NAME,
240 .owner = THIS_MODULE, 202 .owner = THIS_MODULE,
241 }, 203 },
242 .probe = ds1302_rtc_probe, 204 .remove = __exit_p(ds1302_rtc_remove),
243 .remove = __devexit_p(ds1302_rtc_remove),
244}; 205};
245 206
246static int __init ds1302_rtc_init(void) 207static int __init ds1302_rtc_init(void)
247{ 208{
248 return platform_driver_register(&ds1302_platform_driver); 209 return platform_driver_probe(&ds1302_platform_driver, ds1302_rtc_probe);
249} 210}
250 211
251static void __exit ds1302_rtc_exit(void) 212static void __exit ds1302_rtc_exit(void)
diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c
index d7310adb7152..e6ed5404bca0 100644
--- a/drivers/rtc/rtc-sh.c
+++ b/drivers/rtc/rtc-sh.c
@@ -29,7 +29,7 @@
29#include <asm/rtc.h> 29#include <asm/rtc.h>
30 30
31#define DRV_NAME "sh-rtc" 31#define DRV_NAME "sh-rtc"
32#define DRV_VERSION "0.2.2" 32#define DRV_VERSION "0.2.3"
33 33
34#define RTC_REG(r) ((r) * rtc_reg_size) 34#define RTC_REG(r) ((r) * rtc_reg_size)
35 35
@@ -215,7 +215,7 @@ static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
215 return IRQ_RETVAL(ret); 215 return IRQ_RETVAL(ret);
216} 216}
217 217
218static inline void sh_rtc_setpie(struct device *dev, unsigned int enable) 218static int sh_rtc_irq_set_state(struct device *dev, int enable)
219{ 219{
220 struct sh_rtc *rtc = dev_get_drvdata(dev); 220 struct sh_rtc *rtc = dev_get_drvdata(dev);
221 unsigned int tmp; 221 unsigned int tmp;
@@ -225,17 +225,22 @@ static inline void sh_rtc_setpie(struct device *dev, unsigned int enable)
225 tmp = readb(rtc->regbase + RCR2); 225 tmp = readb(rtc->regbase + RCR2);
226 226
227 if (enable) { 227 if (enable) {
228 rtc->periodic_freq |= PF_KOU;
228 tmp &= ~RCR2_PEF; /* Clear PES bit */ 229 tmp &= ~RCR2_PEF; /* Clear PES bit */
229 tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */ 230 tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
230 } else 231 } else {
232 rtc->periodic_freq &= ~PF_KOU;
231 tmp &= ~(RCR2_PESMASK | RCR2_PEF); 233 tmp &= ~(RCR2_PESMASK | RCR2_PEF);
234 }
232 235
233 writeb(tmp, rtc->regbase + RCR2); 236 writeb(tmp, rtc->regbase + RCR2);
234 237
235 spin_unlock_irq(&rtc->lock); 238 spin_unlock_irq(&rtc->lock);
239
240 return 0;
236} 241}
237 242
238static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq) 243static int sh_rtc_irq_set_freq(struct device *dev, int freq)
239{ 244{
240 struct sh_rtc *rtc = dev_get_drvdata(dev); 245 struct sh_rtc *rtc = dev_get_drvdata(dev);
241 int tmp, ret = 0; 246 int tmp, ret = 0;
@@ -278,10 +283,8 @@ static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq)
278 ret = -ENOTSUPP; 283 ret = -ENOTSUPP;
279 } 284 }
280 285
281 if (ret == 0) { 286 if (ret == 0)
282 rtc->periodic_freq |= tmp; 287 rtc->periodic_freq |= tmp;
283 rtc->rtc_dev->irq_freq = freq;
284 }
285 288
286 spin_unlock_irq(&rtc->lock); 289 spin_unlock_irq(&rtc->lock);
287 return ret; 290 return ret;
@@ -346,10 +349,6 @@ static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
346 unsigned int ret = 0; 349 unsigned int ret = 0;
347 350
348 switch (cmd) { 351 switch (cmd) {
349 case RTC_PIE_OFF:
350 case RTC_PIE_ON:
351 sh_rtc_setpie(dev, cmd == RTC_PIE_ON);
352 break;
353 case RTC_AIE_OFF: 352 case RTC_AIE_OFF:
354 case RTC_AIE_ON: 353 case RTC_AIE_ON:
355 sh_rtc_setaie(dev, cmd == RTC_AIE_ON); 354 sh_rtc_setaie(dev, cmd == RTC_AIE_ON);
@@ -362,13 +361,6 @@ static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
362 rtc->periodic_freq |= PF_OXS; 361 rtc->periodic_freq |= PF_OXS;
363 sh_rtc_setcie(dev, 1); 362 sh_rtc_setcie(dev, 1);
364 break; 363 break;
365 case RTC_IRQP_READ:
366 ret = put_user(rtc->rtc_dev->irq_freq,
367 (unsigned long __user *)arg);
368 break;
369 case RTC_IRQP_SET:
370 ret = sh_rtc_setfreq(dev, arg);
371 break;
372 default: 364 default:
373 ret = -ENOIOCTLCMD; 365 ret = -ENOIOCTLCMD;
374 } 366 }
@@ -602,28 +594,6 @@ static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
602 return 0; 594 return 0;
603} 595}
604 596
605static int sh_rtc_irq_set_state(struct device *dev, int enabled)
606{
607 struct platform_device *pdev = to_platform_device(dev);
608 struct sh_rtc *rtc = platform_get_drvdata(pdev);
609
610 if (enabled) {
611 rtc->periodic_freq |= PF_KOU;
612 return sh_rtc_ioctl(dev, RTC_PIE_ON, 0);
613 } else {
614 rtc->periodic_freq &= ~PF_KOU;
615 return sh_rtc_ioctl(dev, RTC_PIE_OFF, 0);
616 }
617}
618
619static int sh_rtc_irq_set_freq(struct device *dev, int freq)
620{
621 if (!is_power_of_2(freq))
622 return -EINVAL;
623
624 return sh_rtc_ioctl(dev, RTC_IRQP_SET, freq);
625}
626
627static struct rtc_class_ops sh_rtc_ops = { 597static struct rtc_class_ops sh_rtc_ops = {
628 .ioctl = sh_rtc_ioctl, 598 .ioctl = sh_rtc_ioctl,
629 .read_time = sh_rtc_read_time, 599 .read_time = sh_rtc_read_time,
@@ -635,7 +605,7 @@ static struct rtc_class_ops sh_rtc_ops = {
635 .proc = sh_rtc_proc, 605 .proc = sh_rtc_proc,
636}; 606};
637 607
638static int __devinit sh_rtc_probe(struct platform_device *pdev) 608static int __init sh_rtc_probe(struct platform_device *pdev)
639{ 609{
640 struct sh_rtc *rtc; 610 struct sh_rtc *rtc;
641 struct resource *res; 611 struct resource *res;
@@ -702,13 +672,6 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
702 672
703 clk_enable(rtc->clk); 673 clk_enable(rtc->clk);
704 674
705 rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
706 &sh_rtc_ops, THIS_MODULE);
707 if (IS_ERR(rtc->rtc_dev)) {
708 ret = PTR_ERR(rtc->rtc_dev);
709 goto err_unmap;
710 }
711
712 rtc->capabilities = RTC_DEF_CAPABILITIES; 675 rtc->capabilities = RTC_DEF_CAPABILITIES;
713 if (pdev->dev.platform_data) { 676 if (pdev->dev.platform_data) {
714 struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data; 677 struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data;
@@ -720,10 +683,6 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
720 rtc->capabilities |= pinfo->capabilities; 683 rtc->capabilities |= pinfo->capabilities;
721 } 684 }
722 685
723 rtc->rtc_dev->max_user_freq = 256;
724
725 platform_set_drvdata(pdev, rtc);
726
727 if (rtc->carry_irq <= 0) { 686 if (rtc->carry_irq <= 0) {
728 /* register shared periodic/carry/alarm irq */ 687 /* register shared periodic/carry/alarm irq */
729 ret = request_irq(rtc->periodic_irq, sh_rtc_shared, 688 ret = request_irq(rtc->periodic_irq, sh_rtc_shared,
@@ -767,13 +726,26 @@ static int __devinit sh_rtc_probe(struct platform_device *pdev)
767 } 726 }
768 } 727 }
769 728
729 platform_set_drvdata(pdev, rtc);
730
770 /* everything disabled by default */ 731 /* everything disabled by default */
771 rtc->periodic_freq = 0; 732 sh_rtc_irq_set_freq(&pdev->dev, 0);
772 rtc->rtc_dev->irq_freq = 0; 733 sh_rtc_irq_set_state(&pdev->dev, 0);
773 sh_rtc_setpie(&pdev->dev, 0);
774 sh_rtc_setaie(&pdev->dev, 0); 734 sh_rtc_setaie(&pdev->dev, 0);
775 sh_rtc_setcie(&pdev->dev, 0); 735 sh_rtc_setcie(&pdev->dev, 0);
776 736
737 rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
738 &sh_rtc_ops, THIS_MODULE);
739 if (IS_ERR(rtc->rtc_dev)) {
740 ret = PTR_ERR(rtc->rtc_dev);
741 free_irq(rtc->periodic_irq, rtc);
742 free_irq(rtc->carry_irq, rtc);
743 free_irq(rtc->alarm_irq, rtc);
744 goto err_unmap;
745 }
746
747 rtc->rtc_dev->max_user_freq = 256;
748
777 /* reset rtc to epoch 0 if time is invalid */ 749 /* reset rtc to epoch 0 if time is invalid */
778 if (rtc_read_time(rtc->rtc_dev, &r) < 0) { 750 if (rtc_read_time(rtc->rtc_dev, &r) < 0) {
779 rtc_time_to_tm(0, &r); 751 rtc_time_to_tm(0, &r);
@@ -795,14 +767,13 @@ err_badres:
795 return ret; 767 return ret;
796} 768}
797 769
798static int __devexit sh_rtc_remove(struct platform_device *pdev) 770static int __exit sh_rtc_remove(struct platform_device *pdev)
799{ 771{
800 struct sh_rtc *rtc = platform_get_drvdata(pdev); 772 struct sh_rtc *rtc = platform_get_drvdata(pdev);
801 773
802 if (likely(rtc->rtc_dev)) 774 rtc_device_unregister(rtc->rtc_dev);
803 rtc_device_unregister(rtc->rtc_dev); 775 sh_rtc_irq_set_state(&pdev->dev, 0);
804 776
805 sh_rtc_setpie(&pdev->dev, 0);
806 sh_rtc_setaie(&pdev->dev, 0); 777 sh_rtc_setaie(&pdev->dev, 0);
807 sh_rtc_setcie(&pdev->dev, 0); 778 sh_rtc_setcie(&pdev->dev, 0);
808 779
@@ -813,9 +784,8 @@ static int __devexit sh_rtc_remove(struct platform_device *pdev)
813 free_irq(rtc->alarm_irq, rtc); 784 free_irq(rtc->alarm_irq, rtc);
814 } 785 }
815 786
816 release_resource(rtc->res);
817
818 iounmap(rtc->regbase); 787 iounmap(rtc->regbase);
788 release_resource(rtc->res);
819 789
820 clk_disable(rtc->clk); 790 clk_disable(rtc->clk);
821 clk_put(rtc->clk); 791 clk_put(rtc->clk);
@@ -867,13 +837,12 @@ static struct platform_driver sh_rtc_platform_driver = {
867 .owner = THIS_MODULE, 837 .owner = THIS_MODULE,
868 .pm = &sh_rtc_dev_pm_ops, 838 .pm = &sh_rtc_dev_pm_ops,
869 }, 839 },
870 .probe = sh_rtc_probe, 840 .remove = __exit_p(sh_rtc_remove),
871 .remove = __devexit_p(sh_rtc_remove),
872}; 841};
873 842
874static int __init sh_rtc_init(void) 843static int __init sh_rtc_init(void)
875{ 844{
876 return platform_driver_register(&sh_rtc_platform_driver); 845 return platform_driver_probe(&sh_rtc_platform_driver, sh_rtc_probe);
877} 846}
878 847
879static void __exit sh_rtc_exit(void) 848static void __exit sh_rtc_exit(void)
diff --git a/drivers/rtc/rtc-wm831x.c b/drivers/rtc/rtc-wm831x.c
new file mode 100644
index 000000000000..79795cdf6ed8
--- /dev/null
+++ b/drivers/rtc/rtc-wm831x.c
@@ -0,0 +1,523 @@
1/*
2 * Real Time Clock driver for Wolfson Microelectronics WM831x
3 *
4 * Copyright (C) 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/module.h>
16#include <linux/kernel.h>
17#include <linux/time.h>
18#include <linux/rtc.h>
19#include <linux/bcd.h>
20#include <linux/interrupt.h>
21#include <linux/ioctl.h>
22#include <linux/completion.h>
23#include <linux/mfd/wm831x/core.h>
24#include <linux/delay.h>
25#include <linux/platform_device.h>
26
27
28/*
29 * R16416 (0x4020) - RTC Write Counter
30 */
31#define WM831X_RTC_WR_CNT_MASK 0xFFFF /* RTC_WR_CNT - [15:0] */
32#define WM831X_RTC_WR_CNT_SHIFT 0 /* RTC_WR_CNT - [15:0] */
33#define WM831X_RTC_WR_CNT_WIDTH 16 /* RTC_WR_CNT - [15:0] */
34
35/*
36 * R16417 (0x4021) - RTC Time 1
37 */
38#define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */
39#define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */
40#define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */
41
42/*
43 * R16418 (0x4022) - RTC Time 2
44 */
45#define WM831X_RTC_TIME_MASK 0xFFFF /* RTC_TIME - [15:0] */
46#define WM831X_RTC_TIME_SHIFT 0 /* RTC_TIME - [15:0] */
47#define WM831X_RTC_TIME_WIDTH 16 /* RTC_TIME - [15:0] */
48
49/*
50 * R16419 (0x4023) - RTC Alarm 1
51 */
52#define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */
53#define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */
54#define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */
55
56/*
57 * R16420 (0x4024) - RTC Alarm 2
58 */
59#define WM831X_RTC_ALM_MASK 0xFFFF /* RTC_ALM - [15:0] */
60#define WM831X_RTC_ALM_SHIFT 0 /* RTC_ALM - [15:0] */
61#define WM831X_RTC_ALM_WIDTH 16 /* RTC_ALM - [15:0] */
62
63/*
64 * R16421 (0x4025) - RTC Control
65 */
66#define WM831X_RTC_VALID 0x8000 /* RTC_VALID */
67#define WM831X_RTC_VALID_MASK 0x8000 /* RTC_VALID */
68#define WM831X_RTC_VALID_SHIFT 15 /* RTC_VALID */
69#define WM831X_RTC_VALID_WIDTH 1 /* RTC_VALID */
70#define WM831X_RTC_SYNC_BUSY 0x4000 /* RTC_SYNC_BUSY */
71#define WM831X_RTC_SYNC_BUSY_MASK 0x4000 /* RTC_SYNC_BUSY */
72#define WM831X_RTC_SYNC_BUSY_SHIFT 14 /* RTC_SYNC_BUSY */
73#define WM831X_RTC_SYNC_BUSY_WIDTH 1 /* RTC_SYNC_BUSY */
74#define WM831X_RTC_ALM_ENA 0x0400 /* RTC_ALM_ENA */
75#define WM831X_RTC_ALM_ENA_MASK 0x0400 /* RTC_ALM_ENA */
76#define WM831X_RTC_ALM_ENA_SHIFT 10 /* RTC_ALM_ENA */
77#define WM831X_RTC_ALM_ENA_WIDTH 1 /* RTC_ALM_ENA */
78#define WM831X_RTC_PINT_FREQ_MASK 0x0070 /* RTC_PINT_FREQ - [6:4] */
79#define WM831X_RTC_PINT_FREQ_SHIFT 4 /* RTC_PINT_FREQ - [6:4] */
80#define WM831X_RTC_PINT_FREQ_WIDTH 3 /* RTC_PINT_FREQ - [6:4] */
81
82/*
83 * R16422 (0x4026) - RTC Trim
84 */
85#define WM831X_RTC_TRIM_MASK 0x03FF /* RTC_TRIM - [9:0] */
86#define WM831X_RTC_TRIM_SHIFT 0 /* RTC_TRIM - [9:0] */
87#define WM831X_RTC_TRIM_WIDTH 10 /* RTC_TRIM - [9:0] */
88
89#define WM831X_SET_TIME_RETRIES 5
90#define WM831X_GET_TIME_RETRIES 5
91
92struct wm831x_rtc {
93 struct wm831x *wm831x;
94 struct rtc_device *rtc;
95 unsigned int alarm_enabled:1;
96};
97
98/*
99 * Read current time and date in RTC
100 */
101static int wm831x_rtc_readtime(struct device *dev, struct rtc_time *tm)
102{
103 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
104 struct wm831x *wm831x = wm831x_rtc->wm831x;
105 u16 time1[2], time2[2];
106 int ret;
107 int count = 0;
108
109 /* Has the RTC been programmed? */
110 ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
111 if (ret < 0) {
112 dev_err(dev, "Failed to read RTC control: %d\n", ret);
113 return ret;
114 }
115 if (!(ret & WM831X_RTC_VALID)) {
116 dev_dbg(dev, "RTC not yet configured\n");
117 return -EINVAL;
118 }
119
120 /* Read twice to make sure we don't read a corrupt, partially
121 * incremented, value.
122 */
123 do {
124 ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
125 2, time1);
126 if (ret != 0)
127 continue;
128
129 ret = wm831x_bulk_read(wm831x, WM831X_RTC_TIME_1,
130 2, time2);
131 if (ret != 0)
132 continue;
133
134 if (memcmp(time1, time2, sizeof(time1)) == 0) {
135 u32 time = (time1[0] << 16) | time1[1];
136
137 rtc_time_to_tm(time, tm);
138 return rtc_valid_tm(tm);
139 }
140
141 } while (++count < WM831X_GET_TIME_RETRIES);
142
143 dev_err(dev, "Timed out reading current time\n");
144
145 return -EIO;
146}
147
148/*
149 * Set current time and date in RTC
150 */
151static int wm831x_rtc_set_mmss(struct device *dev, unsigned long time)
152{
153 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
154 struct wm831x *wm831x = wm831x_rtc->wm831x;
155 struct rtc_time new_tm;
156 unsigned long new_time;
157 int ret;
158 int count = 0;
159
160 ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_1,
161 (time >> 16) & 0xffff);
162 if (ret < 0) {
163 dev_err(dev, "Failed to write TIME_1: %d\n", ret);
164 return ret;
165 }
166
167 ret = wm831x_reg_write(wm831x, WM831X_RTC_TIME_2, time & 0xffff);
168 if (ret < 0) {
169 dev_err(dev, "Failed to write TIME_2: %d\n", ret);
170 return ret;
171 }
172
173 /* Wait for the update to complete - should happen first time
174 * round but be conservative.
175 */
176 do {
177 msleep(1);
178
179 ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
180 if (ret < 0)
181 ret = WM831X_RTC_SYNC_BUSY;
182 } while (!(ret & WM831X_RTC_SYNC_BUSY) &&
183 ++count < WM831X_SET_TIME_RETRIES);
184
185 if (ret & WM831X_RTC_SYNC_BUSY) {
186 dev_err(dev, "Timed out writing RTC update\n");
187 return -EIO;
188 }
189
190 /* Check that the update was accepted; security features may
191 * have caused the update to be ignored.
192 */
193 ret = wm831x_rtc_readtime(dev, &new_tm);
194 if (ret < 0)
195 return ret;
196
197 ret = rtc_tm_to_time(&new_tm, &new_time);
198 if (ret < 0) {
199 dev_err(dev, "Failed to convert time: %d\n", ret);
200 return ret;
201 }
202
203 /* Allow a second of change in case of tick */
204 if (new_time - time > 1) {
205 dev_err(dev, "RTC update not permitted by hardware\n");
206 return -EPERM;
207 }
208
209 return 0;
210}
211
212/*
213 * Read alarm time and date in RTC
214 */
215static int wm831x_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
216{
217 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
218 int ret;
219 u16 data[2];
220 u32 time;
221
222 ret = wm831x_bulk_read(wm831x_rtc->wm831x, WM831X_RTC_ALARM_1,
223 2, data);
224 if (ret != 0) {
225 dev_err(dev, "Failed to read alarm time: %d\n", ret);
226 return ret;
227 }
228
229 time = (data[0] << 16) | data[1];
230
231 rtc_time_to_tm(time, &alrm->time);
232
233 ret = wm831x_reg_read(wm831x_rtc->wm831x, WM831X_RTC_CONTROL);
234 if (ret < 0) {
235 dev_err(dev, "Failed to read RTC control: %d\n", ret);
236 return ret;
237 }
238
239 if (ret & WM831X_RTC_ALM_ENA)
240 alrm->enabled = 1;
241 else
242 alrm->enabled = 0;
243
244 return 0;
245}
246
247static int wm831x_rtc_stop_alarm(struct wm831x_rtc *wm831x_rtc)
248{
249 wm831x_rtc->alarm_enabled = 0;
250
251 return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
252 WM831X_RTC_ALM_ENA, 0);
253}
254
255static int wm831x_rtc_start_alarm(struct wm831x_rtc *wm831x_rtc)
256{
257 wm831x_rtc->alarm_enabled = 1;
258
259 return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
260 WM831X_RTC_ALM_ENA, WM831X_RTC_ALM_ENA);
261}
262
263static int wm831x_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
264{
265 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
266 struct wm831x *wm831x = wm831x_rtc->wm831x;
267 int ret;
268 unsigned long time;
269
270 ret = rtc_tm_to_time(&alrm->time, &time);
271 if (ret < 0) {
272 dev_err(dev, "Failed to convert time: %d\n", ret);
273 return ret;
274 }
275
276 ret = wm831x_rtc_stop_alarm(wm831x_rtc);
277 if (ret < 0) {
278 dev_err(dev, "Failed to stop alarm: %d\n", ret);
279 return ret;
280 }
281
282 ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_1,
283 (time >> 16) & 0xffff);
284 if (ret < 0) {
285 dev_err(dev, "Failed to write ALARM_1: %d\n", ret);
286 return ret;
287 }
288
289 ret = wm831x_reg_write(wm831x, WM831X_RTC_ALARM_2, time & 0xffff);
290 if (ret < 0) {
291 dev_err(dev, "Failed to write ALARM_2: %d\n", ret);
292 return ret;
293 }
294
295 if (alrm->enabled) {
296 ret = wm831x_rtc_start_alarm(wm831x_rtc);
297 if (ret < 0) {
298 dev_err(dev, "Failed to start alarm: %d\n", ret);
299 return ret;
300 }
301 }
302
303 return 0;
304}
305
306static int wm831x_rtc_alarm_irq_enable(struct device *dev,
307 unsigned int enabled)
308{
309 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
310
311 if (enabled)
312 return wm831x_rtc_start_alarm(wm831x_rtc);
313 else
314 return wm831x_rtc_stop_alarm(wm831x_rtc);
315}
316
317static int wm831x_rtc_update_irq_enable(struct device *dev,
318 unsigned int enabled)
319{
320 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(dev);
321 int val;
322
323 if (enabled)
324 val = 1 << WM831X_RTC_PINT_FREQ_SHIFT;
325 else
326 val = 0;
327
328 return wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
329 WM831X_RTC_PINT_FREQ_MASK, val);
330}
331
332static irqreturn_t wm831x_alm_irq(int irq, void *data)
333{
334 struct wm831x_rtc *wm831x_rtc = data;
335
336 rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_AF);
337
338 return IRQ_HANDLED;
339}
340
341static irqreturn_t wm831x_per_irq(int irq, void *data)
342{
343 struct wm831x_rtc *wm831x_rtc = data;
344
345 rtc_update_irq(wm831x_rtc->rtc, 1, RTC_IRQF | RTC_UF);
346
347 return IRQ_HANDLED;
348}
349
350static const struct rtc_class_ops wm831x_rtc_ops = {
351 .read_time = wm831x_rtc_readtime,
352 .set_mmss = wm831x_rtc_set_mmss,
353 .read_alarm = wm831x_rtc_readalarm,
354 .set_alarm = wm831x_rtc_setalarm,
355 .alarm_irq_enable = wm831x_rtc_alarm_irq_enable,
356 .update_irq_enable = wm831x_rtc_update_irq_enable,
357};
358
359#ifdef CONFIG_PM
360/* Turn off the alarm if it should not be a wake source. */
361static int wm831x_rtc_suspend(struct device *dev)
362{
363 struct platform_device *pdev = to_platform_device(dev);
364 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev);
365 int ret, enable;
366
367 if (wm831x_rtc->alarm_enabled && device_may_wakeup(&pdev->dev))
368 enable = WM831X_RTC_ALM_ENA;
369 else
370 enable = 0;
371
372 ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
373 WM831X_RTC_ALM_ENA, enable);
374 if (ret != 0)
375 dev_err(&pdev->dev, "Failed to update RTC alarm: %d\n", ret);
376
377 return 0;
378}
379
380/* Enable the alarm if it should be enabled (in case it was disabled to
381 * prevent use as a wake source).
382 */
383static int wm831x_rtc_resume(struct device *dev)
384{
385 struct platform_device *pdev = to_platform_device(dev);
386 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev);
387 int ret;
388
389 if (wm831x_rtc->alarm_enabled) {
390 ret = wm831x_rtc_start_alarm(wm831x_rtc);
391 if (ret != 0)
392 dev_err(&pdev->dev,
393 "Failed to restart RTC alarm: %d\n", ret);
394 }
395
396 return 0;
397}
398
399/* Unconditionally disable the alarm */
400static int wm831x_rtc_freeze(struct device *dev)
401{
402 struct platform_device *pdev = to_platform_device(dev);
403 struct wm831x_rtc *wm831x_rtc = dev_get_drvdata(&pdev->dev);
404 int ret;
405
406 ret = wm831x_set_bits(wm831x_rtc->wm831x, WM831X_RTC_CONTROL,
407 WM831X_RTC_ALM_ENA, 0);
408 if (ret != 0)
409 dev_err(&pdev->dev, "Failed to stop RTC alarm: %d\n", ret);
410
411 return 0;
412}
413#else
414#define wm831x_rtc_suspend NULL
415#define wm831x_rtc_resume NULL
416#define wm831x_rtc_freeze NULL
417#endif
418
419static int wm831x_rtc_probe(struct platform_device *pdev)
420{
421 struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
422 struct wm831x_rtc *wm831x_rtc;
423 int per_irq = platform_get_irq_byname(pdev, "PER");
424 int alm_irq = platform_get_irq_byname(pdev, "ALM");
425 int ret = 0;
426
427 wm831x_rtc = kzalloc(sizeof(*wm831x_rtc), GFP_KERNEL);
428 if (wm831x_rtc == NULL)
429 return -ENOMEM;
430
431 platform_set_drvdata(pdev, wm831x_rtc);
432 wm831x_rtc->wm831x = wm831x;
433
434 ret = wm831x_reg_read(wm831x, WM831X_RTC_CONTROL);
435 if (ret < 0) {
436 dev_err(&pdev->dev, "Failed to read RTC control: %d\n", ret);
437 goto err;
438 }
439 if (ret & WM831X_RTC_ALM_ENA)
440 wm831x_rtc->alarm_enabled = 1;
441
442 device_init_wakeup(&pdev->dev, 1);
443
444 wm831x_rtc->rtc = rtc_device_register("wm831x", &pdev->dev,
445 &wm831x_rtc_ops, THIS_MODULE);
446 if (IS_ERR(wm831x_rtc->rtc)) {
447 ret = PTR_ERR(wm831x_rtc->rtc);
448 goto err;
449 }
450
451 ret = wm831x_request_irq(wm831x, per_irq, wm831x_per_irq,
452 IRQF_TRIGGER_RISING, "wm831x_rtc_per",
453 wm831x_rtc);
454 if (ret != 0) {
455 dev_err(&pdev->dev, "Failed to request periodic IRQ %d: %d\n",
456 per_irq, ret);
457 }
458
459 ret = wm831x_request_irq(wm831x, alm_irq, wm831x_alm_irq,
460 IRQF_TRIGGER_RISING, "wm831x_rtc_alm",
461 wm831x_rtc);
462 if (ret != 0) {
463 dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
464 alm_irq, ret);
465 }
466
467 return 0;
468
469err:
470 kfree(wm831x_rtc);
471 return ret;
472}
473
474static int __devexit wm831x_rtc_remove(struct platform_device *pdev)
475{
476 struct wm831x_rtc *wm831x_rtc = platform_get_drvdata(pdev);
477 int per_irq = platform_get_irq_byname(pdev, "PER");
478 int alm_irq = platform_get_irq_byname(pdev, "ALM");
479
480 wm831x_free_irq(wm831x_rtc->wm831x, alm_irq, wm831x_rtc);
481 wm831x_free_irq(wm831x_rtc->wm831x, per_irq, wm831x_rtc);
482 rtc_device_unregister(wm831x_rtc->rtc);
483 kfree(wm831x_rtc);
484
485 return 0;
486}
487
488static struct dev_pm_ops wm831x_rtc_pm_ops = {
489 .suspend = wm831x_rtc_suspend,
490 .resume = wm831x_rtc_resume,
491
492 .freeze = wm831x_rtc_freeze,
493 .thaw = wm831x_rtc_resume,
494 .restore = wm831x_rtc_resume,
495
496 .poweroff = wm831x_rtc_suspend,
497};
498
499static struct platform_driver wm831x_rtc_driver = {
500 .probe = wm831x_rtc_probe,
501 .remove = __devexit_p(wm831x_rtc_remove),
502 .driver = {
503 .name = "wm831x-rtc",
504 .pm = &wm831x_rtc_pm_ops,
505 },
506};
507
508static int __init wm831x_rtc_init(void)
509{
510 return platform_driver_register(&wm831x_rtc_driver);
511}
512module_init(wm831x_rtc_init);
513
514static void __exit wm831x_rtc_exit(void)
515{
516 platform_driver_unregister(&wm831x_rtc_driver);
517}
518module_exit(wm831x_rtc_exit);
519
520MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
521MODULE_DESCRIPTION("RTC driver for the WM831x series PMICs");
522MODULE_LICENSE("GPL");
523MODULE_ALIAS("platform:wm831x-rtc");
diff --git a/drivers/serial/ioc4_serial.c b/drivers/serial/ioc4_serial.c
index 6bab63cd5b29..e5c58fe7e745 100644
--- a/drivers/serial/ioc4_serial.c
+++ b/drivers/serial/ioc4_serial.c
@@ -930,7 +930,7 @@ static void handle_dma_error_intr(void *arg, uint32_t other_ir)
930 930
931 if (readl(&port->ip_mem->pci_err_addr_l.raw) & IOC4_PCI_ERR_ADDR_VLD) { 931 if (readl(&port->ip_mem->pci_err_addr_l.raw) & IOC4_PCI_ERR_ADDR_VLD) {
932 printk(KERN_ERR 932 printk(KERN_ERR
933 "PCI error address is 0x%lx, " 933 "PCI error address is 0x%llx, "
934 "master is serial port %c %s\n", 934 "master is serial port %c %s\n",
935 (((uint64_t)readl(&port->ip_mem->pci_err_addr_h) 935 (((uint64_t)readl(&port->ip_mem->pci_err_addr_h)
936 << 32) 936 << 32)
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 8e2feb563347..32dc2fc50e6b 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -272,7 +272,8 @@ static inline void sci_init_pins(struct uart_port *port, unsigned int cflag)
272 __raw_writew(data, PSCR); 272 __raw_writew(data, PSCR);
273 } 273 }
274} 274}
275#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \ 275#elif defined(CONFIG_CPU_SUBTYPE_SH7757) || \
276 defined(CONFIG_CPU_SUBTYPE_SH7763) || \
276 defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 277 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
277 defined(CONFIG_CPU_SUBTYPE_SH7785) || \ 278 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
278 defined(CONFIG_CPU_SUBTYPE_SH7786) || \ 279 defined(CONFIG_CPU_SUBTYPE_SH7786) || \
@@ -662,10 +663,11 @@ static irqreturn_t sci_rx_interrupt(int irq, void *port)
662static irqreturn_t sci_tx_interrupt(int irq, void *ptr) 663static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
663{ 664{
664 struct uart_port *port = ptr; 665 struct uart_port *port = ptr;
666 unsigned long flags;
665 667
666 spin_lock_irq(&port->lock); 668 spin_lock_irqsave(&port->lock, flags);
667 sci_transmit_chars(port); 669 sci_transmit_chars(port);
668 spin_unlock_irq(&port->lock); 670 spin_unlock_irqrestore(&port->lock, flags);
669 671
670 return IRQ_HANDLED; 672 return IRQ_HANDLED;
671} 673}
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index 38072c15b845..3e2fcf93b42e 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -112,6 +112,13 @@
112#elif defined(CONFIG_H8S2678) 112#elif defined(CONFIG_H8S2678)
113# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ 113# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
114# define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) 114# define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port)
115#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
116# define SCSPTR0 0xfe4b0020
117# define SCSPTR1 0xfe4b0020
118# define SCSPTR2 0xfe4b0020
119# define SCIF_ORER 0x0001
120# define SCSCR_INIT(port) 0x38
121# define SCIF_ONLY
115#elif defined(CONFIG_CPU_SUBTYPE_SH7763) 122#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
116# define SCSPTR0 0xffe00024 /* 16 bit SCIF */ 123# define SCSPTR0 0xffe00024 /* 16 bit SCIF */
117# define SCSPTR1 0xffe08024 /* 16 bit SCIF */ 124# define SCSPTR1 0xffe08024 /* 16 bit SCIF */
@@ -562,6 +569,16 @@ static inline int sci_rxd_in(struct uart_port *port)
562 return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */ 569 return ctrl_inw(SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
563 return 1; 570 return 1;
564} 571}
572#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
573static inline int sci_rxd_in(struct uart_port *port)
574{
575 if (port->mapbase == 0xfe4b0000)
576 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0;
577 if (port->mapbase == 0xfe4c0000)
578 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0;
579 if (port->mapbase == 0xfe4d0000)
580 return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0;
581}
565#elif defined(CONFIG_CPU_SUBTYPE_SH7760) 582#elif defined(CONFIG_CPU_SUBTYPE_SH7760)
566static inline int sci_rxd_in(struct uart_port *port) 583static inline int sci_rxd_in(struct uart_port *port)
567{ 584{
diff --git a/drivers/sh/intc.c b/drivers/sh/intc.c
index 3dd231a643b5..559b5fe9dc0f 100644
--- a/drivers/sh/intc.c
+++ b/drivers/sh/intc.c
@@ -77,7 +77,7 @@ static unsigned long ack_handle[NR_IRQS];
77static inline struct intc_desc_int *get_intc_desc(unsigned int irq) 77static inline struct intc_desc_int *get_intc_desc(unsigned int irq)
78{ 78{
79 struct irq_chip *chip = get_irq_chip(irq); 79 struct irq_chip *chip = get_irq_chip(irq);
80 return (void *)((char *)chip - offsetof(struct intc_desc_int, chip)); 80 return container_of(chip, struct intc_desc_int, chip);
81} 81}
82 82
83static inline unsigned int set_field(unsigned int value, 83static inline unsigned int set_field(unsigned int value,
@@ -95,16 +95,19 @@ static inline unsigned int set_field(unsigned int value,
95static void write_8(unsigned long addr, unsigned long h, unsigned long data) 95static void write_8(unsigned long addr, unsigned long h, unsigned long data)
96{ 96{
97 __raw_writeb(set_field(0, data, h), addr); 97 __raw_writeb(set_field(0, data, h), addr);
98 (void)__raw_readb(addr); /* Defeat write posting */
98} 99}
99 100
100static void write_16(unsigned long addr, unsigned long h, unsigned long data) 101static void write_16(unsigned long addr, unsigned long h, unsigned long data)
101{ 102{
102 __raw_writew(set_field(0, data, h), addr); 103 __raw_writew(set_field(0, data, h), addr);
104 (void)__raw_readw(addr); /* Defeat write posting */
103} 105}
104 106
105static void write_32(unsigned long addr, unsigned long h, unsigned long data) 107static void write_32(unsigned long addr, unsigned long h, unsigned long data)
106{ 108{
107 __raw_writel(set_field(0, data, h), addr); 109 __raw_writel(set_field(0, data, h), addr);
110 (void)__raw_readl(addr); /* Defeat write posting */
108} 111}
109 112
110static void modify_8(unsigned long addr, unsigned long h, unsigned long data) 113static void modify_8(unsigned long addr, unsigned long h, unsigned long data)
@@ -112,6 +115,7 @@ static void modify_8(unsigned long addr, unsigned long h, unsigned long data)
112 unsigned long flags; 115 unsigned long flags;
113 local_irq_save(flags); 116 local_irq_save(flags);
114 __raw_writeb(set_field(__raw_readb(addr), data, h), addr); 117 __raw_writeb(set_field(__raw_readb(addr), data, h), addr);
118 (void)__raw_readb(addr); /* Defeat write posting */
115 local_irq_restore(flags); 119 local_irq_restore(flags);
116} 120}
117 121
@@ -120,6 +124,7 @@ static void modify_16(unsigned long addr, unsigned long h, unsigned long data)
120 unsigned long flags; 124 unsigned long flags;
121 local_irq_save(flags); 125 local_irq_save(flags);
122 __raw_writew(set_field(__raw_readw(addr), data, h), addr); 126 __raw_writew(set_field(__raw_readw(addr), data, h), addr);
127 (void)__raw_readw(addr); /* Defeat write posting */
123 local_irq_restore(flags); 128 local_irq_restore(flags);
124} 129}
125 130
@@ -128,6 +133,7 @@ static void modify_32(unsigned long addr, unsigned long h, unsigned long data)
128 unsigned long flags; 133 unsigned long flags;
129 local_irq_save(flags); 134 local_irq_save(flags);
130 __raw_writel(set_field(__raw_readl(addr), data, h), addr); 135 __raw_writel(set_field(__raw_readl(addr), data, h), addr);
136 (void)__raw_readl(addr); /* Defeat write posting */
131 local_irq_restore(flags); 137 local_irq_restore(flags);
132} 138}
133 139
@@ -657,16 +663,9 @@ static unsigned int __init save_reg(struct intc_desc_int *d,
657 return 0; 663 return 0;
658} 664}
659 665
660static unsigned char *intc_evt2irq_table; 666static void intc_redirect_irq(unsigned int irq, struct irq_desc *desc)
661
662unsigned int intc_evt2irq(unsigned int vector)
663{ 667{
664 unsigned int irq = evt2irq(vector); 668 generic_handle_irq((unsigned int)get_irq_data(irq));
665
666 if (intc_evt2irq_table && intc_evt2irq_table[irq])
667 irq = intc_evt2irq_table[irq];
668
669 return irq;
670} 669}
671 670
672void __init register_intc_controller(struct intc_desc *desc) 671void __init register_intc_controller(struct intc_desc *desc)
@@ -739,50 +738,48 @@ void __init register_intc_controller(struct intc_desc *desc)
739 738
740 BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */ 739 BUG_ON(k > 256); /* _INTC_ADDR_E() and _INTC_ADDR_D() are 8 bits */
741 740
742 /* keep the first vector only if same enum is used multiple times */ 741 /* register the vectors one by one */
743 for (i = 0; i < desc->nr_vectors; i++) { 742 for (i = 0; i < desc->nr_vectors; i++) {
744 struct intc_vect *vect = desc->vectors + i; 743 struct intc_vect *vect = desc->vectors + i;
745 int first_irq = evt2irq(vect->vect); 744 unsigned int irq = evt2irq(vect->vect);
745 struct irq_desc *irq_desc;
746 746
747 if (!vect->enum_id) 747 if (!vect->enum_id)
748 continue; 748 continue;
749 749
750 irq_desc = irq_to_desc_alloc_node(irq, numa_node_id());
751 if (unlikely(!irq_desc)) {
752 pr_info("can't get irq_desc for %d\n", irq);
753 continue;
754 }
755
756 intc_register_irq(desc, d, vect->enum_id, irq);
757
750 for (k = i + 1; k < desc->nr_vectors; k++) { 758 for (k = i + 1; k < desc->nr_vectors; k++) {
751 struct intc_vect *vect2 = desc->vectors + k; 759 struct intc_vect *vect2 = desc->vectors + k;
760 unsigned int irq2 = evt2irq(vect2->vect);
752 761
753 if (vect->enum_id != vect2->enum_id) 762 if (vect->enum_id != vect2->enum_id)
754 continue; 763 continue;
755 764
756 vect2->enum_id = 0; 765 /*
757 766 * In the case of multi-evt handling and sparse
758 if (!intc_evt2irq_table) 767 * IRQ support, each vector still needs to have
759 intc_evt2irq_table = kzalloc(NR_IRQS, GFP_NOWAIT); 768 * its own backing irq_desc.
760 769 */
761 if (!intc_evt2irq_table) { 770 irq_desc = irq_to_desc_alloc_node(irq2, numa_node_id());
762 pr_warning("intc: cannot allocate evt2irq!\n"); 771 if (unlikely(!irq_desc)) {
772 pr_info("can't get irq_desc for %d\n", irq2);
763 continue; 773 continue;
764 } 774 }
765 775
766 intc_evt2irq_table[evt2irq(vect2->vect)] = first_irq; 776 vect2->enum_id = 0;
767 }
768 }
769
770 /* register the vectors one by one */
771 for (i = 0; i < desc->nr_vectors; i++) {
772 struct intc_vect *vect = desc->vectors + i;
773 unsigned int irq = evt2irq(vect->vect);
774 struct irq_desc *irq_desc;
775
776 if (!vect->enum_id)
777 continue;
778 777
779 irq_desc = irq_to_desc_alloc_node(irq, numa_node_id()); 778 /* redirect this interrupts to the first one */
780 if (unlikely(!irq_desc)) { 779 set_irq_chip_and_handler_name(irq2, &d->chip,
781 printk(KERN_INFO "can not get irq_desc for %d\n", irq); 780 intc_redirect_irq, "redirect");
782 continue; 781 set_irq_data(irq2, (void *)irq);
783 } 782 }
784
785 intc_register_irq(desc, d, vect->enum_id, irq);
786 } 783 }
787} 784}
788 785
diff --git a/drivers/uio/uio_pdrv_genirq.c b/drivers/uio/uio_pdrv_genirq.c
index 3f06818cf9fa..02347c57357d 100644
--- a/drivers/uio/uio_pdrv_genirq.c
+++ b/drivers/uio/uio_pdrv_genirq.c
@@ -20,6 +20,7 @@
20#include <linux/bitops.h> 20#include <linux/bitops.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/stringify.h> 22#include <linux/stringify.h>
23#include <linux/pm_runtime.h>
23 24
24#define DRIVER_NAME "uio_pdrv_genirq" 25#define DRIVER_NAME "uio_pdrv_genirq"
25 26
@@ -27,8 +28,27 @@ struct uio_pdrv_genirq_platdata {
27 struct uio_info *uioinfo; 28 struct uio_info *uioinfo;
28 spinlock_t lock; 29 spinlock_t lock;
29 unsigned long flags; 30 unsigned long flags;
31 struct platform_device *pdev;
30}; 32};
31 33
34static int uio_pdrv_genirq_open(struct uio_info *info, struct inode *inode)
35{
36 struct uio_pdrv_genirq_platdata *priv = info->priv;
37
38 /* Wait until the Runtime PM code has woken up the device */
39 pm_runtime_get_sync(&priv->pdev->dev);
40 return 0;
41}
42
43static int uio_pdrv_genirq_release(struct uio_info *info, struct inode *inode)
44{
45 struct uio_pdrv_genirq_platdata *priv = info->priv;
46
47 /* Tell the Runtime PM code that the device has become idle */
48 pm_runtime_put_sync(&priv->pdev->dev);
49 return 0;
50}
51
32static irqreturn_t uio_pdrv_genirq_handler(int irq, struct uio_info *dev_info) 52static irqreturn_t uio_pdrv_genirq_handler(int irq, struct uio_info *dev_info)
33{ 53{
34 struct uio_pdrv_genirq_platdata *priv = dev_info->priv; 54 struct uio_pdrv_genirq_platdata *priv = dev_info->priv;
@@ -97,6 +117,7 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev)
97 priv->uioinfo = uioinfo; 117 priv->uioinfo = uioinfo;
98 spin_lock_init(&priv->lock); 118 spin_lock_init(&priv->lock);
99 priv->flags = 0; /* interrupt is enabled to begin with */ 119 priv->flags = 0; /* interrupt is enabled to begin with */
120 priv->pdev = pdev;
100 121
101 uiomem = &uioinfo->mem[0]; 122 uiomem = &uioinfo->mem[0];
102 123
@@ -136,8 +157,17 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev)
136 uioinfo->irq_flags |= IRQF_DISABLED; 157 uioinfo->irq_flags |= IRQF_DISABLED;
137 uioinfo->handler = uio_pdrv_genirq_handler; 158 uioinfo->handler = uio_pdrv_genirq_handler;
138 uioinfo->irqcontrol = uio_pdrv_genirq_irqcontrol; 159 uioinfo->irqcontrol = uio_pdrv_genirq_irqcontrol;
160 uioinfo->open = uio_pdrv_genirq_open;
161 uioinfo->release = uio_pdrv_genirq_release;
139 uioinfo->priv = priv; 162 uioinfo->priv = priv;
140 163
164 /* Enable Runtime PM for this device:
165 * The device starts in suspended state to allow the hardware to be
166 * turned off by default. The Runtime PM bus code should power on the
167 * hardware and enable clocks at open().
168 */
169 pm_runtime_enable(&pdev->dev);
170
141 ret = uio_register_device(&pdev->dev, priv->uioinfo); 171 ret = uio_register_device(&pdev->dev, priv->uioinfo);
142 if (ret) { 172 if (ret) {
143 dev_err(&pdev->dev, "unable to register uio device\n"); 173 dev_err(&pdev->dev, "unable to register uio device\n");
@@ -157,16 +187,40 @@ static int uio_pdrv_genirq_remove(struct platform_device *pdev)
157 struct uio_pdrv_genirq_platdata *priv = platform_get_drvdata(pdev); 187 struct uio_pdrv_genirq_platdata *priv = platform_get_drvdata(pdev);
158 188
159 uio_unregister_device(priv->uioinfo); 189 uio_unregister_device(priv->uioinfo);
190 pm_runtime_disable(&pdev->dev);
160 kfree(priv); 191 kfree(priv);
161 return 0; 192 return 0;
162} 193}
163 194
195static int uio_pdrv_genirq_runtime_nop(struct device *dev)
196{
197 /* Runtime PM callback shared between ->runtime_suspend()
198 * and ->runtime_resume(). Simply returns success.
199 *
200 * In this driver pm_runtime_get_sync() and pm_runtime_put_sync()
201 * are used at open() and release() time. This allows the
202 * Runtime PM code to turn off power to the device while the
203 * device is unused, ie before open() and after release().
204 *
205 * This Runtime PM callback does not need to save or restore
206 * any registers since user space is responsbile for hardware
207 * register reinitialization after open().
208 */
209 return 0;
210}
211
212static struct dev_pm_ops uio_pdrv_genirq_dev_pm_ops = {
213 .runtime_suspend = uio_pdrv_genirq_runtime_nop,
214 .runtime_resume = uio_pdrv_genirq_runtime_nop,
215};
216
164static struct platform_driver uio_pdrv_genirq = { 217static struct platform_driver uio_pdrv_genirq = {
165 .probe = uio_pdrv_genirq_probe, 218 .probe = uio_pdrv_genirq_probe,
166 .remove = uio_pdrv_genirq_remove, 219 .remove = uio_pdrv_genirq_remove,
167 .driver = { 220 .driver = {
168 .name = DRIVER_NAME, 221 .name = DRIVER_NAME,
169 .owner = THIS_MODULE, 222 .owner = THIS_MODULE,
223 .pm = &uio_pdrv_genirq_dev_pm_ops,
170 }, 224 },
171}; 225};
172 226
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 7f8e83a954ac..9f986b417c5b 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -251,6 +251,24 @@ config USB_PXA25X_SMALL
251 default y if USB_ETH 251 default y if USB_ETH
252 default y if USB_G_SERIAL 252 default y if USB_G_SERIAL
253 253
254config USB_GADGET_R8A66597
255 boolean "Renesas R8A66597 USB Peripheral Controller"
256 select USB_GADGET_DUALSPEED
257 help
258 R8A66597 is a discrete USB host and peripheral controller chip that
259 supports both full and high speed USB 2.0 data transfers.
260 It has nine configurable endpoints, and endpoint zero.
261
262 Say "y" to link the driver statically, or "m" to build a
263 dynamically linked module called "r8a66597_udc" and force all
264 gadget drivers to also be dynamically linked.
265
266config USB_R8A66597
267 tristate
268 depends on USB_GADGET_R8A66597
269 default USB_GADGET
270 select USB_GADGET_SELECTED
271
254config USB_GADGET_PXA27X 272config USB_GADGET_PXA27X
255 boolean "PXA 27x" 273 boolean "PXA 27x"
256 depends on ARCH_PXA && (PXA27x || PXA3xx) 274 depends on ARCH_PXA && (PXA27x || PXA3xx)
@@ -360,16 +378,6 @@ config USB_M66592
360 default USB_GADGET 378 default USB_GADGET
361 select USB_GADGET_SELECTED 379 select USB_GADGET_SELECTED
362 380
363config SUPERH_BUILT_IN_M66592
364 boolean "Enable SuperH built-in USB like the M66592"
365 depends on USB_GADGET_M66592 && CPU_SUBTYPE_SH7722
366 help
367 SH7722 has USB like the M66592.
368
369 The transfer rate is very slow when use "Ethernet Gadget".
370 However, this problem is improved if change a value of
371 NET_IP_ALIGN to 4.
372
373# 381#
374# Controllers available only in discrete form (and all PCI controllers) 382# Controllers available only in discrete form (and all PCI controllers)
375# 383#
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index e6017e6bf6da..9d7b87c52e9f 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -23,6 +23,7 @@ ifeq ($(CONFIG_ARCH_MXC),y)
23fsl_usb2_udc-objs += fsl_mx3_udc.o 23fsl_usb2_udc-objs += fsl_mx3_udc.o
24endif 24endif
25obj-$(CONFIG_USB_M66592) += m66592-udc.o 25obj-$(CONFIG_USB_M66592) += m66592-udc.o
26obj-$(CONFIG_USB_R8A66597) += r8a66597-udc.o
26obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o 27obj-$(CONFIG_USB_FSL_QE) += fsl_qe_udc.o
27obj-$(CONFIG_USB_CI13XXX) += ci13xxx_udc.o 28obj-$(CONFIG_USB_CI13XXX) += ci13xxx_udc.o
28obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o 29obj-$(CONFIG_USB_S3C_HSOTG) += s3c-hsotg.o
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index 8e0e9a0b7364..f2d270b202f2 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -173,6 +173,12 @@
173// CONFIG_USB_GADGET_AU1X00 173// CONFIG_USB_GADGET_AU1X00
174// ... 174// ...
175 175
176#ifdef CONFIG_USB_GADGET_R8A66597
177#define gadget_is_r8a66597(g) !strcmp("r8a66597_udc", (g)->name)
178#else
179#define gadget_is_r8a66597(g) 0
180#endif
181
176 182
177/** 183/**
178 * usb_gadget_controller_number - support bcdDevice id convention 184 * usb_gadget_controller_number - support bcdDevice id convention
@@ -239,6 +245,8 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget)
239 return 0x23; 245 return 0x23;
240 else if (gadget_is_langwell(gadget)) 246 else if (gadget_is_langwell(gadget))
241 return 0x24; 247 return 0x24;
248 else if (gadget_is_r8a66597(gadget))
249 return 0x25;
242 return -ENOENT; 250 return -ENOENT;
243} 251}
244 252
diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c
index 43dcf9e1af6b..a8c8543d1b08 100644
--- a/drivers/usb/gadget/m66592-udc.c
+++ b/drivers/usb/gadget/m66592-udc.c
@@ -25,44 +25,18 @@
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28 28#include <linux/err.h>
29#include <linux/usb/ch9.h> 29#include <linux/usb/ch9.h>
30#include <linux/usb/gadget.h> 30#include <linux/usb/gadget.h>
31 31
32#include "m66592-udc.h" 32#include "m66592-udc.h"
33 33
34
35MODULE_DESCRIPTION("M66592 USB gadget driver"); 34MODULE_DESCRIPTION("M66592 USB gadget driver");
36MODULE_LICENSE("GPL"); 35MODULE_LICENSE("GPL");
37MODULE_AUTHOR("Yoshihiro Shimoda"); 36MODULE_AUTHOR("Yoshihiro Shimoda");
38MODULE_ALIAS("platform:m66592_udc"); 37MODULE_ALIAS("platform:m66592_udc");
39 38
40#define DRIVER_VERSION "18 Oct 2007" 39#define DRIVER_VERSION "21 July 2009"
41
42/* module parameters */
43#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
44static unsigned short endian = M66592_LITTLE;
45module_param(endian, ushort, 0644);
46MODULE_PARM_DESC(endian, "data endian: big=0, little=0 (default=0)");
47#else
48static unsigned short clock = M66592_XTAL24;
49module_param(clock, ushort, 0644);
50MODULE_PARM_DESC(clock, "input clock: 48MHz=32768, 24MHz=16384, 12MHz=0 "
51 "(default=16384)");
52
53static unsigned short vif = M66592_LDRV;
54module_param(vif, ushort, 0644);
55MODULE_PARM_DESC(vif, "input VIF: 3.3V=32768, 1.5V=0 (default=32768)");
56
57static unsigned short endian;
58module_param(endian, ushort, 0644);
59MODULE_PARM_DESC(endian, "data endian: big=256, little=0 (default=0)");
60
61static unsigned short irq_sense = M66592_INTL;
62module_param(irq_sense, ushort, 0644);
63MODULE_PARM_DESC(irq_sense, "IRQ sense: low level=2, falling edge=0 "
64 "(default=2)");
65#endif
66 40
67static const char udc_name[] = "m66592_udc"; 41static const char udc_name[] = "m66592_udc";
68static const char *m66592_ep_name[] = { 42static const char *m66592_ep_name[] = {
@@ -244,6 +218,7 @@ static inline int get_buffer_size(struct m66592 *m66592, u16 pipenum)
244static inline void pipe_change(struct m66592 *m66592, u16 pipenum) 218static inline void pipe_change(struct m66592 *m66592, u16 pipenum)
245{ 219{
246 struct m66592_ep *ep = m66592->pipenum2ep[pipenum]; 220 struct m66592_ep *ep = m66592->pipenum2ep[pipenum];
221 unsigned short mbw;
247 222
248 if (ep->use_dma) 223 if (ep->use_dma)
249 return; 224 return;
@@ -252,7 +227,12 @@ static inline void pipe_change(struct m66592 *m66592, u16 pipenum)
252 227
253 ndelay(450); 228 ndelay(450);
254 229
255 m66592_bset(m66592, M66592_MBW, ep->fifosel); 230 if (m66592->pdata->on_chip)
231 mbw = M66592_MBW_32;
232 else
233 mbw = M66592_MBW_16;
234
235 m66592_bset(m66592, mbw, ep->fifosel);
256} 236}
257 237
258static int pipe_buffer_setting(struct m66592 *m66592, 238static int pipe_buffer_setting(struct m66592 *m66592,
@@ -276,24 +256,27 @@ static int pipe_buffer_setting(struct m66592 *m66592,
276 buf_bsize = 0; 256 buf_bsize = 0;
277 break; 257 break;
278 case M66592_BULK: 258 case M66592_BULK:
279 bufnum = m66592->bi_bufnum + 259 /* isochronous pipes may be used as bulk pipes */
280 (info->pipe - M66592_BASE_PIPENUM_BULK) * 16; 260 if (info->pipe > M66592_BASE_PIPENUM_BULK)
281 m66592->bi_bufnum += 16; 261 bufnum = info->pipe - M66592_BASE_PIPENUM_BULK;
262 else
263 bufnum = info->pipe - M66592_BASE_PIPENUM_ISOC;
264
265 bufnum = M66592_BASE_BUFNUM + (bufnum * 16);
282 buf_bsize = 7; 266 buf_bsize = 7;
283 pipecfg |= M66592_DBLB; 267 pipecfg |= M66592_DBLB;
284 if (!info->dir_in) 268 if (!info->dir_in)
285 pipecfg |= M66592_SHTNAK; 269 pipecfg |= M66592_SHTNAK;
286 break; 270 break;
287 case M66592_ISO: 271 case M66592_ISO:
288 bufnum = m66592->bi_bufnum + 272 bufnum = M66592_BASE_BUFNUM +
289 (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16; 273 (info->pipe - M66592_BASE_PIPENUM_ISOC) * 16;
290 m66592->bi_bufnum += 16;
291 buf_bsize = 7; 274 buf_bsize = 7;
292 break; 275 break;
293 } 276 }
294 if (m66592->bi_bufnum > M66592_MAX_BUFNUM) { 277
295 pr_err("m66592 pipe memory is insufficient(%d)\n", 278 if (buf_bsize && ((bufnum + 16) >= M66592_MAX_BUFNUM)) {
296 m66592->bi_bufnum); 279 pr_err("m66592 pipe memory is insufficient\n");
297 return -ENOMEM; 280 return -ENOMEM;
298 } 281 }
299 282
@@ -313,17 +296,6 @@ static void pipe_buffer_release(struct m66592 *m66592,
313 if (info->pipe == 0) 296 if (info->pipe == 0)
314 return; 297 return;
315 298
316 switch (info->type) {
317 case M66592_BULK:
318 if (is_bulk_pipe(info->pipe))
319 m66592->bi_bufnum -= 16;
320 break;
321 case M66592_ISO:
322 if (is_isoc_pipe(info->pipe))
323 m66592->bi_bufnum -= 16;
324 break;
325 }
326
327 if (is_bulk_pipe(info->pipe)) { 299 if (is_bulk_pipe(info->pipe)) {
328 m66592->bulk--; 300 m66592->bulk--;
329 } else if (is_interrupt_pipe(info->pipe)) 301 } else if (is_interrupt_pipe(info->pipe))
@@ -340,6 +312,7 @@ static void pipe_buffer_release(struct m66592 *m66592,
340static void pipe_initialize(struct m66592_ep *ep) 312static void pipe_initialize(struct m66592_ep *ep)
341{ 313{
342 struct m66592 *m66592 = ep->m66592; 314 struct m66592 *m66592 = ep->m66592;
315 unsigned short mbw;
343 316
344 m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel); 317 m66592_mdfy(m66592, 0, M66592_CURPIPE, ep->fifosel);
345 318
@@ -351,7 +324,12 @@ static void pipe_initialize(struct m66592_ep *ep)
351 324
352 ndelay(450); 325 ndelay(450);
353 326
354 m66592_bset(m66592, M66592_MBW, ep->fifosel); 327 if (m66592->pdata->on_chip)
328 mbw = M66592_MBW_32;
329 else
330 mbw = M66592_MBW_16;
331
332 m66592_bset(m66592, mbw, ep->fifosel);
355 } 333 }
356} 334}
357 335
@@ -367,15 +345,13 @@ static void m66592_ep_setting(struct m66592 *m66592, struct m66592_ep *ep,
367 ep->fifosel = M66592_D0FIFOSEL; 345 ep->fifosel = M66592_D0FIFOSEL;
368 ep->fifoctr = M66592_D0FIFOCTR; 346 ep->fifoctr = M66592_D0FIFOCTR;
369 ep->fifotrn = M66592_D0FIFOTRN; 347 ep->fifotrn = M66592_D0FIFOTRN;
370#if !defined(CONFIG_SUPERH_BUILT_IN_M66592) 348 } else if (!m66592->pdata->on_chip && m66592->num_dma == 1) {
371 } else if (m66592->num_dma == 1) {
372 m66592->num_dma++; 349 m66592->num_dma++;
373 ep->use_dma = 1; 350 ep->use_dma = 1;
374 ep->fifoaddr = M66592_D1FIFO; 351 ep->fifoaddr = M66592_D1FIFO;
375 ep->fifosel = M66592_D1FIFOSEL; 352 ep->fifosel = M66592_D1FIFOSEL;
376 ep->fifoctr = M66592_D1FIFOCTR; 353 ep->fifoctr = M66592_D1FIFOCTR;
377 ep->fifotrn = M66592_D1FIFOTRN; 354 ep->fifotrn = M66592_D1FIFOTRN;
378#endif
379 } else { 355 } else {
380 ep->use_dma = 0; 356 ep->use_dma = 0;
381 ep->fifoaddr = M66592_CFIFO; 357 ep->fifoaddr = M66592_CFIFO;
@@ -620,76 +596,120 @@ static void start_ep0(struct m66592_ep *ep, struct m66592_request *req)
620 } 596 }
621} 597}
622 598
623#if defined(CONFIG_SUPERH_BUILT_IN_M66592)
624static void init_controller(struct m66592 *m66592) 599static void init_controller(struct m66592 *m66592)
625{ 600{
626 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */ 601 unsigned int endian;
627 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
628 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
629 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
630 602
631 /* This is a workaound for SH7722 2nd cut */ 603 if (m66592->pdata->on_chip) {
632 m66592_bset(m66592, 0x8000, M66592_DVSTCTR); 604 if (m66592->pdata->endian)
633 m66592_bset(m66592, 0x1000, M66592_TESTMODE); 605 endian = 0; /* big endian */
634 m66592_bclr(m66592, 0x8000, M66592_DVSTCTR); 606 else
607 endian = M66592_LITTLE; /* little endian */
635 608
636 m66592_bset(m66592, M66592_INTL, M66592_INTENB1); 609 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
610 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
611 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
612 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
637 613
638 m66592_write(m66592, 0, M66592_CFBCFG); 614 /* This is a workaound for SH7722 2nd cut */
639 m66592_write(m66592, 0, M66592_D0FBCFG); 615 m66592_bset(m66592, 0x8000, M66592_DVSTCTR);
640 m66592_bset(m66592, endian, M66592_CFBCFG); 616 m66592_bset(m66592, 0x1000, M66592_TESTMODE);
641 m66592_bset(m66592, endian, M66592_D0FBCFG); 617 m66592_bclr(m66592, 0x8000, M66592_DVSTCTR);
642}
643#else /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
644static void init_controller(struct m66592 *m66592)
645{
646 m66592_bset(m66592, (vif & M66592_LDRV) | (endian & M66592_BIGEND),
647 M66592_PINCFG);
648 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
649 m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL, M66592_SYSCFG);
650 618
651 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG); 619 m66592_bset(m66592, M66592_INTL, M66592_INTENB1);
652 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG); 620
653 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG); 621 m66592_write(m66592, 0, M66592_CFBCFG);
622 m66592_write(m66592, 0, M66592_D0FBCFG);
623 m66592_bset(m66592, endian, M66592_CFBCFG);
624 m66592_bset(m66592, endian, M66592_D0FBCFG);
625 } else {
626 unsigned int clock, vif, irq_sense;
627
628 if (m66592->pdata->endian)
629 endian = M66592_BIGEND; /* big endian */
630 else
631 endian = 0; /* little endian */
632
633 if (m66592->pdata->vif)
634 vif = M66592_LDRV; /* 3.3v */
635 else
636 vif = 0; /* 1.5v */
637
638 switch (m66592->pdata->xtal) {
639 case M66592_PLATDATA_XTAL_12MHZ:
640 clock = M66592_XTAL12;
641 break;
642 case M66592_PLATDATA_XTAL_24MHZ:
643 clock = M66592_XTAL24;
644 break;
645 case M66592_PLATDATA_XTAL_48MHZ:
646 clock = M66592_XTAL48;
647 break;
648 default:
649 pr_warning("m66592-udc: xtal configuration error\n");
650 clock = 0;
651 }
652
653 switch (m66592->irq_trigger) {
654 case IRQF_TRIGGER_LOW:
655 irq_sense = M66592_INTL;
656 break;
657 case IRQF_TRIGGER_FALLING:
658 irq_sense = 0;
659 break;
660 default:
661 pr_warning("m66592-udc: irq trigger config error\n");
662 irq_sense = 0;
663 }
654 664
655 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); 665 m66592_bset(m66592,
666 (vif & M66592_LDRV) | (endian & M66592_BIGEND),
667 M66592_PINCFG);
668 m66592_bset(m66592, M66592_HSE, M66592_SYSCFG); /* High spd */
669 m66592_mdfy(m66592, clock & M66592_XTAL, M66592_XTAL,
670 M66592_SYSCFG);
671 m66592_bclr(m66592, M66592_USBE, M66592_SYSCFG);
672 m66592_bclr(m66592, M66592_DPRPU, M66592_SYSCFG);
673 m66592_bset(m66592, M66592_USBE, M66592_SYSCFG);
674
675 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
656 676
657 msleep(3); 677 msleep(3);
658 678
659 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG); 679 m66592_bset(m66592, M66592_RCKE | M66592_PLLC, M66592_SYSCFG);
660 680
661 msleep(1); 681 msleep(1);
662 682
663 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG); 683 m66592_bset(m66592, M66592_SCKE, M66592_SYSCFG);
664 684
665 m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1); 685 m66592_bset(m66592, irq_sense & M66592_INTL, M66592_INTENB1);
666 m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR, 686 m66592_write(m66592, M66592_BURST | M66592_CPU_ADR_RD_WR,
667 M66592_DMA0CFG); 687 M66592_DMA0CFG);
688 }
668} 689}
669#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
670 690
671static void disable_controller(struct m66592 *m66592) 691static void disable_controller(struct m66592 *m66592)
672{ 692{
673#if !defined(CONFIG_SUPERH_BUILT_IN_M66592) 693 if (!m66592->pdata->on_chip) {
674 m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG); 694 m66592_bclr(m66592, M66592_SCKE, M66592_SYSCFG);
675 udelay(1); 695 udelay(1);
676 m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG); 696 m66592_bclr(m66592, M66592_PLLC, M66592_SYSCFG);
677 udelay(1); 697 udelay(1);
678 m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG); 698 m66592_bclr(m66592, M66592_RCKE, M66592_SYSCFG);
679 udelay(1); 699 udelay(1);
680 m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG); 700 m66592_bclr(m66592, M66592_XCKE, M66592_SYSCFG);
681#endif 701 }
682} 702}
683 703
684static void m66592_start_xclock(struct m66592 *m66592) 704static void m66592_start_xclock(struct m66592 *m66592)
685{ 705{
686#if !defined(CONFIG_SUPERH_BUILT_IN_M66592)
687 u16 tmp; 706 u16 tmp;
688 707
689 tmp = m66592_read(m66592, M66592_SYSCFG); 708 if (!m66592->pdata->on_chip) {
690 if (!(tmp & M66592_XCKE)) 709 tmp = m66592_read(m66592, M66592_SYSCFG);
691 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG); 710 if (!(tmp & M66592_XCKE))
692#endif 711 m66592_bset(m66592, M66592_XCKE, M66592_SYSCFG);
712 }
693} 713}
694 714
695/*-------------------------------------------------------------------------*/ 715/*-------------------------------------------------------------------------*/
@@ -1177,8 +1197,7 @@ static irqreturn_t m66592_irq(int irq, void *_m66592)
1177 intsts0 = m66592_read(m66592, M66592_INTSTS0); 1197 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1178 intenb0 = m66592_read(m66592, M66592_INTENB0); 1198 intenb0 = m66592_read(m66592, M66592_INTENB0);
1179 1199
1180#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 1200 if (m66592->pdata->on_chip && !intsts0 && !intenb0) {
1181 if (!intsts0 && !intenb0) {
1182 /* 1201 /*
1183 * When USB clock stops, it cannot read register. Even if a 1202 * When USB clock stops, it cannot read register. Even if a
1184 * clock stops, the interrupt occurs. So this driver turn on 1203 * clock stops, the interrupt occurs. So this driver turn on
@@ -1188,7 +1207,6 @@ static irqreturn_t m66592_irq(int irq, void *_m66592)
1188 intsts0 = m66592_read(m66592, M66592_INTSTS0); 1207 intsts0 = m66592_read(m66592, M66592_INTSTS0);
1189 intenb0 = m66592_read(m66592, M66592_INTENB0); 1208 intenb0 = m66592_read(m66592, M66592_INTENB0);
1190 } 1209 }
1191#endif
1192 1210
1193 savepipe = m66592_read(m66592, M66592_CFIFOSEL); 1211 savepipe = m66592_read(m66592, M66592_CFIFOSEL);
1194 1212
@@ -1534,9 +1552,11 @@ static int __exit m66592_remove(struct platform_device *pdev)
1534 iounmap(m66592->reg); 1552 iounmap(m66592->reg);
1535 free_irq(platform_get_irq(pdev, 0), m66592); 1553 free_irq(platform_get_irq(pdev, 0), m66592);
1536 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req); 1554 m66592_free_request(&m66592->ep[0].ep, m66592->ep0_req);
1537#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1555#ifdef CONFIG_HAVE_CLK
1538 clk_disable(m66592->clk); 1556 if (m66592->pdata->on_chip) {
1539 clk_put(m66592->clk); 1557 clk_disable(m66592->clk);
1558 clk_put(m66592->clk);
1559 }
1540#endif 1560#endif
1541 kfree(m66592); 1561 kfree(m66592);
1542 return 0; 1562 return 0;
@@ -1548,11 +1568,10 @@ static void nop_completion(struct usb_ep *ep, struct usb_request *r)
1548 1568
1549static int __init m66592_probe(struct platform_device *pdev) 1569static int __init m66592_probe(struct platform_device *pdev)
1550{ 1570{
1551 struct resource *res; 1571 struct resource *res, *ires;
1552 int irq;
1553 void __iomem *reg = NULL; 1572 void __iomem *reg = NULL;
1554 struct m66592 *m66592 = NULL; 1573 struct m66592 *m66592 = NULL;
1555#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1574#ifdef CONFIG_HAVE_CLK
1556 char clk_name[8]; 1575 char clk_name[8];
1557#endif 1576#endif
1558 int ret = 0; 1577 int ret = 0;
@@ -1565,10 +1584,11 @@ static int __init m66592_probe(struct platform_device *pdev)
1565 goto clean_up; 1584 goto clean_up;
1566 } 1585 }
1567 1586
1568 irq = platform_get_irq(pdev, 0); 1587 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1569 if (irq < 0) { 1588 if (!ires) {
1570 ret = -ENODEV; 1589 ret = -ENODEV;
1571 pr_err("platform_get_irq error.\n"); 1590 dev_err(&pdev->dev,
1591 "platform_get_resource IORESOURCE_IRQ error.\n");
1572 goto clean_up; 1592 goto clean_up;
1573 } 1593 }
1574 1594
@@ -1579,6 +1599,12 @@ static int __init m66592_probe(struct platform_device *pdev)
1579 goto clean_up; 1599 goto clean_up;
1580 } 1600 }
1581 1601
1602 if (pdev->dev.platform_data == NULL) {
1603 dev_err(&pdev->dev, "no platform data\n");
1604 ret = -ENODEV;
1605 goto clean_up;
1606 }
1607
1582 /* initialize ucd */ 1608 /* initialize ucd */
1583 m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL); 1609 m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL);
1584 if (m66592 == NULL) { 1610 if (m66592 == NULL) {
@@ -1586,6 +1612,9 @@ static int __init m66592_probe(struct platform_device *pdev)
1586 goto clean_up; 1612 goto clean_up;
1587 } 1613 }
1588 1614
1615 m66592->pdata = pdev->dev.platform_data;
1616 m66592->irq_trigger = ires->flags & IRQF_TRIGGER_MASK;
1617
1589 spin_lock_init(&m66592->lock); 1618 spin_lock_init(&m66592->lock);
1590 dev_set_drvdata(&pdev->dev, m66592); 1619 dev_set_drvdata(&pdev->dev, m66592);
1591 1620
@@ -1603,24 +1632,25 @@ static int __init m66592_probe(struct platform_device *pdev)
1603 m66592->timer.data = (unsigned long)m66592; 1632 m66592->timer.data = (unsigned long)m66592;
1604 m66592->reg = reg; 1633 m66592->reg = reg;
1605 1634
1606 m66592->bi_bufnum = M66592_BASE_BUFNUM; 1635 ret = request_irq(ires->start, m66592_irq, IRQF_DISABLED | IRQF_SHARED,
1607
1608 ret = request_irq(irq, m66592_irq, IRQF_DISABLED | IRQF_SHARED,
1609 udc_name, m66592); 1636 udc_name, m66592);
1610 if (ret < 0) { 1637 if (ret < 0) {
1611 pr_err("request_irq error (%d)\n", ret); 1638 pr_err("request_irq error (%d)\n", ret);
1612 goto clean_up; 1639 goto clean_up;
1613 } 1640 }
1614 1641
1615#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1642#ifdef CONFIG_HAVE_CLK
1616 snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id); 1643 if (m66592->pdata->on_chip) {
1617 m66592->clk = clk_get(&pdev->dev, clk_name); 1644 snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id);
1618 if (IS_ERR(m66592->clk)) { 1645 m66592->clk = clk_get(&pdev->dev, clk_name);
1619 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); 1646 if (IS_ERR(m66592->clk)) {
1620 ret = PTR_ERR(m66592->clk); 1647 dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
1621 goto clean_up2; 1648 clk_name);
1649 ret = PTR_ERR(m66592->clk);
1650 goto clean_up2;
1651 }
1652 clk_enable(m66592->clk);
1622 } 1653 }
1623 clk_enable(m66592->clk);
1624#endif 1654#endif
1625 INIT_LIST_HEAD(&m66592->gadget.ep_list); 1655 INIT_LIST_HEAD(&m66592->gadget.ep_list);
1626 m66592->gadget.ep0 = &m66592->ep[0].ep; 1656 m66592->gadget.ep0 = &m66592->ep[0].ep;
@@ -1662,12 +1692,14 @@ static int __init m66592_probe(struct platform_device *pdev)
1662 return 0; 1692 return 0;
1663 1693
1664clean_up3: 1694clean_up3:
1665#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 1695#ifdef CONFIG_HAVE_CLK
1666 clk_disable(m66592->clk); 1696 if (m66592->pdata->on_chip) {
1667 clk_put(m66592->clk); 1697 clk_disable(m66592->clk);
1698 clk_put(m66592->clk);
1699 }
1668clean_up2: 1700clean_up2:
1669#endif 1701#endif
1670 free_irq(irq, m66592); 1702 free_irq(ires->start, m66592);
1671clean_up: 1703clean_up:
1672 if (m66592) { 1704 if (m66592) {
1673 if (m66592->ep0_req) 1705 if (m66592->ep0_req)
diff --git a/drivers/usb/gadget/m66592-udc.h b/drivers/usb/gadget/m66592-udc.h
index 286ce07e7960..8b960deed680 100644
--- a/drivers/usb/gadget/m66592-udc.h
+++ b/drivers/usb/gadget/m66592-udc.h
@@ -23,10 +23,12 @@
23#ifndef __M66592_UDC_H__ 23#ifndef __M66592_UDC_H__
24#define __M66592_UDC_H__ 24#define __M66592_UDC_H__
25 25
26#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 26#ifdef CONFIG_HAVE_CLK
27#include <linux/clk.h> 27#include <linux/clk.h>
28#endif 28#endif
29 29
30#include <linux/usb/m66592.h>
31
30#define M66592_SYSCFG 0x00 32#define M66592_SYSCFG 0x00
31#define M66592_XTAL 0xC000 /* b15-14: Crystal selection */ 33#define M66592_XTAL 0xC000 /* b15-14: Crystal selection */
32#define M66592_XTAL48 0x8000 /* 48MHz */ 34#define M66592_XTAL48 0x8000 /* 48MHz */
@@ -76,11 +78,11 @@
76#define M66592_P_TST_J 0x0001 /* PERI TEST J */ 78#define M66592_P_TST_J 0x0001 /* PERI TEST J */
77#define M66592_P_TST_NORMAL 0x0000 /* PERI Normal Mode */ 79#define M66592_P_TST_NORMAL 0x0000 /* PERI Normal Mode */
78 80
79#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 81/* built-in registers */
80#define M66592_CFBCFG 0x0A 82#define M66592_CFBCFG 0x0A
81#define M66592_D0FBCFG 0x0C 83#define M66592_D0FBCFG 0x0C
82#define M66592_LITTLE 0x0100 /* b8: Little endian mode */ 84#define M66592_LITTLE 0x0100 /* b8: Little endian mode */
83#else 85/* external chip case */
84#define M66592_PINCFG 0x0A 86#define M66592_PINCFG 0x0A
85#define M66592_LDRV 0x8000 /* b15: Drive Current Adjust */ 87#define M66592_LDRV 0x8000 /* b15: Drive Current Adjust */
86#define M66592_BIGEND 0x0100 /* b8: Big endian mode */ 88#define M66592_BIGEND 0x0100 /* b8: Big endian mode */
@@ -100,8 +102,8 @@
100#define M66592_PKTM 0x0020 /* b5: Packet mode */ 102#define M66592_PKTM 0x0020 /* b5: Packet mode */
101#define M66592_DENDE 0x0010 /* b4: Dend enable */ 103#define M66592_DENDE 0x0010 /* b4: Dend enable */
102#define M66592_OBUS 0x0004 /* b2: OUTbus mode */ 104#define M66592_OBUS 0x0004 /* b2: OUTbus mode */
103#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
104 105
106/* common case */
105#define M66592_CFIFO 0x10 107#define M66592_CFIFO 0x10
106#define M66592_D0FIFO 0x14 108#define M66592_D0FIFO 0x14
107#define M66592_D1FIFO 0x18 109#define M66592_D1FIFO 0x18
@@ -113,13 +115,9 @@
113#define M66592_REW 0x4000 /* b14: Buffer rewind */ 115#define M66592_REW 0x4000 /* b14: Buffer rewind */
114#define M66592_DCLRM 0x2000 /* b13: DMA buffer clear mode */ 116#define M66592_DCLRM 0x2000 /* b13: DMA buffer clear mode */
115#define M66592_DREQE 0x1000 /* b12: DREQ output enable */ 117#define M66592_DREQE 0x1000 /* b12: DREQ output enable */
116#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 118#define M66592_MBW_8 0x0000 /* 8bit */
117#define M66592_MBW 0x0800 /* b11: Maximum bit width for FIFO */ 119#define M66592_MBW_16 0x0400 /* 16bit */
118#else 120#define M66592_MBW_32 0x0800 /* 32bit */
119#define M66592_MBW 0x0400 /* b10: Maximum bit width for FIFO */
120#define M66592_MBW_8 0x0000 /* 8bit */
121#define M66592_MBW_16 0x0400 /* 16bit */
122#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
123#define M66592_TRENB 0x0200 /* b9: Transaction counter enable */ 121#define M66592_TRENB 0x0200 /* b9: Transaction counter enable */
124#define M66592_TRCLR 0x0100 /* b8: Transaction counter clear */ 122#define M66592_TRCLR 0x0100 /* b8: Transaction counter clear */
125#define M66592_DEZPM 0x0080 /* b7: Zero-length packet mode */ 123#define M66592_DEZPM 0x0080 /* b7: Zero-length packet mode */
@@ -480,9 +478,11 @@ struct m66592_ep {
480struct m66592 { 478struct m66592 {
481 spinlock_t lock; 479 spinlock_t lock;
482 void __iomem *reg; 480 void __iomem *reg;
483#if defined(CONFIG_SUPERH_BUILT_IN_M66592) && defined(CONFIG_HAVE_CLK) 481#ifdef CONFIG_HAVE_CLK
484 struct clk *clk; 482 struct clk *clk;
485#endif 483#endif
484 struct m66592_platdata *pdata;
485 unsigned long irq_trigger;
486 486
487 struct usb_gadget gadget; 487 struct usb_gadget gadget;
488 struct usb_gadget_driver *driver; 488 struct usb_gadget_driver *driver;
@@ -506,7 +506,6 @@ struct m66592 {
506 int interrupt; 506 int interrupt;
507 int isochronous; 507 int isochronous;
508 int num_dma; 508 int num_dma;
509 int bi_bufnum; /* bulk and isochronous's bufnum */
510}; 509};
511 510
512#define gadget_to_m66592(_gadget) container_of(_gadget, struct m66592, gadget) 511#define gadget_to_m66592(_gadget) container_of(_gadget, struct m66592, gadget)
@@ -547,13 +546,13 @@ static inline void m66592_read_fifo(struct m66592 *m66592,
547{ 546{
548 unsigned long fifoaddr = (unsigned long)m66592->reg + offset; 547 unsigned long fifoaddr = (unsigned long)m66592->reg + offset;
549 548
550#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 549 if (m66592->pdata->on_chip) {
551 len = (len + 3) / 4; 550 len = (len + 3) / 4;
552 insl(fifoaddr, buf, len); 551 insl(fifoaddr, buf, len);
553#else 552 } else {
554 len = (len + 1) / 2; 553 len = (len + 1) / 2;
555 insw(fifoaddr, buf, len); 554 insw(fifoaddr, buf, len);
556#endif 555 }
557} 556}
558 557
559static inline void m66592_write(struct m66592 *m66592, u16 val, 558static inline void m66592_write(struct m66592 *m66592, u16 val,
@@ -567,33 +566,34 @@ static inline void m66592_write_fifo(struct m66592 *m66592,
567 void *buf, unsigned long len) 566 void *buf, unsigned long len)
568{ 567{
569 unsigned long fifoaddr = (unsigned long)m66592->reg + offset; 568 unsigned long fifoaddr = (unsigned long)m66592->reg + offset;
570#if defined(CONFIG_SUPERH_BUILT_IN_M66592) 569
571 unsigned long count; 570 if (m66592->pdata->on_chip) {
572 unsigned char *pb; 571 unsigned long count;
573 int i; 572 unsigned char *pb;
574 573 int i;
575 count = len / 4; 574
576 outsl(fifoaddr, buf, count); 575 count = len / 4;
577 576 outsl(fifoaddr, buf, count);
578 if (len & 0x00000003) { 577
579 pb = buf + count * 4; 578 if (len & 0x00000003) {
580 for (i = 0; i < (len & 0x00000003); i++) { 579 pb = buf + count * 4;
581 if (m66592_read(m66592, M66592_CFBCFG)) /* little */ 580 for (i = 0; i < (len & 0x00000003); i++) {
582 outb(pb[i], fifoaddr + (3 - i)); 581 if (m66592_read(m66592, M66592_CFBCFG)) /* le */
583 else 582 outb(pb[i], fifoaddr + (3 - i));
584 outb(pb[i], fifoaddr + i); 583 else
584 outb(pb[i], fifoaddr + i);
585 }
586 }
587 } else {
588 unsigned long odd = len & 0x0001;
589
590 len = len / 2;
591 outsw(fifoaddr, buf, len);
592 if (odd) {
593 unsigned char *p = buf + len*2;
594 outb(*p, fifoaddr);
585 } 595 }
586 } 596 }
587#else
588 unsigned long odd = len & 0x0001;
589
590 len = len / 2;
591 outsw(fifoaddr, buf, len);
592 if (odd) {
593 unsigned char *p = buf + len*2;
594 outb(*p, fifoaddr);
595 }
596#endif /* #if defined(CONFIG_SUPERH_BUILT_IN_M66592) */
597} 597}
598 598
599static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat, 599static inline void m66592_mdfy(struct m66592 *m66592, u16 val, u16 pat,
diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c
new file mode 100644
index 000000000000..e220fb8091a3
--- /dev/null
+++ b/drivers/usb/gadget/r8a66597-udc.c
@@ -0,0 +1,1689 @@
1/*
2 * R8A66597 UDC (USB gadget)
3 *
4 * Copyright (C) 2006-2009 Renesas Solutions Corp.
5 *
6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 *
21 */
22
23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/delay.h>
26#include <linux/io.h>
27#include <linux/platform_device.h>
28#include <linux/clk.h>
29
30#include <linux/usb/ch9.h>
31#include <linux/usb/gadget.h>
32
33#include "r8a66597-udc.h"
34
35#define DRIVER_VERSION "2009-08-18"
36
37static const char udc_name[] = "r8a66597_udc";
38static const char *r8a66597_ep_name[] = {
39 "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7",
40 "ep8", "ep9",
41};
42
43static void disable_controller(struct r8a66597 *r8a66597);
44static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req);
45static void irq_packet_write(struct r8a66597_ep *ep,
46 struct r8a66597_request *req);
47static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req,
48 gfp_t gfp_flags);
49
50static void transfer_complete(struct r8a66597_ep *ep,
51 struct r8a66597_request *req, int status);
52
53/*-------------------------------------------------------------------------*/
54static inline u16 get_usb_speed(struct r8a66597 *r8a66597)
55{
56 return r8a66597_read(r8a66597, DVSTCTR0) & RHST;
57}
58
59static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
60 unsigned long reg)
61{
62 u16 tmp;
63
64 tmp = r8a66597_read(r8a66597, INTENB0);
65 r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE,
66 INTENB0);
67 r8a66597_bset(r8a66597, (1 << pipenum), reg);
68 r8a66597_write(r8a66597, tmp, INTENB0);
69}
70
71static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
72 unsigned long reg)
73{
74 u16 tmp;
75
76 tmp = r8a66597_read(r8a66597, INTENB0);
77 r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE,
78 INTENB0);
79 r8a66597_bclr(r8a66597, (1 << pipenum), reg);
80 r8a66597_write(r8a66597, tmp, INTENB0);
81}
82
83static void r8a66597_usb_connect(struct r8a66597 *r8a66597)
84{
85 r8a66597_bset(r8a66597, CTRE, INTENB0);
86 r8a66597_bset(r8a66597, BEMPE | BRDYE, INTENB0);
87
88 r8a66597_bset(r8a66597, DPRPU, SYSCFG0);
89}
90
91static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597)
92__releases(r8a66597->lock)
93__acquires(r8a66597->lock)
94{
95 r8a66597_bclr(r8a66597, CTRE, INTENB0);
96 r8a66597_bclr(r8a66597, BEMPE | BRDYE, INTENB0);
97 r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
98
99 r8a66597->gadget.speed = USB_SPEED_UNKNOWN;
100 spin_unlock(&r8a66597->lock);
101 r8a66597->driver->disconnect(&r8a66597->gadget);
102 spin_lock(&r8a66597->lock);
103
104 disable_controller(r8a66597);
105 INIT_LIST_HEAD(&r8a66597->ep[0].queue);
106}
107
108static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum)
109{
110 u16 pid = 0;
111 unsigned long offset;
112
113 if (pipenum == 0)
114 pid = r8a66597_read(r8a66597, DCPCTR) & PID;
115 else if (pipenum < R8A66597_MAX_NUM_PIPE) {
116 offset = get_pipectr_addr(pipenum);
117 pid = r8a66597_read(r8a66597, offset) & PID;
118 } else
119 printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum);
120
121 return pid;
122}
123
124static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum,
125 u16 pid)
126{
127 unsigned long offset;
128
129 if (pipenum == 0)
130 r8a66597_mdfy(r8a66597, pid, PID, DCPCTR);
131 else if (pipenum < R8A66597_MAX_NUM_PIPE) {
132 offset = get_pipectr_addr(pipenum);
133 r8a66597_mdfy(r8a66597, pid, PID, offset);
134 } else
135 printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum);
136}
137
138static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum)
139{
140 control_reg_set_pid(r8a66597, pipenum, PID_BUF);
141}
142
143static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum)
144{
145 control_reg_set_pid(r8a66597, pipenum, PID_NAK);
146}
147
148static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum)
149{
150 control_reg_set_pid(r8a66597, pipenum, PID_STALL);
151}
152
153static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum)
154{
155 u16 ret = 0;
156 unsigned long offset;
157
158 if (pipenum == 0)
159 ret = r8a66597_read(r8a66597, DCPCTR);
160 else if (pipenum < R8A66597_MAX_NUM_PIPE) {
161 offset = get_pipectr_addr(pipenum);
162 ret = r8a66597_read(r8a66597, offset);
163 } else
164 printk(KERN_ERR "unexpect pipe num (%d)\n", pipenum);
165
166 return ret;
167}
168
169static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum)
170{
171 unsigned long offset;
172
173 pipe_stop(r8a66597, pipenum);
174
175 if (pipenum == 0)
176 r8a66597_bset(r8a66597, SQCLR, DCPCTR);
177 else if (pipenum < R8A66597_MAX_NUM_PIPE) {
178 offset = get_pipectr_addr(pipenum);
179 r8a66597_bset(r8a66597, SQCLR, offset);
180 } else
181 printk(KERN_ERR "unexpect pipe num(%d)\n", pipenum);
182}
183
184static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum)
185{
186 u16 tmp;
187 int size;
188
189 if (pipenum == 0) {
190 tmp = r8a66597_read(r8a66597, DCPCFG);
191 if ((tmp & R8A66597_CNTMD) != 0)
192 size = 256;
193 else {
194 tmp = r8a66597_read(r8a66597, DCPMAXP);
195 size = tmp & MAXP;
196 }
197 } else {
198 r8a66597_write(r8a66597, pipenum, PIPESEL);
199 tmp = r8a66597_read(r8a66597, PIPECFG);
200 if ((tmp & R8A66597_CNTMD) != 0) {
201 tmp = r8a66597_read(r8a66597, PIPEBUF);
202 size = ((tmp >> 10) + 1) * 64;
203 } else {
204 tmp = r8a66597_read(r8a66597, PIPEMAXP);
205 size = tmp & MXPS;
206 }
207 }
208
209 return size;
210}
211
212static inline unsigned short mbw_value(struct r8a66597 *r8a66597)
213{
214 if (r8a66597->pdata->on_chip)
215 return MBW_32;
216 else
217 return MBW_16;
218}
219
220static inline void pipe_change(struct r8a66597 *r8a66597, u16 pipenum)
221{
222 struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum];
223
224 if (ep->use_dma)
225 return;
226
227 r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel);
228
229 ndelay(450);
230
231 r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel);
232}
233
234static int pipe_buffer_setting(struct r8a66597 *r8a66597,
235 struct r8a66597_pipe_info *info)
236{
237 u16 bufnum = 0, buf_bsize = 0;
238 u16 pipecfg = 0;
239
240 if (info->pipe == 0)
241 return -EINVAL;
242
243 r8a66597_write(r8a66597, info->pipe, PIPESEL);
244
245 if (info->dir_in)
246 pipecfg |= R8A66597_DIR;
247 pipecfg |= info->type;
248 pipecfg |= info->epnum;
249 switch (info->type) {
250 case R8A66597_INT:
251 bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT);
252 buf_bsize = 0;
253 break;
254 case R8A66597_BULK:
255 /* isochronous pipes may be used as bulk pipes */
256 if (info->pipe > R8A66597_BASE_PIPENUM_BULK)
257 bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK;
258 else
259 bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC;
260
261 bufnum = R8A66597_BASE_BUFNUM + (bufnum * 16);
262 buf_bsize = 7;
263 pipecfg |= R8A66597_DBLB;
264 if (!info->dir_in)
265 pipecfg |= R8A66597_SHTNAK;
266 break;
267 case R8A66597_ISO:
268 bufnum = R8A66597_BASE_BUFNUM +
269 (info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16;
270 buf_bsize = 7;
271 break;
272 }
273
274 if (buf_bsize && ((bufnum + 16) >= R8A66597_MAX_BUFNUM)) {
275 pr_err(KERN_ERR "r8a66597 pipe memory is insufficient\n");
276 return -ENOMEM;
277 }
278
279 r8a66597_write(r8a66597, pipecfg, PIPECFG);
280 r8a66597_write(r8a66597, (buf_bsize << 10) | (bufnum), PIPEBUF);
281 r8a66597_write(r8a66597, info->maxpacket, PIPEMAXP);
282 if (info->interval)
283 info->interval--;
284 r8a66597_write(r8a66597, info->interval, PIPEPERI);
285
286 return 0;
287}
288
289static void pipe_buffer_release(struct r8a66597 *r8a66597,
290 struct r8a66597_pipe_info *info)
291{
292 if (info->pipe == 0)
293 return;
294
295 if (is_bulk_pipe(info->pipe))
296 r8a66597->bulk--;
297 else if (is_interrupt_pipe(info->pipe))
298 r8a66597->interrupt--;
299 else if (is_isoc_pipe(info->pipe)) {
300 r8a66597->isochronous--;
301 if (info->type == R8A66597_BULK)
302 r8a66597->bulk--;
303 } else
304 printk(KERN_ERR "ep_release: unexpect pipenum (%d)\n",
305 info->pipe);
306}
307
308static void pipe_initialize(struct r8a66597_ep *ep)
309{
310 struct r8a66597 *r8a66597 = ep->r8a66597;
311
312 r8a66597_mdfy(r8a66597, 0, CURPIPE, ep->fifosel);
313
314 r8a66597_write(r8a66597, ACLRM, ep->pipectr);
315 r8a66597_write(r8a66597, 0, ep->pipectr);
316 r8a66597_write(r8a66597, SQCLR, ep->pipectr);
317 if (ep->use_dma) {
318 r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel);
319
320 ndelay(450);
321
322 r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel);
323 }
324}
325
326static void r8a66597_ep_setting(struct r8a66597 *r8a66597,
327 struct r8a66597_ep *ep,
328 const struct usb_endpoint_descriptor *desc,
329 u16 pipenum, int dma)
330{
331 ep->use_dma = 0;
332 ep->fifoaddr = CFIFO;
333 ep->fifosel = CFIFOSEL;
334 ep->fifoctr = CFIFOCTR;
335 ep->fifotrn = 0;
336
337 ep->pipectr = get_pipectr_addr(pipenum);
338 ep->pipenum = pipenum;
339 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
340 r8a66597->pipenum2ep[pipenum] = ep;
341 r8a66597->epaddr2ep[desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK]
342 = ep;
343 INIT_LIST_HEAD(&ep->queue);
344}
345
346static void r8a66597_ep_release(struct r8a66597_ep *ep)
347{
348 struct r8a66597 *r8a66597 = ep->r8a66597;
349 u16 pipenum = ep->pipenum;
350
351 if (pipenum == 0)
352 return;
353
354 if (ep->use_dma)
355 r8a66597->num_dma--;
356 ep->pipenum = 0;
357 ep->busy = 0;
358 ep->use_dma = 0;
359}
360
361static int alloc_pipe_config(struct r8a66597_ep *ep,
362 const struct usb_endpoint_descriptor *desc)
363{
364 struct r8a66597 *r8a66597 = ep->r8a66597;
365 struct r8a66597_pipe_info info;
366 int dma = 0;
367 unsigned char *counter;
368 int ret;
369
370 ep->desc = desc;
371
372 if (ep->pipenum) /* already allocated pipe */
373 return 0;
374
375 switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
376 case USB_ENDPOINT_XFER_BULK:
377 if (r8a66597->bulk >= R8A66597_MAX_NUM_BULK) {
378 if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) {
379 printk(KERN_ERR "bulk pipe is insufficient\n");
380 return -ENODEV;
381 } else {
382 info.pipe = R8A66597_BASE_PIPENUM_ISOC
383 + r8a66597->isochronous;
384 counter = &r8a66597->isochronous;
385 }
386 } else {
387 info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk;
388 counter = &r8a66597->bulk;
389 }
390 info.type = R8A66597_BULK;
391 dma = 1;
392 break;
393 case USB_ENDPOINT_XFER_INT:
394 if (r8a66597->interrupt >= R8A66597_MAX_NUM_INT) {
395 printk(KERN_ERR "interrupt pipe is insufficient\n");
396 return -ENODEV;
397 }
398 info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt;
399 info.type = R8A66597_INT;
400 counter = &r8a66597->interrupt;
401 break;
402 case USB_ENDPOINT_XFER_ISOC:
403 if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) {
404 printk(KERN_ERR "isochronous pipe is insufficient\n");
405 return -ENODEV;
406 }
407 info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous;
408 info.type = R8A66597_ISO;
409 counter = &r8a66597->isochronous;
410 break;
411 default:
412 printk(KERN_ERR "unexpect xfer type\n");
413 return -EINVAL;
414 }
415 ep->type = info.type;
416
417 info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
418 info.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
419 info.interval = desc->bInterval;
420 if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
421 info.dir_in = 1;
422 else
423 info.dir_in = 0;
424
425 ret = pipe_buffer_setting(r8a66597, &info);
426 if (ret < 0) {
427 printk(KERN_ERR "pipe_buffer_setting fail\n");
428 return ret;
429 }
430
431 (*counter)++;
432 if ((counter == &r8a66597->isochronous) && info.type == R8A66597_BULK)
433 r8a66597->bulk++;
434
435 r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma);
436 pipe_initialize(ep);
437
438 return 0;
439}
440
441static int free_pipe_config(struct r8a66597_ep *ep)
442{
443 struct r8a66597 *r8a66597 = ep->r8a66597;
444 struct r8a66597_pipe_info info;
445
446 info.pipe = ep->pipenum;
447 info.type = ep->type;
448 pipe_buffer_release(r8a66597, &info);
449 r8a66597_ep_release(ep);
450
451 return 0;
452}
453
454/*-------------------------------------------------------------------------*/
455static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum)
456{
457 enable_irq_ready(r8a66597, pipenum);
458 enable_irq_nrdy(r8a66597, pipenum);
459}
460
461static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum)
462{
463 disable_irq_ready(r8a66597, pipenum);
464 disable_irq_nrdy(r8a66597, pipenum);
465}
466
467/* if complete is true, gadget driver complete function is not call */
468static void control_end(struct r8a66597 *r8a66597, unsigned ccpl)
469{
470 r8a66597->ep[0].internal_ccpl = ccpl;
471 pipe_start(r8a66597, 0);
472 r8a66597_bset(r8a66597, CCPL, DCPCTR);
473}
474
475static void start_ep0_write(struct r8a66597_ep *ep,
476 struct r8a66597_request *req)
477{
478 struct r8a66597 *r8a66597 = ep->r8a66597;
479
480 pipe_change(r8a66597, ep->pipenum);
481 r8a66597_mdfy(r8a66597, ISEL, (ISEL | CURPIPE), CFIFOSEL);
482 r8a66597_write(r8a66597, BCLR, ep->fifoctr);
483 if (req->req.length == 0) {
484 r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
485 pipe_start(r8a66597, 0);
486 transfer_complete(ep, req, 0);
487 } else {
488 r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
489 irq_ep0_write(ep, req);
490 }
491}
492
493static void start_packet_write(struct r8a66597_ep *ep,
494 struct r8a66597_request *req)
495{
496 struct r8a66597 *r8a66597 = ep->r8a66597;
497 u16 tmp;
498
499 pipe_change(r8a66597, ep->pipenum);
500 disable_irq_empty(r8a66597, ep->pipenum);
501 pipe_start(r8a66597, ep->pipenum);
502
503 tmp = r8a66597_read(r8a66597, ep->fifoctr);
504 if (unlikely((tmp & FRDY) == 0))
505 pipe_irq_enable(r8a66597, ep->pipenum);
506 else
507 irq_packet_write(ep, req);
508}
509
510static void start_packet_read(struct r8a66597_ep *ep,
511 struct r8a66597_request *req)
512{
513 struct r8a66597 *r8a66597 = ep->r8a66597;
514 u16 pipenum = ep->pipenum;
515
516 if (ep->pipenum == 0) {
517 r8a66597_mdfy(r8a66597, 0, (ISEL | CURPIPE), CFIFOSEL);
518 r8a66597_write(r8a66597, BCLR, ep->fifoctr);
519 pipe_start(r8a66597, pipenum);
520 pipe_irq_enable(r8a66597, pipenum);
521 } else {
522 if (ep->use_dma) {
523 r8a66597_bset(r8a66597, TRCLR, ep->fifosel);
524 pipe_change(r8a66597, pipenum);
525 r8a66597_bset(r8a66597, TRENB, ep->fifosel);
526 r8a66597_write(r8a66597,
527 (req->req.length + ep->ep.maxpacket - 1)
528 / ep->ep.maxpacket,
529 ep->fifotrn);
530 }
531 pipe_start(r8a66597, pipenum); /* trigger once */
532 pipe_irq_enable(r8a66597, pipenum);
533 }
534}
535
536static void start_packet(struct r8a66597_ep *ep, struct r8a66597_request *req)
537{
538 if (ep->desc->bEndpointAddress & USB_DIR_IN)
539 start_packet_write(ep, req);
540 else
541 start_packet_read(ep, req);
542}
543
544static void start_ep0(struct r8a66597_ep *ep, struct r8a66597_request *req)
545{
546 u16 ctsq;
547
548 ctsq = r8a66597_read(ep->r8a66597, INTSTS0) & CTSQ;
549
550 switch (ctsq) {
551 case CS_RDDS:
552 start_ep0_write(ep, req);
553 break;
554 case CS_WRDS:
555 start_packet_read(ep, req);
556 break;
557
558 case CS_WRND:
559 control_end(ep->r8a66597, 0);
560 break;
561 default:
562 printk(KERN_ERR "start_ep0: unexpect ctsq(%x)\n", ctsq);
563 break;
564 }
565}
566
567static void init_controller(struct r8a66597 *r8a66597)
568{
569 u16 vif = r8a66597->pdata->vif ? LDRV : 0;
570 u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0;
571 u16 endian = r8a66597->pdata->endian ? BIGEND : 0;
572
573 if (r8a66597->pdata->on_chip) {
574 r8a66597_bset(r8a66597, 0x04, SYSCFG1);
575 r8a66597_bset(r8a66597, HSE, SYSCFG0);
576
577 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
578 r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
579 r8a66597_bset(r8a66597, USBE, SYSCFG0);
580
581 r8a66597_bset(r8a66597, SCKE, SYSCFG0);
582
583 r8a66597_bset(r8a66597, irq_sense, INTENB1);
584 r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR,
585 DMA0CFG);
586 } else {
587 r8a66597_bset(r8a66597, vif | endian, PINCFG);
588 r8a66597_bset(r8a66597, HSE, SYSCFG0); /* High spd */
589 r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata),
590 XTAL, SYSCFG0);
591
592 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
593 r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
594 r8a66597_bset(r8a66597, USBE, SYSCFG0);
595
596 r8a66597_bset(r8a66597, XCKE, SYSCFG0);
597
598 msleep(3);
599
600 r8a66597_bset(r8a66597, PLLC, SYSCFG0);
601
602 msleep(1);
603
604 r8a66597_bset(r8a66597, SCKE, SYSCFG0);
605
606 r8a66597_bset(r8a66597, irq_sense, INTENB1);
607 r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR,
608 DMA0CFG);
609 }
610}
611
612static void disable_controller(struct r8a66597 *r8a66597)
613{
614 if (r8a66597->pdata->on_chip) {
615 r8a66597_bset(r8a66597, SCKE, SYSCFG0);
616
617 /* disable interrupts */
618 r8a66597_write(r8a66597, 0, INTENB0);
619 r8a66597_write(r8a66597, 0, INTENB1);
620 r8a66597_write(r8a66597, 0, BRDYENB);
621 r8a66597_write(r8a66597, 0, BEMPENB);
622 r8a66597_write(r8a66597, 0, NRDYENB);
623
624 /* clear status */
625 r8a66597_write(r8a66597, 0, BRDYSTS);
626 r8a66597_write(r8a66597, 0, NRDYSTS);
627 r8a66597_write(r8a66597, 0, BEMPSTS);
628
629 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
630 r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
631
632 } else {
633 r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
634 udelay(1);
635 r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
636 udelay(1);
637 udelay(1);
638 r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
639 }
640}
641
642static void r8a66597_start_xclock(struct r8a66597 *r8a66597)
643{
644 u16 tmp;
645
646 if (!r8a66597->pdata->on_chip) {
647 tmp = r8a66597_read(r8a66597, SYSCFG0);
648 if (!(tmp & XCKE))
649 r8a66597_bset(r8a66597, XCKE, SYSCFG0);
650 }
651}
652
653static struct r8a66597_request *get_request_from_ep(struct r8a66597_ep *ep)
654{
655 return list_entry(ep->queue.next, struct r8a66597_request, queue);
656}
657
658/*-------------------------------------------------------------------------*/
659static void transfer_complete(struct r8a66597_ep *ep,
660 struct r8a66597_request *req, int status)
661__releases(r8a66597->lock)
662__acquires(r8a66597->lock)
663{
664 int restart = 0;
665
666 if (unlikely(ep->pipenum == 0)) {
667 if (ep->internal_ccpl) {
668 ep->internal_ccpl = 0;
669 return;
670 }
671 }
672
673 list_del_init(&req->queue);
674 if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
675 req->req.status = -ESHUTDOWN;
676 else
677 req->req.status = status;
678
679 if (!list_empty(&ep->queue))
680 restart = 1;
681
682 spin_unlock(&ep->r8a66597->lock);
683 req->req.complete(&ep->ep, &req->req);
684 spin_lock(&ep->r8a66597->lock);
685
686 if (restart) {
687 req = get_request_from_ep(ep);
688 if (ep->desc)
689 start_packet(ep, req);
690 }
691}
692
693static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req)
694{
695 int i;
696 u16 tmp;
697 unsigned bufsize;
698 size_t size;
699 void *buf;
700 u16 pipenum = ep->pipenum;
701 struct r8a66597 *r8a66597 = ep->r8a66597;
702
703 pipe_change(r8a66597, pipenum);
704 r8a66597_bset(r8a66597, ISEL, ep->fifosel);
705
706 i = 0;
707 do {
708 tmp = r8a66597_read(r8a66597, ep->fifoctr);
709 if (i++ > 100000) {
710 printk(KERN_ERR "pipe0 is busy. maybe cpu i/o bus"
711 "conflict. please power off this controller.");
712 return;
713 }
714 ndelay(1);
715 } while ((tmp & FRDY) == 0);
716
717 /* prepare parameters */
718 bufsize = get_buffer_size(r8a66597, pipenum);
719 buf = req->req.buf + req->req.actual;
720 size = min(bufsize, req->req.length - req->req.actual);
721
722 /* write fifo */
723 if (req->req.buf) {
724 if (size > 0)
725 r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size);
726 if ((size == 0) || ((size % ep->ep.maxpacket) != 0))
727 r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
728 }
729
730 /* update parameters */
731 req->req.actual += size;
732
733 /* check transfer finish */
734 if ((!req->req.zero && (req->req.actual == req->req.length))
735 || (size % ep->ep.maxpacket)
736 || (size == 0)) {
737 disable_irq_ready(r8a66597, pipenum);
738 disable_irq_empty(r8a66597, pipenum);
739 } else {
740 disable_irq_ready(r8a66597, pipenum);
741 enable_irq_empty(r8a66597, pipenum);
742 }
743 pipe_start(r8a66597, pipenum);
744}
745
746static void irq_packet_write(struct r8a66597_ep *ep,
747 struct r8a66597_request *req)
748{
749 u16 tmp;
750 unsigned bufsize;
751 size_t size;
752 void *buf;
753 u16 pipenum = ep->pipenum;
754 struct r8a66597 *r8a66597 = ep->r8a66597;
755
756 pipe_change(r8a66597, pipenum);
757 tmp = r8a66597_read(r8a66597, ep->fifoctr);
758 if (unlikely((tmp & FRDY) == 0)) {
759 pipe_stop(r8a66597, pipenum);
760 pipe_irq_disable(r8a66597, pipenum);
761 printk(KERN_ERR "write fifo not ready. pipnum=%d\n", pipenum);
762 return;
763 }
764
765 /* prepare parameters */
766 bufsize = get_buffer_size(r8a66597, pipenum);
767 buf = req->req.buf + req->req.actual;
768 size = min(bufsize, req->req.length - req->req.actual);
769
770 /* write fifo */
771 if (req->req.buf) {
772 r8a66597_write_fifo(r8a66597, ep->fifoaddr, buf, size);
773 if ((size == 0)
774 || ((size % ep->ep.maxpacket) != 0)
775 || ((bufsize != ep->ep.maxpacket)
776 && (bufsize > size)))
777 r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
778 }
779
780 /* update parameters */
781 req->req.actual += size;
782 /* check transfer finish */
783 if ((!req->req.zero && (req->req.actual == req->req.length))
784 || (size % ep->ep.maxpacket)
785 || (size == 0)) {
786 disable_irq_ready(r8a66597, pipenum);
787 enable_irq_empty(r8a66597, pipenum);
788 } else {
789 disable_irq_empty(r8a66597, pipenum);
790 pipe_irq_enable(r8a66597, pipenum);
791 }
792}
793
794static void irq_packet_read(struct r8a66597_ep *ep,
795 struct r8a66597_request *req)
796{
797 u16 tmp;
798 int rcv_len, bufsize, req_len;
799 int size;
800 void *buf;
801 u16 pipenum = ep->pipenum;
802 struct r8a66597 *r8a66597 = ep->r8a66597;
803 int finish = 0;
804
805 pipe_change(r8a66597, pipenum);
806 tmp = r8a66597_read(r8a66597, ep->fifoctr);
807 if (unlikely((tmp & FRDY) == 0)) {
808 req->req.status = -EPIPE;
809 pipe_stop(r8a66597, pipenum);
810 pipe_irq_disable(r8a66597, pipenum);
811 printk(KERN_ERR "read fifo not ready");
812 return;
813 }
814
815 /* prepare parameters */
816 rcv_len = tmp & DTLN;
817 bufsize = get_buffer_size(r8a66597, pipenum);
818
819 buf = req->req.buf + req->req.actual;
820 req_len = req->req.length - req->req.actual;
821 if (rcv_len < bufsize)
822 size = min(rcv_len, req_len);
823 else
824 size = min(bufsize, req_len);
825
826 /* update parameters */
827 req->req.actual += size;
828
829 /* check transfer finish */
830 if ((!req->req.zero && (req->req.actual == req->req.length))
831 || (size % ep->ep.maxpacket)
832 || (size == 0)) {
833 pipe_stop(r8a66597, pipenum);
834 pipe_irq_disable(r8a66597, pipenum);
835 finish = 1;
836 }
837
838 /* read fifo */
839 if (req->req.buf) {
840 if (size == 0)
841 r8a66597_write(r8a66597, BCLR, ep->fifoctr);
842 else
843 r8a66597_read_fifo(r8a66597, ep->fifoaddr, buf, size);
844
845 }
846
847 if ((ep->pipenum != 0) && finish)
848 transfer_complete(ep, req, 0);
849}
850
851static void irq_pipe_ready(struct r8a66597 *r8a66597, u16 status, u16 enb)
852{
853 u16 check;
854 u16 pipenum;
855 struct r8a66597_ep *ep;
856 struct r8a66597_request *req;
857
858 if ((status & BRDY0) && (enb & BRDY0)) {
859 r8a66597_write(r8a66597, ~BRDY0, BRDYSTS);
860 r8a66597_mdfy(r8a66597, 0, CURPIPE, CFIFOSEL);
861
862 ep = &r8a66597->ep[0];
863 req = get_request_from_ep(ep);
864 irq_packet_read(ep, req);
865 } else {
866 for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
867 check = 1 << pipenum;
868 if ((status & check) && (enb & check)) {
869 r8a66597_write(r8a66597, ~check, BRDYSTS);
870 ep = r8a66597->pipenum2ep[pipenum];
871 req = get_request_from_ep(ep);
872 if (ep->desc->bEndpointAddress & USB_DIR_IN)
873 irq_packet_write(ep, req);
874 else
875 irq_packet_read(ep, req);
876 }
877 }
878 }
879}
880
881static void irq_pipe_empty(struct r8a66597 *r8a66597, u16 status, u16 enb)
882{
883 u16 tmp;
884 u16 check;
885 u16 pipenum;
886 struct r8a66597_ep *ep;
887 struct r8a66597_request *req;
888
889 if ((status & BEMP0) && (enb & BEMP0)) {
890 r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
891
892 ep = &r8a66597->ep[0];
893 req = get_request_from_ep(ep);
894 irq_ep0_write(ep, req);
895 } else {
896 for (pipenum = 1; pipenum < R8A66597_MAX_NUM_PIPE; pipenum++) {
897 check = 1 << pipenum;
898 if ((status & check) && (enb & check)) {
899 r8a66597_write(r8a66597, ~check, BEMPSTS);
900 tmp = control_reg_get(r8a66597, pipenum);
901 if ((tmp & INBUFM) == 0) {
902 disable_irq_empty(r8a66597, pipenum);
903 pipe_irq_disable(r8a66597, pipenum);
904 pipe_stop(r8a66597, pipenum);
905 ep = r8a66597->pipenum2ep[pipenum];
906 req = get_request_from_ep(ep);
907 if (!list_empty(&ep->queue))
908 transfer_complete(ep, req, 0);
909 }
910 }
911 }
912 }
913}
914
915static void get_status(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl)
916__releases(r8a66597->lock)
917__acquires(r8a66597->lock)
918{
919 struct r8a66597_ep *ep;
920 u16 pid;
921 u16 status = 0;
922 u16 w_index = le16_to_cpu(ctrl->wIndex);
923
924 switch (ctrl->bRequestType & USB_RECIP_MASK) {
925 case USB_RECIP_DEVICE:
926 status = 1 << USB_DEVICE_SELF_POWERED;
927 break;
928 case USB_RECIP_INTERFACE:
929 status = 0;
930 break;
931 case USB_RECIP_ENDPOINT:
932 ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
933 pid = control_reg_get_pid(r8a66597, ep->pipenum);
934 if (pid == PID_STALL)
935 status = 1 << USB_ENDPOINT_HALT;
936 else
937 status = 0;
938 break;
939 default:
940 pipe_stall(r8a66597, 0);
941 return; /* exit */
942 }
943
944 r8a66597->ep0_data = cpu_to_le16(status);
945 r8a66597->ep0_req->buf = &r8a66597->ep0_data;
946 r8a66597->ep0_req->length = 2;
947 /* AV: what happens if we get called again before that gets through? */
948 spin_unlock(&r8a66597->lock);
949 r8a66597_queue(r8a66597->gadget.ep0, r8a66597->ep0_req, GFP_KERNEL);
950 spin_lock(&r8a66597->lock);
951}
952
953static void clear_feature(struct r8a66597 *r8a66597,
954 struct usb_ctrlrequest *ctrl)
955{
956 switch (ctrl->bRequestType & USB_RECIP_MASK) {
957 case USB_RECIP_DEVICE:
958 control_end(r8a66597, 1);
959 break;
960 case USB_RECIP_INTERFACE:
961 control_end(r8a66597, 1);
962 break;
963 case USB_RECIP_ENDPOINT: {
964 struct r8a66597_ep *ep;
965 struct r8a66597_request *req;
966 u16 w_index = le16_to_cpu(ctrl->wIndex);
967
968 ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
969 if (!ep->wedge) {
970 pipe_stop(r8a66597, ep->pipenum);
971 control_reg_sqclr(r8a66597, ep->pipenum);
972 spin_unlock(&r8a66597->lock);
973 usb_ep_clear_halt(&ep->ep);
974 spin_lock(&r8a66597->lock);
975 }
976
977 control_end(r8a66597, 1);
978
979 req = get_request_from_ep(ep);
980 if (ep->busy) {
981 ep->busy = 0;
982 if (list_empty(&ep->queue))
983 break;
984 start_packet(ep, req);
985 } else if (!list_empty(&ep->queue))
986 pipe_start(r8a66597, ep->pipenum);
987 }
988 break;
989 default:
990 pipe_stall(r8a66597, 0);
991 break;
992 }
993}
994
995static void set_feature(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl)
996{
997
998 switch (ctrl->bRequestType & USB_RECIP_MASK) {
999 case USB_RECIP_DEVICE:
1000 control_end(r8a66597, 1);
1001 break;
1002 case USB_RECIP_INTERFACE:
1003 control_end(r8a66597, 1);
1004 break;
1005 case USB_RECIP_ENDPOINT: {
1006 struct r8a66597_ep *ep;
1007 u16 w_index = le16_to_cpu(ctrl->wIndex);
1008
1009 ep = r8a66597->epaddr2ep[w_index & USB_ENDPOINT_NUMBER_MASK];
1010 pipe_stall(r8a66597, ep->pipenum);
1011
1012 control_end(r8a66597, 1);
1013 }
1014 break;
1015 default:
1016 pipe_stall(r8a66597, 0);
1017 break;
1018 }
1019}
1020
1021/* if return value is true, call class driver's setup() */
1022static int setup_packet(struct r8a66597 *r8a66597, struct usb_ctrlrequest *ctrl)
1023{
1024 u16 *p = (u16 *)ctrl;
1025 unsigned long offset = USBREQ;
1026 int i, ret = 0;
1027
1028 /* read fifo */
1029 r8a66597_write(r8a66597, ~VALID, INTSTS0);
1030
1031 for (i = 0; i < 4; i++)
1032 p[i] = r8a66597_read(r8a66597, offset + i*2);
1033
1034 /* check request */
1035 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1036 switch (ctrl->bRequest) {
1037 case USB_REQ_GET_STATUS:
1038 get_status(r8a66597, ctrl);
1039 break;
1040 case USB_REQ_CLEAR_FEATURE:
1041 clear_feature(r8a66597, ctrl);
1042 break;
1043 case USB_REQ_SET_FEATURE:
1044 set_feature(r8a66597, ctrl);
1045 break;
1046 default:
1047 ret = 1;
1048 break;
1049 }
1050 } else
1051 ret = 1;
1052 return ret;
1053}
1054
1055static void r8a66597_update_usb_speed(struct r8a66597 *r8a66597)
1056{
1057 u16 speed = get_usb_speed(r8a66597);
1058
1059 switch (speed) {
1060 case HSMODE:
1061 r8a66597->gadget.speed = USB_SPEED_HIGH;
1062 break;
1063 case FSMODE:
1064 r8a66597->gadget.speed = USB_SPEED_FULL;
1065 break;
1066 default:
1067 r8a66597->gadget.speed = USB_SPEED_UNKNOWN;
1068 printk(KERN_ERR "USB speed unknown\n");
1069 }
1070}
1071
1072static void irq_device_state(struct r8a66597 *r8a66597)
1073{
1074 u16 dvsq;
1075
1076 dvsq = r8a66597_read(r8a66597, INTSTS0) & DVSQ;
1077 r8a66597_write(r8a66597, ~DVST, INTSTS0);
1078
1079 if (dvsq == DS_DFLT) {
1080 /* bus reset */
1081 r8a66597->driver->disconnect(&r8a66597->gadget);
1082 r8a66597_update_usb_speed(r8a66597);
1083 }
1084 if (r8a66597->old_dvsq == DS_CNFG && dvsq != DS_CNFG)
1085 r8a66597_update_usb_speed(r8a66597);
1086 if ((dvsq == DS_CNFG || dvsq == DS_ADDS)
1087 && r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
1088 r8a66597_update_usb_speed(r8a66597);
1089
1090 r8a66597->old_dvsq = dvsq;
1091}
1092
1093static void irq_control_stage(struct r8a66597 *r8a66597)
1094__releases(r8a66597->lock)
1095__acquires(r8a66597->lock)
1096{
1097 struct usb_ctrlrequest ctrl;
1098 u16 ctsq;
1099
1100 ctsq = r8a66597_read(r8a66597, INTSTS0) & CTSQ;
1101 r8a66597_write(r8a66597, ~CTRT, INTSTS0);
1102
1103 switch (ctsq) {
1104 case CS_IDST: {
1105 struct r8a66597_ep *ep;
1106 struct r8a66597_request *req;
1107 ep = &r8a66597->ep[0];
1108 req = get_request_from_ep(ep);
1109 transfer_complete(ep, req, 0);
1110 }
1111 break;
1112
1113 case CS_RDDS:
1114 case CS_WRDS:
1115 case CS_WRND:
1116 if (setup_packet(r8a66597, &ctrl)) {
1117 spin_unlock(&r8a66597->lock);
1118 if (r8a66597->driver->setup(&r8a66597->gadget, &ctrl)
1119 < 0)
1120 pipe_stall(r8a66597, 0);
1121 spin_lock(&r8a66597->lock);
1122 }
1123 break;
1124 case CS_RDSS:
1125 case CS_WRSS:
1126 control_end(r8a66597, 0);
1127 break;
1128 default:
1129 printk(KERN_ERR "ctrl_stage: unexpect ctsq(%x)\n", ctsq);
1130 break;
1131 }
1132}
1133
1134static irqreturn_t r8a66597_irq(int irq, void *_r8a66597)
1135{
1136 struct r8a66597 *r8a66597 = _r8a66597;
1137 u16 intsts0;
1138 u16 intenb0;
1139 u16 brdysts, nrdysts, bempsts;
1140 u16 brdyenb, nrdyenb, bempenb;
1141 u16 savepipe;
1142 u16 mask0;
1143
1144 spin_lock(&r8a66597->lock);
1145
1146 intsts0 = r8a66597_read(r8a66597, INTSTS0);
1147 intenb0 = r8a66597_read(r8a66597, INTENB0);
1148
1149 savepipe = r8a66597_read(r8a66597, CFIFOSEL);
1150
1151 mask0 = intsts0 & intenb0;
1152 if (mask0) {
1153 brdysts = r8a66597_read(r8a66597, BRDYSTS);
1154 nrdysts = r8a66597_read(r8a66597, NRDYSTS);
1155 bempsts = r8a66597_read(r8a66597, BEMPSTS);
1156 brdyenb = r8a66597_read(r8a66597, BRDYENB);
1157 nrdyenb = r8a66597_read(r8a66597, NRDYENB);
1158 bempenb = r8a66597_read(r8a66597, BEMPENB);
1159
1160 if (mask0 & VBINT) {
1161 r8a66597_write(r8a66597, 0xffff & ~VBINT,
1162 INTSTS0);
1163 r8a66597_start_xclock(r8a66597);
1164
1165 /* start vbus sampling */
1166 r8a66597->old_vbus = r8a66597_read(r8a66597, INTSTS0)
1167 & VBSTS;
1168 r8a66597->scount = R8A66597_MAX_SAMPLING;
1169
1170 mod_timer(&r8a66597->timer,
1171 jiffies + msecs_to_jiffies(50));
1172 }
1173 if (intsts0 & DVSQ)
1174 irq_device_state(r8a66597);
1175
1176 if ((intsts0 & BRDY) && (intenb0 & BRDYE)
1177 && (brdysts & brdyenb))
1178 irq_pipe_ready(r8a66597, brdysts, brdyenb);
1179 if ((intsts0 & BEMP) && (intenb0 & BEMPE)
1180 && (bempsts & bempenb))
1181 irq_pipe_empty(r8a66597, bempsts, bempenb);
1182
1183 if (intsts0 & CTRT)
1184 irq_control_stage(r8a66597);
1185 }
1186
1187 r8a66597_write(r8a66597, savepipe, CFIFOSEL);
1188
1189 spin_unlock(&r8a66597->lock);
1190 return IRQ_HANDLED;
1191}
1192
1193static void r8a66597_timer(unsigned long _r8a66597)
1194{
1195 struct r8a66597 *r8a66597 = (struct r8a66597 *)_r8a66597;
1196 unsigned long flags;
1197 u16 tmp;
1198
1199 spin_lock_irqsave(&r8a66597->lock, flags);
1200 tmp = r8a66597_read(r8a66597, SYSCFG0);
1201 if (r8a66597->scount > 0) {
1202 tmp = r8a66597_read(r8a66597, INTSTS0) & VBSTS;
1203 if (tmp == r8a66597->old_vbus) {
1204 r8a66597->scount--;
1205 if (r8a66597->scount == 0) {
1206 if (tmp == VBSTS)
1207 r8a66597_usb_connect(r8a66597);
1208 else
1209 r8a66597_usb_disconnect(r8a66597);
1210 } else {
1211 mod_timer(&r8a66597->timer,
1212 jiffies + msecs_to_jiffies(50));
1213 }
1214 } else {
1215 r8a66597->scount = R8A66597_MAX_SAMPLING;
1216 r8a66597->old_vbus = tmp;
1217 mod_timer(&r8a66597->timer,
1218 jiffies + msecs_to_jiffies(50));
1219 }
1220 }
1221 spin_unlock_irqrestore(&r8a66597->lock, flags);
1222}
1223
1224/*-------------------------------------------------------------------------*/
1225static int r8a66597_enable(struct usb_ep *_ep,
1226 const struct usb_endpoint_descriptor *desc)
1227{
1228 struct r8a66597_ep *ep;
1229
1230 ep = container_of(_ep, struct r8a66597_ep, ep);
1231 return alloc_pipe_config(ep, desc);
1232}
1233
1234static int r8a66597_disable(struct usb_ep *_ep)
1235{
1236 struct r8a66597_ep *ep;
1237 struct r8a66597_request *req;
1238 unsigned long flags;
1239
1240 ep = container_of(_ep, struct r8a66597_ep, ep);
1241 BUG_ON(!ep);
1242
1243 while (!list_empty(&ep->queue)) {
1244 req = get_request_from_ep(ep);
1245 spin_lock_irqsave(&ep->r8a66597->lock, flags);
1246 transfer_complete(ep, req, -ECONNRESET);
1247 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1248 }
1249
1250 pipe_irq_disable(ep->r8a66597, ep->pipenum);
1251 return free_pipe_config(ep);
1252}
1253
1254static struct usb_request *r8a66597_alloc_request(struct usb_ep *_ep,
1255 gfp_t gfp_flags)
1256{
1257 struct r8a66597_request *req;
1258
1259 req = kzalloc(sizeof(struct r8a66597_request), gfp_flags);
1260 if (!req)
1261 return NULL;
1262
1263 INIT_LIST_HEAD(&req->queue);
1264
1265 return &req->req;
1266}
1267
1268static void r8a66597_free_request(struct usb_ep *_ep, struct usb_request *_req)
1269{
1270 struct r8a66597_request *req;
1271
1272 req = container_of(_req, struct r8a66597_request, req);
1273 kfree(req);
1274}
1275
1276static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req,
1277 gfp_t gfp_flags)
1278{
1279 struct r8a66597_ep *ep;
1280 struct r8a66597_request *req;
1281 unsigned long flags;
1282 int request = 0;
1283
1284 ep = container_of(_ep, struct r8a66597_ep, ep);
1285 req = container_of(_req, struct r8a66597_request, req);
1286
1287 if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
1288 return -ESHUTDOWN;
1289
1290 spin_lock_irqsave(&ep->r8a66597->lock, flags);
1291
1292 if (list_empty(&ep->queue))
1293 request = 1;
1294
1295 list_add_tail(&req->queue, &ep->queue);
1296 req->req.actual = 0;
1297 req->req.status = -EINPROGRESS;
1298
1299 if (ep->desc == NULL) /* control */
1300 start_ep0(ep, req);
1301 else {
1302 if (request && !ep->busy)
1303 start_packet(ep, req);
1304 }
1305
1306 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1307
1308 return 0;
1309}
1310
1311static int r8a66597_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1312{
1313 struct r8a66597_ep *ep;
1314 struct r8a66597_request *req;
1315 unsigned long flags;
1316
1317 ep = container_of(_ep, struct r8a66597_ep, ep);
1318 req = container_of(_req, struct r8a66597_request, req);
1319
1320 spin_lock_irqsave(&ep->r8a66597->lock, flags);
1321 if (!list_empty(&ep->queue))
1322 transfer_complete(ep, req, -ECONNRESET);
1323 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1324
1325 return 0;
1326}
1327
1328static int r8a66597_set_halt(struct usb_ep *_ep, int value)
1329{
1330 struct r8a66597_ep *ep;
1331 struct r8a66597_request *req;
1332 unsigned long flags;
1333 int ret = 0;
1334
1335 ep = container_of(_ep, struct r8a66597_ep, ep);
1336 req = get_request_from_ep(ep);
1337
1338 spin_lock_irqsave(&ep->r8a66597->lock, flags);
1339 if (!list_empty(&ep->queue)) {
1340 ret = -EAGAIN;
1341 goto out;
1342 }
1343 if (value) {
1344 ep->busy = 1;
1345 pipe_stall(ep->r8a66597, ep->pipenum);
1346 } else {
1347 ep->busy = 0;
1348 ep->wedge = 0;
1349 pipe_stop(ep->r8a66597, ep->pipenum);
1350 }
1351
1352out:
1353 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1354 return ret;
1355}
1356
1357static int r8a66597_set_wedge(struct usb_ep *_ep)
1358{
1359 struct r8a66597_ep *ep;
1360 unsigned long flags;
1361
1362 ep = container_of(_ep, struct r8a66597_ep, ep);
1363
1364 if (!ep || !ep->desc)
1365 return -EINVAL;
1366
1367 spin_lock_irqsave(&ep->r8a66597->lock, flags);
1368 ep->wedge = 1;
1369 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1370
1371 return usb_ep_set_halt(_ep);
1372}
1373
1374static void r8a66597_fifo_flush(struct usb_ep *_ep)
1375{
1376 struct r8a66597_ep *ep;
1377 unsigned long flags;
1378
1379 ep = container_of(_ep, struct r8a66597_ep, ep);
1380 spin_lock_irqsave(&ep->r8a66597->lock, flags);
1381 if (list_empty(&ep->queue) && !ep->busy) {
1382 pipe_stop(ep->r8a66597, ep->pipenum);
1383 r8a66597_bclr(ep->r8a66597, BCLR, ep->fifoctr);
1384 }
1385 spin_unlock_irqrestore(&ep->r8a66597->lock, flags);
1386}
1387
1388static struct usb_ep_ops r8a66597_ep_ops = {
1389 .enable = r8a66597_enable,
1390 .disable = r8a66597_disable,
1391
1392 .alloc_request = r8a66597_alloc_request,
1393 .free_request = r8a66597_free_request,
1394
1395 .queue = r8a66597_queue,
1396 .dequeue = r8a66597_dequeue,
1397
1398 .set_halt = r8a66597_set_halt,
1399 .set_wedge = r8a66597_set_wedge,
1400 .fifo_flush = r8a66597_fifo_flush,
1401};
1402
1403/*-------------------------------------------------------------------------*/
1404static struct r8a66597 *the_controller;
1405
1406int usb_gadget_register_driver(struct usb_gadget_driver *driver)
1407{
1408 struct r8a66597 *r8a66597 = the_controller;
1409 int retval;
1410
1411 if (!driver
1412 || driver->speed != USB_SPEED_HIGH
1413 || !driver->bind
1414 || !driver->setup)
1415 return -EINVAL;
1416 if (!r8a66597)
1417 return -ENODEV;
1418 if (r8a66597->driver)
1419 return -EBUSY;
1420
1421 /* hook up the driver */
1422 driver->driver.bus = NULL;
1423 r8a66597->driver = driver;
1424 r8a66597->gadget.dev.driver = &driver->driver;
1425
1426 retval = device_add(&r8a66597->gadget.dev);
1427 if (retval) {
1428 printk(KERN_ERR "device_add error (%d)\n", retval);
1429 goto error;
1430 }
1431
1432 retval = driver->bind(&r8a66597->gadget);
1433 if (retval) {
1434 printk(KERN_ERR "bind to driver error (%d)\n", retval);
1435 device_del(&r8a66597->gadget.dev);
1436 goto error;
1437 }
1438
1439 r8a66597_bset(r8a66597, VBSE, INTENB0);
1440 if (r8a66597_read(r8a66597, INTSTS0) & VBSTS) {
1441 r8a66597_start_xclock(r8a66597);
1442 /* start vbus sampling */
1443 r8a66597->old_vbus = r8a66597_read(r8a66597,
1444 INTSTS0) & VBSTS;
1445 r8a66597->scount = R8A66597_MAX_SAMPLING;
1446 mod_timer(&r8a66597->timer, jiffies + msecs_to_jiffies(50));
1447 }
1448
1449 return 0;
1450
1451error:
1452 r8a66597->driver = NULL;
1453 r8a66597->gadget.dev.driver = NULL;
1454
1455 return retval;
1456}
1457EXPORT_SYMBOL(usb_gadget_register_driver);
1458
1459int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
1460{
1461 struct r8a66597 *r8a66597 = the_controller;
1462 unsigned long flags;
1463
1464 if (driver != r8a66597->driver || !driver->unbind)
1465 return -EINVAL;
1466
1467 spin_lock_irqsave(&r8a66597->lock, flags);
1468 if (r8a66597->gadget.speed != USB_SPEED_UNKNOWN)
1469 r8a66597_usb_disconnect(r8a66597);
1470 spin_unlock_irqrestore(&r8a66597->lock, flags);
1471
1472 r8a66597_bclr(r8a66597, VBSE, INTENB0);
1473
1474 driver->unbind(&r8a66597->gadget);
1475
1476 init_controller(r8a66597);
1477 disable_controller(r8a66597);
1478
1479 device_del(&r8a66597->gadget.dev);
1480 r8a66597->driver = NULL;
1481 return 0;
1482}
1483EXPORT_SYMBOL(usb_gadget_unregister_driver);
1484
1485/*-------------------------------------------------------------------------*/
1486static int r8a66597_get_frame(struct usb_gadget *_gadget)
1487{
1488 struct r8a66597 *r8a66597 = gadget_to_r8a66597(_gadget);
1489 return r8a66597_read(r8a66597, FRMNUM) & 0x03FF;
1490}
1491
1492static struct usb_gadget_ops r8a66597_gadget_ops = {
1493 .get_frame = r8a66597_get_frame,
1494};
1495
1496static int __exit r8a66597_remove(struct platform_device *pdev)
1497{
1498 struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev);
1499
1500 del_timer_sync(&r8a66597->timer);
1501 iounmap((void *)r8a66597->reg);
1502 free_irq(platform_get_irq(pdev, 0), r8a66597);
1503 r8a66597_free_request(&r8a66597->ep[0].ep, r8a66597->ep0_req);
1504#ifdef CONFIG_HAVE_CLK
1505 if (r8a66597->pdata->on_chip) {
1506 clk_disable(r8a66597->clk);
1507 clk_put(r8a66597->clk);
1508 }
1509#endif
1510 kfree(r8a66597);
1511 return 0;
1512}
1513
1514static void nop_completion(struct usb_ep *ep, struct usb_request *r)
1515{
1516}
1517
1518static int __init r8a66597_probe(struct platform_device *pdev)
1519{
1520#ifdef CONFIG_HAVE_CLK
1521 char clk_name[8];
1522#endif
1523 struct resource *res, *ires;
1524 int irq;
1525 void __iomem *reg = NULL;
1526 struct r8a66597 *r8a66597 = NULL;
1527 int ret = 0;
1528 int i;
1529 unsigned long irq_trigger;
1530
1531 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1532 if (!res) {
1533 ret = -ENODEV;
1534 printk(KERN_ERR "platform_get_resource error.\n");
1535 goto clean_up;
1536 }
1537
1538 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1539 irq = ires->start;
1540 irq_trigger = ires->flags & IRQF_TRIGGER_MASK;
1541
1542 if (irq < 0) {
1543 ret = -ENODEV;
1544 printk(KERN_ERR "platform_get_irq error.\n");
1545 goto clean_up;
1546 }
1547
1548 reg = ioremap(res->start, resource_size(res));
1549 if (reg == NULL) {
1550 ret = -ENOMEM;
1551 printk(KERN_ERR "ioremap error.\n");
1552 goto clean_up;
1553 }
1554
1555 /* initialize ucd */
1556 r8a66597 = kzalloc(sizeof(struct r8a66597), GFP_KERNEL);
1557 if (r8a66597 == NULL) {
1558 printk(KERN_ERR "kzalloc error\n");
1559 goto clean_up;
1560 }
1561
1562 spin_lock_init(&r8a66597->lock);
1563 dev_set_drvdata(&pdev->dev, r8a66597);
1564 r8a66597->pdata = pdev->dev.platform_data;
1565 r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW;
1566
1567 r8a66597->gadget.ops = &r8a66597_gadget_ops;
1568 device_initialize(&r8a66597->gadget.dev);
1569 dev_set_name(&r8a66597->gadget.dev, "gadget");
1570 r8a66597->gadget.is_dualspeed = 1;
1571 r8a66597->gadget.dev.parent = &pdev->dev;
1572 r8a66597->gadget.dev.dma_mask = pdev->dev.dma_mask;
1573 r8a66597->gadget.dev.release = pdev->dev.release;
1574 r8a66597->gadget.name = udc_name;
1575
1576 init_timer(&r8a66597->timer);
1577 r8a66597->timer.function = r8a66597_timer;
1578 r8a66597->timer.data = (unsigned long)r8a66597;
1579 r8a66597->reg = (unsigned long)reg;
1580
1581#ifdef CONFIG_HAVE_CLK
1582 if (r8a66597->pdata->on_chip) {
1583 snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id);
1584 r8a66597->clk = clk_get(&pdev->dev, clk_name);
1585 if (IS_ERR(r8a66597->clk)) {
1586 dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
1587 clk_name);
1588 ret = PTR_ERR(r8a66597->clk);
1589 goto clean_up;
1590 }
1591 clk_enable(r8a66597->clk);
1592 }
1593#endif
1594
1595 disable_controller(r8a66597); /* make sure controller is disabled */
1596
1597 ret = request_irq(irq, r8a66597_irq, IRQF_DISABLED | IRQF_SHARED,
1598 udc_name, r8a66597);
1599 if (ret < 0) {
1600 printk(KERN_ERR "request_irq error (%d)\n", ret);
1601 goto clean_up2;
1602 }
1603
1604 INIT_LIST_HEAD(&r8a66597->gadget.ep_list);
1605 r8a66597->gadget.ep0 = &r8a66597->ep[0].ep;
1606 INIT_LIST_HEAD(&r8a66597->gadget.ep0->ep_list);
1607 for (i = 0; i < R8A66597_MAX_NUM_PIPE; i++) {
1608 struct r8a66597_ep *ep = &r8a66597->ep[i];
1609
1610 if (i != 0) {
1611 INIT_LIST_HEAD(&r8a66597->ep[i].ep.ep_list);
1612 list_add_tail(&r8a66597->ep[i].ep.ep_list,
1613 &r8a66597->gadget.ep_list);
1614 }
1615 ep->r8a66597 = r8a66597;
1616 INIT_LIST_HEAD(&ep->queue);
1617 ep->ep.name = r8a66597_ep_name[i];
1618 ep->ep.ops = &r8a66597_ep_ops;
1619 ep->ep.maxpacket = 512;
1620 }
1621 r8a66597->ep[0].ep.maxpacket = 64;
1622 r8a66597->ep[0].pipenum = 0;
1623 r8a66597->ep[0].fifoaddr = CFIFO;
1624 r8a66597->ep[0].fifosel = CFIFOSEL;
1625 r8a66597->ep[0].fifoctr = CFIFOCTR;
1626 r8a66597->ep[0].fifotrn = 0;
1627 r8a66597->ep[0].pipectr = get_pipectr_addr(0);
1628 r8a66597->pipenum2ep[0] = &r8a66597->ep[0];
1629 r8a66597->epaddr2ep[0] = &r8a66597->ep[0];
1630
1631 the_controller = r8a66597;
1632
1633 r8a66597->ep0_req = r8a66597_alloc_request(&r8a66597->ep[0].ep,
1634 GFP_KERNEL);
1635 if (r8a66597->ep0_req == NULL)
1636 goto clean_up3;
1637 r8a66597->ep0_req->complete = nop_completion;
1638
1639 init_controller(r8a66597);
1640
1641 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
1642 return 0;
1643
1644clean_up3:
1645 free_irq(irq, r8a66597);
1646clean_up2:
1647#ifdef CONFIG_HAVE_CLK
1648 if (r8a66597->pdata->on_chip) {
1649 clk_disable(r8a66597->clk);
1650 clk_put(r8a66597->clk);
1651 }
1652#endif
1653clean_up:
1654 if (r8a66597) {
1655 if (r8a66597->ep0_req)
1656 r8a66597_free_request(&r8a66597->ep[0].ep,
1657 r8a66597->ep0_req);
1658 kfree(r8a66597);
1659 }
1660 if (reg)
1661 iounmap(reg);
1662
1663 return ret;
1664}
1665
1666/*-------------------------------------------------------------------------*/
1667static struct platform_driver r8a66597_driver = {
1668 .remove = __exit_p(r8a66597_remove),
1669 .driver = {
1670 .name = (char *) udc_name,
1671 },
1672};
1673
1674static int __init r8a66597_udc_init(void)
1675{
1676 return platform_driver_probe(&r8a66597_driver, r8a66597_probe);
1677}
1678module_init(r8a66597_udc_init);
1679
1680static void __exit r8a66597_udc_cleanup(void)
1681{
1682 platform_driver_unregister(&r8a66597_driver);
1683}
1684module_exit(r8a66597_udc_cleanup);
1685
1686MODULE_DESCRIPTION("R8A66597 USB gadget driver");
1687MODULE_LICENSE("GPL");
1688MODULE_AUTHOR("Yoshihiro Shimoda");
1689
diff --git a/drivers/usb/gadget/r8a66597-udc.h b/drivers/usb/gadget/r8a66597-udc.h
new file mode 100644
index 000000000000..03087e7b9190
--- /dev/null
+++ b/drivers/usb/gadget/r8a66597-udc.h
@@ -0,0 +1,256 @@
1/*
2 * R8A66597 UDC
3 *
4 * Copyright (C) 2007-2009 Renesas Solutions Corp.
5 *
6 * Author : Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 *
21 */
22
23#ifndef __R8A66597_H__
24#define __R8A66597_H__
25
26#ifdef CONFIG_HAVE_CLK
27#include <linux/clk.h>
28#endif
29
30#include <linux/usb/r8a66597.h>
31
32#define R8A66597_MAX_SAMPLING 10
33
34#define R8A66597_MAX_NUM_PIPE 8
35#define R8A66597_MAX_NUM_BULK 3
36#define R8A66597_MAX_NUM_ISOC 2
37#define R8A66597_MAX_NUM_INT 2
38
39#define R8A66597_BASE_PIPENUM_BULK 3
40#define R8A66597_BASE_PIPENUM_ISOC 1
41#define R8A66597_BASE_PIPENUM_INT 6
42
43#define R8A66597_BASE_BUFNUM 6
44#define R8A66597_MAX_BUFNUM 0x4F
45
46#define is_bulk_pipe(pipenum) \
47 ((pipenum >= R8A66597_BASE_PIPENUM_BULK) && \
48 (pipenum < (R8A66597_BASE_PIPENUM_BULK + R8A66597_MAX_NUM_BULK)))
49#define is_interrupt_pipe(pipenum) \
50 ((pipenum >= R8A66597_BASE_PIPENUM_INT) && \
51 (pipenum < (R8A66597_BASE_PIPENUM_INT + R8A66597_MAX_NUM_INT)))
52#define is_isoc_pipe(pipenum) \
53 ((pipenum >= R8A66597_BASE_PIPENUM_ISOC) && \
54 (pipenum < (R8A66597_BASE_PIPENUM_ISOC + R8A66597_MAX_NUM_ISOC)))
55
56struct r8a66597_pipe_info {
57 u16 pipe;
58 u16 epnum;
59 u16 maxpacket;
60 u16 type;
61 u16 interval;
62 u16 dir_in;
63};
64
65struct r8a66597_request {
66 struct usb_request req;
67 struct list_head queue;
68};
69
70struct r8a66597_ep {
71 struct usb_ep ep;
72 struct r8a66597 *r8a66597;
73
74 struct list_head queue;
75 unsigned busy:1;
76 unsigned wedge:1;
77 unsigned internal_ccpl:1; /* use only control */
78
79 /* this member can able to after r8a66597_enable */
80 unsigned use_dma:1;
81 u16 pipenum;
82 u16 type;
83 const struct usb_endpoint_descriptor *desc;
84 /* register address */
85 unsigned char fifoaddr;
86 unsigned char fifosel;
87 unsigned char fifoctr;
88 unsigned char fifotrn;
89 unsigned char pipectr;
90};
91
92struct r8a66597 {
93 spinlock_t lock;
94 unsigned long reg;
95
96#ifdef CONFIG_HAVE_CLK
97 struct clk *clk;
98#endif
99 struct r8a66597_platdata *pdata;
100
101 struct usb_gadget gadget;
102 struct usb_gadget_driver *driver;
103
104 struct r8a66597_ep ep[R8A66597_MAX_NUM_PIPE];
105 struct r8a66597_ep *pipenum2ep[R8A66597_MAX_NUM_PIPE];
106 struct r8a66597_ep *epaddr2ep[16];
107
108 struct timer_list timer;
109 struct usb_request *ep0_req; /* for internal request */
110 u16 ep0_data; /* for internal request */
111 u16 old_vbus;
112 u16 scount;
113 u16 old_dvsq;
114
115 /* pipe config */
116 unsigned char bulk;
117 unsigned char interrupt;
118 unsigned char isochronous;
119 unsigned char num_dma;
120
121 unsigned irq_sense_low:1;
122};
123
124#define gadget_to_r8a66597(_gadget) \
125 container_of(_gadget, struct r8a66597, gadget)
126#define r8a66597_to_gadget(r8a66597) (&r8a66597->gadget)
127
128static inline u16 r8a66597_read(struct r8a66597 *r8a66597, unsigned long offset)
129{
130 return inw(r8a66597->reg + offset);
131}
132
133static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
134 unsigned long offset, u16 *buf,
135 int len)
136{
137 if (r8a66597->pdata->on_chip) {
138 unsigned long fifoaddr = r8a66597->reg + offset;
139 unsigned long count;
140 union {
141 unsigned long dword;
142 unsigned char byte[4];
143 } data;
144 unsigned char *pb;
145 int i;
146
147 count = len / 4;
148 insl(fifoaddr, buf, count);
149
150 if (len & 0x00000003) {
151 data.dword = inl(fifoaddr);
152 pb = (unsigned char *)buf + count * 4;
153 for (i = 0; i < (len & 0x00000003); i++)
154 pb[i] = data.byte[i];
155 }
156 } else {
157 len = (len + 1) / 2;
158 insw(r8a66597->reg + offset, buf, len);
159 }
160}
161
162static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
163 unsigned long offset)
164{
165 outw(val, r8a66597->reg + offset);
166}
167
168static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
169 unsigned long offset, u16 *buf,
170 int len)
171{
172 unsigned long fifoaddr = r8a66597->reg + offset;
173
174 if (r8a66597->pdata->on_chip) {
175 unsigned long count;
176 unsigned char *pb;
177 int i;
178
179 count = len / 4;
180 outsl(fifoaddr, buf, count);
181
182 if (len & 0x00000003) {
183 pb = (unsigned char *)buf + count * 4;
184 for (i = 0; i < (len & 0x00000003); i++) {
185 if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
186 outb(pb[i], fifoaddr + i);
187 else
188 outb(pb[i], fifoaddr + 3 - i);
189 }
190 }
191 } else {
192 int odd = len & 0x0001;
193
194 len = len / 2;
195 outsw(fifoaddr, buf, len);
196 if (unlikely(odd)) {
197 buf = &buf[len];
198 outb((unsigned char)*buf, fifoaddr);
199 }
200 }
201}
202
203static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,
204 u16 val, u16 pat, unsigned long offset)
205{
206 u16 tmp;
207 tmp = r8a66597_read(r8a66597, offset);
208 tmp = tmp & (~pat);
209 tmp = tmp | val;
210 r8a66597_write(r8a66597, tmp, offset);
211}
212
213static inline u16 get_xtal_from_pdata(struct r8a66597_platdata *pdata)
214{
215 u16 clock = 0;
216
217 switch (pdata->xtal) {
218 case R8A66597_PLATDATA_XTAL_12MHZ:
219 clock = XTAL12;
220 break;
221 case R8A66597_PLATDATA_XTAL_24MHZ:
222 clock = XTAL24;
223 break;
224 case R8A66597_PLATDATA_XTAL_48MHZ:
225 clock = XTAL48;
226 break;
227 default:
228 printk(KERN_ERR "r8a66597: platdata clock is wrong.\n");
229 break;
230 }
231
232 return clock;
233}
234
235#define r8a66597_bclr(r8a66597, val, offset) \
236 r8a66597_mdfy(r8a66597, 0, val, offset)
237#define r8a66597_bset(r8a66597, val, offset) \
238 r8a66597_mdfy(r8a66597, val, 0, offset)
239
240#define get_pipectr_addr(pipenum) (PIPE1CTR + (pipenum - 1) * 2)
241
242#define enable_irq_ready(r8a66597, pipenum) \
243 enable_pipe_irq(r8a66597, pipenum, BRDYENB)
244#define disable_irq_ready(r8a66597, pipenum) \
245 disable_pipe_irq(r8a66597, pipenum, BRDYENB)
246#define enable_irq_empty(r8a66597, pipenum) \
247 enable_pipe_irq(r8a66597, pipenum, BEMPENB)
248#define disable_irq_empty(r8a66597, pipenum) \
249 disable_pipe_irq(r8a66597, pipenum, BEMPENB)
250#define enable_irq_nrdy(r8a66597, pipenum) \
251 enable_pipe_irq(r8a66597, pipenum, NRDYENB)
252#define disable_irq_nrdy(r8a66597, pipenum) \
253 disable_pipe_irq(r8a66597, pipenum, NRDYENB)
254
255#endif /* __R8A66597_H__ */
256
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 1a920c70b5a1..f21ca7d27a43 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -336,13 +336,6 @@ config USB_R8A66597_HCD
336 To compile this driver as a module, choose M here: the 336 To compile this driver as a module, choose M here: the
337 module will be called r8a66597-hcd. 337 module will be called r8a66597-hcd.
338 338
339config SUPERH_ON_CHIP_R8A66597
340 boolean "Enable SuperH on-chip R8A66597 USB"
341 depends on USB_R8A66597_HCD && (CPU_SUBTYPE_SH7366 || CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7724)
342 help
343 This driver enables support for the on-chip R8A66597 in the
344 SH7366, SH7723 and SH7724 processors.
345
346config USB_WHCI_HCD 339config USB_WHCI_HCD
347 tristate "Wireless USB Host Controller Interface (WHCI) driver (EXPERIMENTAL)" 340 tristate "Wireless USB Host Controller Interface (WHCI) driver (EXPERIMENTAL)"
348 depends on EXPERIMENTAL 341 depends on EXPERIMENTAL
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index e18f74946e68..749b53742828 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -91,43 +91,43 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597)
91 u16 tmp; 91 u16 tmp;
92 int i = 0; 92 int i = 0;
93 93
94#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) 94 if (r8a66597->pdata->on_chip) {
95#if defined(CONFIG_HAVE_CLK) 95#ifdef CONFIG_HAVE_CLK
96 clk_enable(r8a66597->clk); 96 clk_enable(r8a66597->clk);
97#endif 97#endif
98 do { 98 do {
99 r8a66597_write(r8a66597, SCKE, SYSCFG0); 99 r8a66597_write(r8a66597, SCKE, SYSCFG0);
100 tmp = r8a66597_read(r8a66597, SYSCFG0); 100 tmp = r8a66597_read(r8a66597, SYSCFG0);
101 if (i++ > 1000) { 101 if (i++ > 1000) {
102 printk(KERN_ERR "r8a66597: register access fail.\n"); 102 printk(KERN_ERR "r8a66597: reg access fail.\n");
103 return -ENXIO; 103 return -ENXIO;
104 } 104 }
105 } while ((tmp & SCKE) != SCKE); 105 } while ((tmp & SCKE) != SCKE);
106 r8a66597_write(r8a66597, 0x04, 0x02); 106 r8a66597_write(r8a66597, 0x04, 0x02);
107#else 107 } else {
108 do { 108 do {
109 r8a66597_write(r8a66597, USBE, SYSCFG0); 109 r8a66597_write(r8a66597, USBE, SYSCFG0);
110 tmp = r8a66597_read(r8a66597, SYSCFG0); 110 tmp = r8a66597_read(r8a66597, SYSCFG0);
111 if (i++ > 1000) { 111 if (i++ > 1000) {
112 printk(KERN_ERR "r8a66597: register access fail.\n"); 112 printk(KERN_ERR "r8a66597: reg access fail.\n");
113 return -ENXIO; 113 return -ENXIO;
114 } 114 }
115 } while ((tmp & USBE) != USBE); 115 } while ((tmp & USBE) != USBE);
116 r8a66597_bclr(r8a66597, USBE, SYSCFG0); 116 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
117 r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata), XTAL, 117 r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata),
118 SYSCFG0); 118 XTAL, SYSCFG0);
119 119
120 i = 0; 120 i = 0;
121 r8a66597_bset(r8a66597, XCKE, SYSCFG0); 121 r8a66597_bset(r8a66597, XCKE, SYSCFG0);
122 do { 122 do {
123 msleep(1); 123 msleep(1);
124 tmp = r8a66597_read(r8a66597, SYSCFG0); 124 tmp = r8a66597_read(r8a66597, SYSCFG0);
125 if (i++ > 500) { 125 if (i++ > 500) {
126 printk(KERN_ERR "r8a66597: register access fail.\n"); 126 printk(KERN_ERR "r8a66597: reg access fail.\n");
127 return -ENXIO; 127 return -ENXIO;
128 } 128 }
129 } while ((tmp & SCKE) != SCKE); 129 } while ((tmp & SCKE) != SCKE);
130#endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */ 130 }
131 131
132 return 0; 132 return 0;
133} 133}
@@ -136,15 +136,16 @@ static void r8a66597_clock_disable(struct r8a66597 *r8a66597)
136{ 136{
137 r8a66597_bclr(r8a66597, SCKE, SYSCFG0); 137 r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
138 udelay(1); 138 udelay(1);
139#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) 139
140#if defined(CONFIG_HAVE_CLK) 140 if (r8a66597->pdata->on_chip) {
141 clk_disable(r8a66597->clk); 141#ifdef CONFIG_HAVE_CLK
142#endif 142 clk_disable(r8a66597->clk);
143#else
144 r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
145 r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
146 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
147#endif 143#endif
144 } else {
145 r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
146 r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
147 r8a66597_bclr(r8a66597, USBE, SYSCFG0);
148 }
148} 149}
149 150
150static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port) 151static void r8a66597_enable_port(struct r8a66597 *r8a66597, int port)
@@ -205,7 +206,7 @@ static int enable_controller(struct r8a66597 *r8a66597)
205 206
206 r8a66597_bset(r8a66597, SIGNE | SACKE, INTENB1); 207 r8a66597_bset(r8a66597, SIGNE | SACKE, INTENB1);
207 208
208 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) 209 for (port = 0; port < r8a66597->max_root_hub; port++)
209 r8a66597_enable_port(r8a66597, port); 210 r8a66597_enable_port(r8a66597, port);
210 211
211 return 0; 212 return 0;
@@ -218,7 +219,7 @@ static void disable_controller(struct r8a66597 *r8a66597)
218 r8a66597_write(r8a66597, 0, INTENB0); 219 r8a66597_write(r8a66597, 0, INTENB0);
219 r8a66597_write(r8a66597, 0, INTSTS0); 220 r8a66597_write(r8a66597, 0, INTSTS0);
220 221
221 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) 222 for (port = 0; port < r8a66597->max_root_hub; port++)
222 r8a66597_disable_port(r8a66597, port); 223 r8a66597_disable_port(r8a66597, port);
223 224
224 r8a66597_clock_disable(r8a66597); 225 r8a66597_clock_disable(r8a66597);
@@ -249,11 +250,12 @@ static int is_hub_limit(char *devpath)
249 return ((strlen(devpath) >= 4) ? 1 : 0); 250 return ((strlen(devpath) >= 4) ? 1 : 0);
250} 251}
251 252
252static void get_port_number(char *devpath, u16 *root_port, u16 *hub_port) 253static void get_port_number(struct r8a66597 *r8a66597,
254 char *devpath, u16 *root_port, u16 *hub_port)
253{ 255{
254 if (root_port) { 256 if (root_port) {
255 *root_port = (devpath[0] & 0x0F) - 1; 257 *root_port = (devpath[0] & 0x0F) - 1;
256 if (*root_port >= R8A66597_MAX_ROOT_HUB) 258 if (*root_port >= r8a66597->max_root_hub)
257 printk(KERN_ERR "r8a66597: Illegal root port number.\n"); 259 printk(KERN_ERR "r8a66597: Illegal root port number.\n");
258 } 260 }
259 if (hub_port) 261 if (hub_port)
@@ -355,7 +357,8 @@ static int make_r8a66597_device(struct r8a66597 *r8a66597,
355 INIT_LIST_HEAD(&dev->device_list); 357 INIT_LIST_HEAD(&dev->device_list);
356 list_add_tail(&dev->device_list, &r8a66597->child_device); 358 list_add_tail(&dev->device_list, &r8a66597->child_device);
357 359
358 get_port_number(urb->dev->devpath, &dev->root_port, &dev->hub_port); 360 get_port_number(r8a66597, urb->dev->devpath,
361 &dev->root_port, &dev->hub_port);
359 if (!is_child_device(urb->dev->devpath)) 362 if (!is_child_device(urb->dev->devpath))
360 r8a66597->root_hub[dev->root_port].dev = dev; 363 r8a66597->root_hub[dev->root_port].dev = dev;
361 364
@@ -420,7 +423,7 @@ static void free_usb_address(struct r8a66597 *r8a66597,
420 list_del(&dev->device_list); 423 list_del(&dev->device_list);
421 kfree(dev); 424 kfree(dev);
422 425
423 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) { 426 for (port = 0; port < r8a66597->max_root_hub; port++) {
424 if (r8a66597->root_hub[port].dev == dev) { 427 if (r8a66597->root_hub[port].dev == dev) {
425 r8a66597->root_hub[port].dev = NULL; 428 r8a66597->root_hub[port].dev = NULL;
426 break; 429 break;
@@ -495,10 +498,20 @@ static void r8a66597_pipe_toggle(struct r8a66597 *r8a66597,
495 r8a66597_bset(r8a66597, SQCLR, pipe->pipectr); 498 r8a66597_bset(r8a66597, SQCLR, pipe->pipectr);
496} 499}
497 500
501static inline unsigned short mbw_value(struct r8a66597 *r8a66597)
502{
503 if (r8a66597->pdata->on_chip)
504 return MBW_32;
505 else
506 return MBW_16;
507}
508
498/* this function must be called with interrupt disabled */ 509/* this function must be called with interrupt disabled */
499static inline void cfifo_change(struct r8a66597 *r8a66597, u16 pipenum) 510static inline void cfifo_change(struct r8a66597 *r8a66597, u16 pipenum)
500{ 511{
501 r8a66597_mdfy(r8a66597, MBW | pipenum, MBW | CURPIPE, CFIFOSEL); 512 unsigned short mbw = mbw_value(r8a66597);
513
514 r8a66597_mdfy(r8a66597, mbw | pipenum, mbw | CURPIPE, CFIFOSEL);
502 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, pipenum); 515 r8a66597_reg_wait(r8a66597, CFIFOSEL, CURPIPE, pipenum);
503} 516}
504 517
@@ -506,11 +519,13 @@ static inline void cfifo_change(struct r8a66597 *r8a66597, u16 pipenum)
506static inline void fifo_change_from_pipe(struct r8a66597 *r8a66597, 519static inline void fifo_change_from_pipe(struct r8a66597 *r8a66597,
507 struct r8a66597_pipe *pipe) 520 struct r8a66597_pipe *pipe)
508{ 521{
522 unsigned short mbw = mbw_value(r8a66597);
523
509 cfifo_change(r8a66597, 0); 524 cfifo_change(r8a66597, 0);
510 r8a66597_mdfy(r8a66597, MBW | 0, MBW | CURPIPE, D0FIFOSEL); 525 r8a66597_mdfy(r8a66597, mbw | 0, mbw | CURPIPE, D0FIFOSEL);
511 r8a66597_mdfy(r8a66597, MBW | 0, MBW | CURPIPE, D1FIFOSEL); 526 r8a66597_mdfy(r8a66597, mbw | 0, mbw | CURPIPE, D1FIFOSEL);
512 527
513 r8a66597_mdfy(r8a66597, MBW | pipe->info.pipenum, MBW | CURPIPE, 528 r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum, mbw | CURPIPE,
514 pipe->fifosel); 529 pipe->fifosel);
515 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, pipe->info.pipenum); 530 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, pipe->info.pipenum);
516} 531}
@@ -742,9 +757,13 @@ static void enable_r8a66597_pipe_dma(struct r8a66597 *r8a66597,
742 struct r8a66597_pipe *pipe, 757 struct r8a66597_pipe *pipe,
743 struct urb *urb) 758 struct urb *urb)
744{ 759{
745#if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
746 int i; 760 int i;
747 struct r8a66597_pipe_info *info = &pipe->info; 761 struct r8a66597_pipe_info *info = &pipe->info;
762 unsigned short mbw = mbw_value(r8a66597);
763
764 /* pipe dma is only for external controlles */
765 if (r8a66597->pdata->on_chip)
766 return;
748 767
749 if ((pipe->info.pipenum != 0) && (info->type != R8A66597_INT)) { 768 if ((pipe->info.pipenum != 0) && (info->type != R8A66597_INT)) {
750 for (i = 0; i < R8A66597_MAX_DMA_CHANNEL; i++) { 769 for (i = 0; i < R8A66597_MAX_DMA_CHANNEL; i++) {
@@ -763,8 +782,8 @@ static void enable_r8a66597_pipe_dma(struct r8a66597 *r8a66597,
763 set_pipe_reg_addr(pipe, i); 782 set_pipe_reg_addr(pipe, i);
764 783
765 cfifo_change(r8a66597, 0); 784 cfifo_change(r8a66597, 0);
766 r8a66597_mdfy(r8a66597, MBW | pipe->info.pipenum, 785 r8a66597_mdfy(r8a66597, mbw | pipe->info.pipenum,
767 MBW | CURPIPE, pipe->fifosel); 786 mbw | CURPIPE, pipe->fifosel);
768 787
769 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE, 788 r8a66597_reg_wait(r8a66597, pipe->fifosel, CURPIPE,
770 pipe->info.pipenum); 789 pipe->info.pipenum);
@@ -772,7 +791,6 @@ static void enable_r8a66597_pipe_dma(struct r8a66597 *r8a66597,
772 break; 791 break;
773 } 792 }
774 } 793 }
775#endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */
776} 794}
777 795
778/* this function must be called with interrupt disabled */ 796/* this function must be called with interrupt disabled */
@@ -1769,7 +1787,7 @@ static void r8a66597_timer(unsigned long _r8a66597)
1769 1787
1770 spin_lock_irqsave(&r8a66597->lock, flags); 1788 spin_lock_irqsave(&r8a66597->lock, flags);
1771 1789
1772 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) 1790 for (port = 0; port < r8a66597->max_root_hub; port++)
1773 r8a66597_root_hub_control(r8a66597, port); 1791 r8a66597_root_hub_control(r8a66597, port);
1774 1792
1775 spin_unlock_irqrestore(&r8a66597->lock, flags); 1793 spin_unlock_irqrestore(&r8a66597->lock, flags);
@@ -1807,7 +1825,7 @@ static void set_address_zero(struct r8a66597 *r8a66597, struct urb *urb)
1807 u16 root_port, hub_port; 1825 u16 root_port, hub_port;
1808 1826
1809 if (usb_address == 0) { 1827 if (usb_address == 0) {
1810 get_port_number(urb->dev->devpath, 1828 get_port_number(r8a66597, urb->dev->devpath,
1811 &root_port, &hub_port); 1829 &root_port, &hub_port);
1812 set_devadd_reg(r8a66597, 0, 1830 set_devadd_reg(r8a66597, 0,
1813 get_r8a66597_usb_speed(urb->dev->speed), 1831 get_r8a66597_usb_speed(urb->dev->speed),
@@ -2082,7 +2100,7 @@ static int r8a66597_hub_status_data(struct usb_hcd *hcd, char *buf)
2082 2100
2083 *buf = 0; /* initialize (no change) */ 2101 *buf = 0; /* initialize (no change) */
2084 2102
2085 for (i = 0; i < R8A66597_MAX_ROOT_HUB; i++) { 2103 for (i = 0; i < r8a66597->max_root_hub; i++) {
2086 if (r8a66597->root_hub[i].port & 0xffff0000) 2104 if (r8a66597->root_hub[i].port & 0xffff0000)
2087 *buf |= 1 << (i + 1); 2105 *buf |= 1 << (i + 1);
2088 } 2106 }
@@ -2097,11 +2115,11 @@ static void r8a66597_hub_descriptor(struct r8a66597 *r8a66597,
2097{ 2115{
2098 desc->bDescriptorType = 0x29; 2116 desc->bDescriptorType = 0x29;
2099 desc->bHubContrCurrent = 0; 2117 desc->bHubContrCurrent = 0;
2100 desc->bNbrPorts = R8A66597_MAX_ROOT_HUB; 2118 desc->bNbrPorts = r8a66597->max_root_hub;
2101 desc->bDescLength = 9; 2119 desc->bDescLength = 9;
2102 desc->bPwrOn2PwrGood = 0; 2120 desc->bPwrOn2PwrGood = 0;
2103 desc->wHubCharacteristics = cpu_to_le16(0x0011); 2121 desc->wHubCharacteristics = cpu_to_le16(0x0011);
2104 desc->bitmap[0] = ((1 << R8A66597_MAX_ROOT_HUB) - 1) << 1; 2122 desc->bitmap[0] = ((1 << r8a66597->max_root_hub) - 1) << 1;
2105 desc->bitmap[1] = ~0; 2123 desc->bitmap[1] = ~0;
2106} 2124}
2107 2125
@@ -2129,7 +2147,7 @@ static int r8a66597_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
2129 } 2147 }
2130 break; 2148 break;
2131 case ClearPortFeature: 2149 case ClearPortFeature:
2132 if (wIndex > R8A66597_MAX_ROOT_HUB) 2150 if (wIndex > r8a66597->max_root_hub)
2133 goto error; 2151 goto error;
2134 if (wLength != 0) 2152 if (wLength != 0)
2135 goto error; 2153 goto error;
@@ -2162,12 +2180,12 @@ static int r8a66597_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
2162 *buf = 0x00; 2180 *buf = 0x00;
2163 break; 2181 break;
2164 case GetPortStatus: 2182 case GetPortStatus:
2165 if (wIndex > R8A66597_MAX_ROOT_HUB) 2183 if (wIndex > r8a66597->max_root_hub)
2166 goto error; 2184 goto error;
2167 *(__le32 *)buf = cpu_to_le32(rh->port); 2185 *(__le32 *)buf = cpu_to_le32(rh->port);
2168 break; 2186 break;
2169 case SetPortFeature: 2187 case SetPortFeature:
2170 if (wIndex > R8A66597_MAX_ROOT_HUB) 2188 if (wIndex > r8a66597->max_root_hub)
2171 goto error; 2189 goto error;
2172 if (wLength != 0) 2190 if (wLength != 0)
2173 goto error; 2191 goto error;
@@ -2216,7 +2234,7 @@ static int r8a66597_bus_suspend(struct usb_hcd *hcd)
2216 2234
2217 dbg("%s", __func__); 2235 dbg("%s", __func__);
2218 2236
2219 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) { 2237 for (port = 0; port < r8a66597->max_root_hub; port++) {
2220 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; 2238 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2221 unsigned long dvstctr_reg = get_dvstctr_reg(port); 2239 unsigned long dvstctr_reg = get_dvstctr_reg(port);
2222 2240
@@ -2247,7 +2265,7 @@ static int r8a66597_bus_resume(struct usb_hcd *hcd)
2247 2265
2248 dbg("%s", __func__); 2266 dbg("%s", __func__);
2249 2267
2250 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) { 2268 for (port = 0; port < r8a66597->max_root_hub; port++) {
2251 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; 2269 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2252 unsigned long dvstctr_reg = get_dvstctr_reg(port); 2270 unsigned long dvstctr_reg = get_dvstctr_reg(port);
2253 2271
@@ -2305,16 +2323,16 @@ static struct hc_driver r8a66597_hc_driver = {
2305}; 2323};
2306 2324
2307#if defined(CONFIG_PM) 2325#if defined(CONFIG_PM)
2308static int r8a66597_suspend(struct platform_device *pdev, pm_message_t state) 2326static int r8a66597_suspend(struct device *dev)
2309{ 2327{
2310 struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); 2328 struct r8a66597 *r8a66597 = dev_get_drvdata(dev);
2311 int port; 2329 int port;
2312 2330
2313 dbg("%s", __func__); 2331 dbg("%s", __func__);
2314 2332
2315 disable_controller(r8a66597); 2333 disable_controller(r8a66597);
2316 2334
2317 for (port = 0; port < R8A66597_MAX_ROOT_HUB; port++) { 2335 for (port = 0; port < r8a66597->max_root_hub; port++) {
2318 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; 2336 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
2319 2337
2320 rh->port = 0x00000000; 2338 rh->port = 0x00000000;
@@ -2323,9 +2341,9 @@ static int r8a66597_suspend(struct platform_device *pdev, pm_message_t state)
2323 return 0; 2341 return 0;
2324} 2342}
2325 2343
2326static int r8a66597_resume(struct platform_device *pdev) 2344static int r8a66597_resume(struct device *dev)
2327{ 2345{
2328 struct r8a66597 *r8a66597 = dev_get_drvdata(&pdev->dev); 2346 struct r8a66597 *r8a66597 = dev_get_drvdata(dev);
2329 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597); 2347 struct usb_hcd *hcd = r8a66597_to_hcd(r8a66597);
2330 2348
2331 dbg("%s", __func__); 2349 dbg("%s", __func__);
@@ -2335,9 +2353,17 @@ static int r8a66597_resume(struct platform_device *pdev)
2335 2353
2336 return 0; 2354 return 0;
2337} 2355}
2356
2357static struct dev_pm_ops r8a66597_dev_pm_ops = {
2358 .suspend = r8a66597_suspend,
2359 .resume = r8a66597_resume,
2360 .poweroff = r8a66597_suspend,
2361 .restore = r8a66597_resume,
2362};
2363
2364#define R8A66597_DEV_PM_OPS (&r8a66597_dev_pm_ops)
2338#else /* if defined(CONFIG_PM) */ 2365#else /* if defined(CONFIG_PM) */
2339#define r8a66597_suspend NULL 2366#define R8A66597_DEV_PM_OPS NULL
2340#define r8a66597_resume NULL
2341#endif 2367#endif
2342 2368
2343static int __init_or_module r8a66597_remove(struct platform_device *pdev) 2369static int __init_or_module r8a66597_remove(struct platform_device *pdev)
@@ -2348,8 +2374,9 @@ static int __init_or_module r8a66597_remove(struct platform_device *pdev)
2348 del_timer_sync(&r8a66597->rh_timer); 2374 del_timer_sync(&r8a66597->rh_timer);
2349 usb_remove_hcd(hcd); 2375 usb_remove_hcd(hcd);
2350 iounmap((void *)r8a66597->reg); 2376 iounmap((void *)r8a66597->reg);
2351#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 2377#ifdef CONFIG_HAVE_CLK
2352 clk_put(r8a66597->clk); 2378 if (r8a66597->pdata->on_chip)
2379 clk_put(r8a66597->clk);
2353#endif 2380#endif
2354 usb_put_hcd(hcd); 2381 usb_put_hcd(hcd);
2355 return 0; 2382 return 0;
@@ -2357,7 +2384,7 @@ static int __init_or_module r8a66597_remove(struct platform_device *pdev)
2357 2384
2358static int __devinit r8a66597_probe(struct platform_device *pdev) 2385static int __devinit r8a66597_probe(struct platform_device *pdev)
2359{ 2386{
2360#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 2387#ifdef CONFIG_HAVE_CLK
2361 char clk_name[8]; 2388 char clk_name[8];
2362#endif 2389#endif
2363 struct resource *res = NULL, *ires; 2390 struct resource *res = NULL, *ires;
@@ -2419,15 +2446,20 @@ static int __devinit r8a66597_probe(struct platform_device *pdev)
2419 r8a66597->pdata = pdev->dev.platform_data; 2446 r8a66597->pdata = pdev->dev.platform_data;
2420 r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW; 2447 r8a66597->irq_sense_low = irq_trigger == IRQF_TRIGGER_LOW;
2421 2448
2422#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 2449 if (r8a66597->pdata->on_chip) {
2423 snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); 2450#ifdef CONFIG_HAVE_CLK
2424 r8a66597->clk = clk_get(&pdev->dev, clk_name); 2451 snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id);
2425 if (IS_ERR(r8a66597->clk)) { 2452 r8a66597->clk = clk_get(&pdev->dev, clk_name);
2426 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); 2453 if (IS_ERR(r8a66597->clk)) {
2427 ret = PTR_ERR(r8a66597->clk); 2454 dev_err(&pdev->dev, "cannot get clock \"%s\"\n",
2428 goto clean_up2; 2455 clk_name);
2429 } 2456 ret = PTR_ERR(r8a66597->clk);
2457 goto clean_up2;
2458 }
2430#endif 2459#endif
2460 r8a66597->max_root_hub = 1;
2461 } else
2462 r8a66597->max_root_hub = 2;
2431 2463
2432 spin_lock_init(&r8a66597->lock); 2464 spin_lock_init(&r8a66597->lock);
2433 init_timer(&r8a66597->rh_timer); 2465 init_timer(&r8a66597->rh_timer);
@@ -2457,8 +2489,9 @@ static int __devinit r8a66597_probe(struct platform_device *pdev)
2457 return 0; 2489 return 0;
2458 2490
2459clean_up3: 2491clean_up3:
2460#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 2492#ifdef CONFIG_HAVE_CLK
2461 clk_put(r8a66597->clk); 2493 if (r8a66597->pdata->on_chip)
2494 clk_put(r8a66597->clk);
2462clean_up2: 2495clean_up2:
2463#endif 2496#endif
2464 usb_put_hcd(hcd); 2497 usb_put_hcd(hcd);
@@ -2473,11 +2506,10 @@ clean_up:
2473static struct platform_driver r8a66597_driver = { 2506static struct platform_driver r8a66597_driver = {
2474 .probe = r8a66597_probe, 2507 .probe = r8a66597_probe,
2475 .remove = r8a66597_remove, 2508 .remove = r8a66597_remove,
2476 .suspend = r8a66597_suspend,
2477 .resume = r8a66597_resume,
2478 .driver = { 2509 .driver = {
2479 .name = (char *) hcd_name, 2510 .name = (char *) hcd_name,
2480 .owner = THIS_MODULE, 2511 .owner = THIS_MODULE,
2512 .pm = R8A66597_DEV_PM_OPS,
2481 }, 2513 },
2482}; 2514};
2483 2515
diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h
index d72680b433f9..228e3fb23854 100644
--- a/drivers/usb/host/r8a66597.h
+++ b/drivers/usb/host/r8a66597.h
@@ -26,390 +26,16 @@
26#ifndef __R8A66597_H__ 26#ifndef __R8A66597_H__
27#define __R8A66597_H__ 27#define __R8A66597_H__
28 28
29#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 29#ifdef CONFIG_HAVE_CLK
30#include <linux/clk.h> 30#include <linux/clk.h>
31#endif 31#endif
32 32
33#include <linux/usb/r8a66597.h> 33#include <linux/usb/r8a66597.h>
34 34
35#define SYSCFG0 0x00
36#define SYSCFG1 0x02
37#define SYSSTS0 0x04
38#define SYSSTS1 0x06
39#define DVSTCTR0 0x08
40#define DVSTCTR1 0x0A
41#define TESTMODE 0x0C
42#define PINCFG 0x0E
43#define DMA0CFG 0x10
44#define DMA1CFG 0x12
45#define CFIFO 0x14
46#define D0FIFO 0x18
47#define D1FIFO 0x1C
48#define CFIFOSEL 0x20
49#define CFIFOCTR 0x22
50#define CFIFOSIE 0x24
51#define D0FIFOSEL 0x28
52#define D0FIFOCTR 0x2A
53#define D1FIFOSEL 0x2C
54#define D1FIFOCTR 0x2E
55#define INTENB0 0x30
56#define INTENB1 0x32
57#define INTENB2 0x34
58#define BRDYENB 0x36
59#define NRDYENB 0x38
60#define BEMPENB 0x3A
61#define SOFCFG 0x3C
62#define INTSTS0 0x40
63#define INTSTS1 0x42
64#define INTSTS2 0x44
65#define BRDYSTS 0x46
66#define NRDYSTS 0x48
67#define BEMPSTS 0x4A
68#define FRMNUM 0x4C
69#define UFRMNUM 0x4E
70#define USBADDR 0x50
71#define USBREQ 0x54
72#define USBVAL 0x56
73#define USBINDX 0x58
74#define USBLENG 0x5A
75#define DCPCFG 0x5C
76#define DCPMAXP 0x5E
77#define DCPCTR 0x60
78#define PIPESEL 0x64
79#define PIPECFG 0x68
80#define PIPEBUF 0x6A
81#define PIPEMAXP 0x6C
82#define PIPEPERI 0x6E
83#define PIPE1CTR 0x70
84#define PIPE2CTR 0x72
85#define PIPE3CTR 0x74
86#define PIPE4CTR 0x76
87#define PIPE5CTR 0x78
88#define PIPE6CTR 0x7A
89#define PIPE7CTR 0x7C
90#define PIPE8CTR 0x7E
91#define PIPE9CTR 0x80
92#define PIPE1TRE 0x90
93#define PIPE1TRN 0x92
94#define PIPE2TRE 0x94
95#define PIPE2TRN 0x96
96#define PIPE3TRE 0x98
97#define PIPE3TRN 0x9A
98#define PIPE4TRE 0x9C
99#define PIPE4TRN 0x9E
100#define PIPE5TRE 0xA0
101#define PIPE5TRN 0xA2
102#define DEVADD0 0xD0
103#define DEVADD1 0xD2
104#define DEVADD2 0xD4
105#define DEVADD3 0xD6
106#define DEVADD4 0xD8
107#define DEVADD5 0xDA
108#define DEVADD6 0xDC
109#define DEVADD7 0xDE
110#define DEVADD8 0xE0
111#define DEVADD9 0xE2
112#define DEVADDA 0xE4
113
114/* System Configuration Control Register */
115#define XTAL 0xC000 /* b15-14: Crystal selection */
116#define XTAL48 0x8000 /* 48MHz */
117#define XTAL24 0x4000 /* 24MHz */
118#define XTAL12 0x0000 /* 12MHz */
119#define XCKE 0x2000 /* b13: External clock enable */
120#define PLLC 0x0800 /* b11: PLL control */
121#define SCKE 0x0400 /* b10: USB clock enable */
122#define PCSDIS 0x0200 /* b9: not CS wakeup */
123#define LPSME 0x0100 /* b8: Low power sleep mode */
124#define HSE 0x0080 /* b7: Hi-speed enable */
125#define DCFM 0x0040 /* b6: Controller function select */
126#define DRPD 0x0020 /* b5: D+/- pull down control */
127#define DPRPU 0x0010 /* b4: D+ pull up control */
128#define USBE 0x0001 /* b0: USB module operation enable */
129
130/* System Configuration Status Register */
131#define OVCBIT 0x8000 /* b15-14: Over-current bit */
132#define OVCMON 0xC000 /* b15-14: Over-current monitor */
133#define SOFEA 0x0020 /* b5: SOF monitor */
134#define IDMON 0x0004 /* b3: ID-pin monitor */
135#define LNST 0x0003 /* b1-0: D+, D- line status */
136#define SE1 0x0003 /* SE1 */
137#define FS_KSTS 0x0002 /* Full-Speed K State */
138#define FS_JSTS 0x0001 /* Full-Speed J State */
139#define LS_JSTS 0x0002 /* Low-Speed J State */
140#define LS_KSTS 0x0001 /* Low-Speed K State */
141#define SE0 0x0000 /* SE0 */
142
143/* Device State Control Register */
144#define EXTLP0 0x0400 /* b10: External port */
145#define VBOUT 0x0200 /* b9: VBUS output */
146#define WKUP 0x0100 /* b8: Remote wakeup */
147#define RWUPE 0x0080 /* b7: Remote wakeup sense */
148#define USBRST 0x0040 /* b6: USB reset enable */
149#define RESUME 0x0020 /* b5: Resume enable */
150#define UACT 0x0010 /* b4: USB bus enable */
151#define RHST 0x0007 /* b1-0: Reset handshake status */
152#define HSPROC 0x0004 /* HS handshake is processing */
153#define HSMODE 0x0003 /* Hi-Speed mode */
154#define FSMODE 0x0002 /* Full-Speed mode */
155#define LSMODE 0x0001 /* Low-Speed mode */
156#define UNDECID 0x0000 /* Undecided */
157
158/* Test Mode Register */
159#define UTST 0x000F /* b3-0: Test select */
160#define H_TST_PACKET 0x000C /* HOST TEST Packet */
161#define H_TST_SE0_NAK 0x000B /* HOST TEST SE0 NAK */
162#define H_TST_K 0x000A /* HOST TEST K */
163#define H_TST_J 0x0009 /* HOST TEST J */
164#define H_TST_NORMAL 0x0000 /* HOST Normal Mode */
165#define P_TST_PACKET 0x0004 /* PERI TEST Packet */
166#define P_TST_SE0_NAK 0x0003 /* PERI TEST SE0 NAK */
167#define P_TST_K 0x0002 /* PERI TEST K */
168#define P_TST_J 0x0001 /* PERI TEST J */
169#define P_TST_NORMAL 0x0000 /* PERI Normal Mode */
170
171/* Data Pin Configuration Register */
172#define LDRV 0x8000 /* b15: Drive Current Adjust */
173#define VIF1 0x0000 /* VIF = 1.8V */
174#define VIF3 0x8000 /* VIF = 3.3V */
175#define INTA 0x0001 /* b1: USB INT-pin active */
176
177/* DMAx Pin Configuration Register */
178#define DREQA 0x4000 /* b14: Dreq active select */
179#define BURST 0x2000 /* b13: Burst mode */
180#define DACKA 0x0400 /* b10: Dack active select */
181#define DFORM 0x0380 /* b9-7: DMA mode select */
182#define CPU_ADR_RD_WR 0x0000 /* Address + RD/WR mode (CPU bus) */
183#define CPU_DACK_RD_WR 0x0100 /* DACK + RD/WR mode (CPU bus) */
184#define CPU_DACK_ONLY 0x0180 /* DACK only mode (CPU bus) */
185#define SPLIT_DACK_ONLY 0x0200 /* DACK only mode (SPLIT bus) */
186#define DENDA 0x0040 /* b6: Dend active select */
187#define PKTM 0x0020 /* b5: Packet mode */
188#define DENDE 0x0010 /* b4: Dend enable */
189#define OBUS 0x0004 /* b2: OUTbus mode */
190
191/* CFIFO/DxFIFO Port Select Register */
192#define RCNT 0x8000 /* b15: Read count mode */
193#define REW 0x4000 /* b14: Buffer rewind */
194#define DCLRM 0x2000 /* b13: DMA buffer clear mode */
195#define DREQE 0x1000 /* b12: DREQ output enable */
196#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
197#define MBW 0x0800
198#else
199#define MBW 0x0400 /* b10: Maximum bit width for FIFO access */
200#endif
201#define MBW_8 0x0000 /* 8bit */
202#define MBW_16 0x0400 /* 16bit */
203#define BIGEND 0x0100 /* b8: Big endian mode */
204#define BYTE_LITTLE 0x0000 /* little dendian */
205#define BYTE_BIG 0x0100 /* big endifan */
206#define ISEL 0x0020 /* b5: DCP FIFO port direction select */
207#define CURPIPE 0x000F /* b2-0: PIPE select */
208
209/* CFIFO/DxFIFO Port Control Register */
210#define BVAL 0x8000 /* b15: Buffer valid flag */
211#define BCLR 0x4000 /* b14: Buffer clear */
212#define FRDY 0x2000 /* b13: FIFO ready */
213#define DTLN 0x0FFF /* b11-0: FIFO received data length */
214
215/* Interrupt Enable Register 0 */
216#define VBSE 0x8000 /* b15: VBUS interrupt */
217#define RSME 0x4000 /* b14: Resume interrupt */
218#define SOFE 0x2000 /* b13: Frame update interrupt */
219#define DVSE 0x1000 /* b12: Device state transition interrupt */
220#define CTRE 0x0800 /* b11: Control transfer stage transition interrupt */
221#define BEMPE 0x0400 /* b10: Buffer empty interrupt */
222#define NRDYE 0x0200 /* b9: Buffer not ready interrupt */
223#define BRDYE 0x0100 /* b8: Buffer ready interrupt */
224
225/* Interrupt Enable Register 1 */
226#define OVRCRE 0x8000 /* b15: Over-current interrupt */
227#define BCHGE 0x4000 /* b14: USB us chenge interrupt */
228#define DTCHE 0x1000 /* b12: Detach sense interrupt */
229#define ATTCHE 0x0800 /* b11: Attach sense interrupt */
230#define EOFERRE 0x0040 /* b6: EOF error interrupt */
231#define SIGNE 0x0020 /* b5: SETUP IGNORE interrupt */
232#define SACKE 0x0010 /* b4: SETUP ACK interrupt */
233
234/* BRDY Interrupt Enable/Status Register */
235#define BRDY9 0x0200 /* b9: PIPE9 */
236#define BRDY8 0x0100 /* b8: PIPE8 */
237#define BRDY7 0x0080 /* b7: PIPE7 */
238#define BRDY6 0x0040 /* b6: PIPE6 */
239#define BRDY5 0x0020 /* b5: PIPE5 */
240#define BRDY4 0x0010 /* b4: PIPE4 */
241#define BRDY3 0x0008 /* b3: PIPE3 */
242#define BRDY2 0x0004 /* b2: PIPE2 */
243#define BRDY1 0x0002 /* b1: PIPE1 */
244#define BRDY0 0x0001 /* b1: PIPE0 */
245
246/* NRDY Interrupt Enable/Status Register */
247#define NRDY9 0x0200 /* b9: PIPE9 */
248#define NRDY8 0x0100 /* b8: PIPE8 */
249#define NRDY7 0x0080 /* b7: PIPE7 */
250#define NRDY6 0x0040 /* b6: PIPE6 */
251#define NRDY5 0x0020 /* b5: PIPE5 */
252#define NRDY4 0x0010 /* b4: PIPE4 */
253#define NRDY3 0x0008 /* b3: PIPE3 */
254#define NRDY2 0x0004 /* b2: PIPE2 */
255#define NRDY1 0x0002 /* b1: PIPE1 */
256#define NRDY0 0x0001 /* b1: PIPE0 */
257
258/* BEMP Interrupt Enable/Status Register */
259#define BEMP9 0x0200 /* b9: PIPE9 */
260#define BEMP8 0x0100 /* b8: PIPE8 */
261#define BEMP7 0x0080 /* b7: PIPE7 */
262#define BEMP6 0x0040 /* b6: PIPE6 */
263#define BEMP5 0x0020 /* b5: PIPE5 */
264#define BEMP4 0x0010 /* b4: PIPE4 */
265#define BEMP3 0x0008 /* b3: PIPE3 */
266#define BEMP2 0x0004 /* b2: PIPE2 */
267#define BEMP1 0x0002 /* b1: PIPE1 */
268#define BEMP0 0x0001 /* b0: PIPE0 */
269
270/* SOF Pin Configuration Register */
271#define TRNENSEL 0x0100 /* b8: Select transaction enable period */
272#define BRDYM 0x0040 /* b6: BRDY clear timing */
273#define INTL 0x0020 /* b5: Interrupt sense select */
274#define EDGESTS 0x0010 /* b4: */
275#define SOFMODE 0x000C /* b3-2: SOF pin select */
276#define SOF_125US 0x0008 /* SOF OUT 125us Frame Signal */
277#define SOF_1MS 0x0004 /* SOF OUT 1ms Frame Signal */
278#define SOF_DISABLE 0x0000 /* SOF OUT Disable */
279
280/* Interrupt Status Register 0 */
281#define VBINT 0x8000 /* b15: VBUS interrupt */
282#define RESM 0x4000 /* b14: Resume interrupt */
283#define SOFR 0x2000 /* b13: SOF frame update interrupt */
284#define DVST 0x1000 /* b12: Device state transition interrupt */
285#define CTRT 0x0800 /* b11: Control transfer stage transition interrupt */
286#define BEMP 0x0400 /* b10: Buffer empty interrupt */
287#define NRDY 0x0200 /* b9: Buffer not ready interrupt */
288#define BRDY 0x0100 /* b8: Buffer ready interrupt */
289#define VBSTS 0x0080 /* b7: VBUS input port */
290#define DVSQ 0x0070 /* b6-4: Device state */
291#define DS_SPD_CNFG 0x0070 /* Suspend Configured */
292#define DS_SPD_ADDR 0x0060 /* Suspend Address */
293#define DS_SPD_DFLT 0x0050 /* Suspend Default */
294#define DS_SPD_POWR 0x0040 /* Suspend Powered */
295#define DS_SUSP 0x0040 /* Suspend */
296#define DS_CNFG 0x0030 /* Configured */
297#define DS_ADDS 0x0020 /* Address */
298#define DS_DFLT 0x0010 /* Default */
299#define DS_POWR 0x0000 /* Powered */
300#define DVSQS 0x0030 /* b5-4: Device state */
301#define VALID 0x0008 /* b3: Setup packet detected flag */
302#define CTSQ 0x0007 /* b2-0: Control transfer stage */
303#define CS_SQER 0x0006 /* Sequence error */
304#define CS_WRND 0x0005 /* Control write nodata status stage */
305#define CS_WRSS 0x0004 /* Control write status stage */
306#define CS_WRDS 0x0003 /* Control write data stage */
307#define CS_RDSS 0x0002 /* Control read status stage */
308#define CS_RDDS 0x0001 /* Control read data stage */
309#define CS_IDST 0x0000 /* Idle or setup stage */
310
311/* Interrupt Status Register 1 */
312#define OVRCR 0x8000 /* b15: Over-current interrupt */
313#define BCHG 0x4000 /* b14: USB bus chenge interrupt */
314#define DTCH 0x1000 /* b12: Detach sense interrupt */
315#define ATTCH 0x0800 /* b11: Attach sense interrupt */
316#define EOFERR 0x0040 /* b6: EOF-error interrupt */
317#define SIGN 0x0020 /* b5: Setup ignore interrupt */
318#define SACK 0x0010 /* b4: Setup acknowledge interrupt */
319
320/* Frame Number Register */
321#define OVRN 0x8000 /* b15: Overrun error */
322#define CRCE 0x4000 /* b14: Received data error */
323#define FRNM 0x07FF /* b10-0: Frame number */
324
325/* Micro Frame Number Register */
326#define UFRNM 0x0007 /* b2-0: Micro frame number */
327
328/* Default Control Pipe Maxpacket Size Register */
329/* Pipe Maxpacket Size Register */
330#define DEVSEL 0xF000 /* b15-14: Device address select */
331#define MAXP 0x007F /* b6-0: Maxpacket size of default control pipe */
332
333/* Default Control Pipe Control Register */
334#define BSTS 0x8000 /* b15: Buffer status */
335#define SUREQ 0x4000 /* b14: Send USB request */
336#define CSCLR 0x2000 /* b13: complete-split status clear */
337#define CSSTS 0x1000 /* b12: complete-split status */
338#define SUREQCLR 0x0800 /* b11: stop setup request */
339#define SQCLR 0x0100 /* b8: Sequence toggle bit clear */
340#define SQSET 0x0080 /* b7: Sequence toggle bit set */
341#define SQMON 0x0040 /* b6: Sequence toggle bit monitor */
342#define PBUSY 0x0020 /* b5: pipe busy */
343#define PINGE 0x0010 /* b4: ping enable */
344#define CCPL 0x0004 /* b2: Enable control transfer complete */
345#define PID 0x0003 /* b1-0: Response PID */
346#define PID_STALL11 0x0003 /* STALL */
347#define PID_STALL 0x0002 /* STALL */
348#define PID_BUF 0x0001 /* BUF */
349#define PID_NAK 0x0000 /* NAK */
350
351/* Pipe Window Select Register */
352#define PIPENM 0x0007 /* b2-0: Pipe select */
353
354/* Pipe Configuration Register */
355#define R8A66597_TYP 0xC000 /* b15-14: Transfer type */
356#define R8A66597_ISO 0xC000 /* Isochronous */
357#define R8A66597_INT 0x8000 /* Interrupt */
358#define R8A66597_BULK 0x4000 /* Bulk */
359#define R8A66597_BFRE 0x0400 /* b10: Buffer ready interrupt mode select */
360#define R8A66597_DBLB 0x0200 /* b9: Double buffer mode select */
361#define R8A66597_CNTMD 0x0100 /* b8: Continuous transfer mode select */
362#define R8A66597_SHTNAK 0x0080 /* b7: Transfer end NAK */
363#define R8A66597_DIR 0x0010 /* b4: Transfer direction select */
364#define R8A66597_EPNUM 0x000F /* b3-0: Eendpoint number select */
365
366/* Pipe Buffer Configuration Register */
367#define BUFSIZE 0x7C00 /* b14-10: Pipe buffer size */
368#define BUFNMB 0x007F /* b6-0: Pipe buffer number */
369#define PIPE0BUF 256
370#define PIPExBUF 64
371
372/* Pipe Maxpacket Size Register */
373#define MXPS 0x07FF /* b10-0: Maxpacket size */
374
375/* Pipe Cycle Configuration Register */
376#define IFIS 0x1000 /* b12: Isochronous in-buffer flush mode select */
377#define IITV 0x0007 /* b2-0: Isochronous interval */
378
379/* Pipex Control Register */
380#define BSTS 0x8000 /* b15: Buffer status */
381#define INBUFM 0x4000 /* b14: IN buffer monitor (Only for PIPE1 to 5) */
382#define CSCLR 0x2000 /* b13: complete-split status clear */
383#define CSSTS 0x1000 /* b12: complete-split status */
384#define ATREPM 0x0400 /* b10: Auto repeat mode */
385#define ACLRM 0x0200 /* b9: Out buffer auto clear mode */
386#define SQCLR 0x0100 /* b8: Sequence toggle bit clear */
387#define SQSET 0x0080 /* b7: Sequence toggle bit set */
388#define SQMON 0x0040 /* b6: Sequence toggle bit monitor */
389#define PBUSY 0x0020 /* b5: pipe busy */
390#define PID 0x0003 /* b1-0: Response PID */
391
392/* PIPExTRE */
393#define TRENB 0x0200 /* b9: Transaction counter enable */
394#define TRCLR 0x0100 /* b8: Transaction counter clear */
395
396/* PIPExTRN */
397#define TRNCNT 0xFFFF /* b15-0: Transaction counter */
398
399/* DEVADDx */
400#define UPPHUB 0x7800
401#define HUBPORT 0x0700
402#define USBSPD 0x00C0
403#define RTPORT 0x0001
404
405#define R8A66597_MAX_NUM_PIPE 10 35#define R8A66597_MAX_NUM_PIPE 10
406#define R8A66597_BUF_BSIZE 8 36#define R8A66597_BUF_BSIZE 8
407#define R8A66597_MAX_DEVICE 10 37#define R8A66597_MAX_DEVICE 10
408#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
409#define R8A66597_MAX_ROOT_HUB 1
410#else
411#define R8A66597_MAX_ROOT_HUB 2 38#define R8A66597_MAX_ROOT_HUB 2
412#endif
413#define R8A66597_MAX_SAMPLING 5 39#define R8A66597_MAX_SAMPLING 5
414#define R8A66597_RH_POLL_TIME 10 40#define R8A66597_RH_POLL_TIME 10
415#define R8A66597_MAX_DMA_CHANNEL 2 41#define R8A66597_MAX_DMA_CHANNEL 2
@@ -487,7 +113,7 @@ struct r8a66597_root_hub {
487struct r8a66597 { 113struct r8a66597 {
488 spinlock_t lock; 114 spinlock_t lock;
489 unsigned long reg; 115 unsigned long reg;
490#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) && defined(CONFIG_HAVE_CLK) 116#ifdef CONFIG_HAVE_CLK
491 struct clk *clk; 117 struct clk *clk;
492#endif 118#endif
493 struct r8a66597_platdata *pdata; 119 struct r8a66597_platdata *pdata;
@@ -504,6 +130,7 @@ struct r8a66597 {
504 unsigned short interval_map; 130 unsigned short interval_map;
505 unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE]; 131 unsigned char pipe_cnt[R8A66597_MAX_NUM_PIPE];
506 unsigned char dma_map; 132 unsigned char dma_map;
133 unsigned int max_root_hub;
507 134
508 struct list_head child_device; 135 struct list_head child_device;
509 unsigned long child_connect_map[4]; 136 unsigned long child_connect_map[4];
@@ -550,21 +177,22 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597,
550 unsigned long offset, u16 *buf, 177 unsigned long offset, u16 *buf,
551 int len) 178 int len)
552{ 179{
553#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
554 unsigned long fifoaddr = r8a66597->reg + offset; 180 unsigned long fifoaddr = r8a66597->reg + offset;
555 unsigned long count; 181 unsigned long count;
556 182
557 count = len / 4; 183 if (r8a66597->pdata->on_chip) {
558 insl(fifoaddr, buf, count); 184 count = len / 4;
185 insl(fifoaddr, buf, count);
559 186
560 if (len & 0x00000003) { 187 if (len & 0x00000003) {
561 unsigned long tmp = inl(fifoaddr); 188 unsigned long tmp = inl(fifoaddr);
562 memcpy((unsigned char *)buf + count * 4, &tmp, len & 0x03); 189 memcpy((unsigned char *)buf + count * 4, &tmp,
190 len & 0x03);
191 }
192 } else {
193 len = (len + 1) / 2;
194 insw(fifoaddr, buf, len);
563 } 195 }
564#else
565 len = (len + 1) / 2;
566 insw(r8a66597->reg + offset, buf, len);
567#endif
568} 196}
569 197
570static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val, 198static inline void r8a66597_write(struct r8a66597 *r8a66597, u16 val,
@@ -578,33 +206,33 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597,
578 int len) 206 int len)
579{ 207{
580 unsigned long fifoaddr = r8a66597->reg + offset; 208 unsigned long fifoaddr = r8a66597->reg + offset;
581#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597)
582 unsigned long count; 209 unsigned long count;
583 unsigned char *pb; 210 unsigned char *pb;
584 int i; 211 int i;
585 212
586 count = len / 4; 213 if (r8a66597->pdata->on_chip) {
587 outsl(fifoaddr, buf, count); 214 count = len / 4;
215 outsl(fifoaddr, buf, count);
216
217 if (len & 0x00000003) {
218 pb = (unsigned char *)buf + count * 4;
219 for (i = 0; i < (len & 0x00000003); i++) {
220 if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND)
221 outb(pb[i], fifoaddr + i);
222 else
223 outb(pb[i], fifoaddr + 3 - i);
224 }
225 }
226 } else {
227 int odd = len & 0x0001;
588 228
589 if (len & 0x00000003) { 229 len = len / 2;
590 pb = (unsigned char *)buf + count * 4; 230 outsw(fifoaddr, buf, len);
591 for (i = 0; i < (len & 0x00000003); i++) { 231 if (unlikely(odd)) {
592 if (r8a66597_read(r8a66597, CFIFOSEL) & BIGEND) 232 buf = &buf[len];
593 outb(pb[i], fifoaddr + i); 233 outb((unsigned char)*buf, fifoaddr);
594 else
595 outb(pb[i], fifoaddr + 3 - i);
596 } 234 }
597 } 235 }
598#else
599 int odd = len & 0x0001;
600
601 len = len / 2;
602 outsw(fifoaddr, buf, len);
603 if (unlikely(odd)) {
604 buf = &buf[len];
605 outb((unsigned char)*buf, fifoaddr);
606 }
607#endif
608} 236}
609 237
610static inline void r8a66597_mdfy(struct r8a66597 *r8a66597, 238static inline void r8a66597_mdfy(struct r8a66597 *r8a66597,
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index cef3e1d9b92e..11af4cb8924e 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1869,7 +1869,7 @@ config FB_W100
1869 1869
1870config FB_SH_MOBILE_LCDC 1870config FB_SH_MOBILE_LCDC
1871 tristate "SuperH Mobile LCDC framebuffer support" 1871 tristate "SuperH Mobile LCDC framebuffer support"
1872 depends on FB && SUPERH 1872 depends on FB && SUPERH && HAVE_CLK
1873 select FB_SYS_FILLRECT 1873 select FB_SYS_FILLRECT
1874 select FB_SYS_COPYAREA 1874 select FB_SYS_COPYAREA
1875 select FB_SYS_IMAGEBLIT 1875 select FB_SYS_IMAGEBLIT
diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
index 148cbcc39602..915439dc05a0 100644
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -212,9 +212,9 @@ static void enable_rfbi_mode(int enable)
212 dispc_write_reg(DISPC_CONTROL, l); 212 dispc_write_reg(DISPC_CONTROL, l);
213 213
214 /* Set bypass mode in RFBI module */ 214 /* Set bypass mode in RFBI module */
215 l = __raw_readl(IO_ADDRESS(RFBI_CONTROL)); 215 l = __raw_readl(OMAP2_IO_ADDRESS(RFBI_CONTROL));
216 l |= enable ? 0 : (1 << 1); 216 l |= enable ? 0 : (1 << 1);
217 __raw_writel(l, IO_ADDRESS(RFBI_CONTROL)); 217 __raw_writel(l, OMAP2_IO_ADDRESS(RFBI_CONTROL));
218} 218}
219 219
220static void set_lcd_data_lines(int data_lines) 220static void set_lcd_data_lines(int data_lines)
@@ -1421,7 +1421,7 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode,
1421 } 1421 }
1422 1422
1423 /* L3 firewall setting: enable access to OCM RAM */ 1423 /* L3 firewall setting: enable access to OCM RAM */
1424 __raw_writel(0x402000b0, IO_ADDRESS(0x680050a0)); 1424 __raw_writel(0x402000b0, OMAP2_IO_ADDRESS(0x680050a0));
1425 1425
1426 if ((r = alloc_palette_ram()) < 0) 1426 if ((r = alloc_palette_ram()) < 0)
1427 goto fail2; 1427 goto fail2;
diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/sh_mobile_lcdcfb.c
index 07f22b625632..3ad5157f9899 100644
--- a/drivers/video/sh_mobile_lcdcfb.c
+++ b/drivers/video/sh_mobile_lcdcfb.c
@@ -14,6 +14,7 @@
14#include <linux/mm.h> 14#include <linux/mm.h>
15#include <linux/fb.h> 15#include <linux/fb.h>
16#include <linux/clk.h> 16#include <linux/clk.h>
17#include <linux/pm_runtime.h>
17#include <linux/platform_device.h> 18#include <linux/platform_device.h>
18#include <linux/dma-mapping.h> 19#include <linux/dma-mapping.h>
19#include <linux/interrupt.h> 20#include <linux/interrupt.h>
@@ -22,35 +23,8 @@
22#include <asm/atomic.h> 23#include <asm/atomic.h>
23 24
24#define PALETTE_NR 16 25#define PALETTE_NR 16
25 26#define SIDE_B_OFFSET 0x1000
26struct sh_mobile_lcdc_priv; 27#define MIRROR_OFFSET 0x2000
27struct sh_mobile_lcdc_chan {
28 struct sh_mobile_lcdc_priv *lcdc;
29 unsigned long *reg_offs;
30 unsigned long ldmt1r_value;
31 unsigned long enabled; /* ME and SE in LDCNT2R */
32 struct sh_mobile_lcdc_chan_cfg cfg;
33 u32 pseudo_palette[PALETTE_NR];
34 struct fb_info *info;
35 dma_addr_t dma_handle;
36 struct fb_deferred_io defio;
37 struct scatterlist *sglist;
38 unsigned long frame_end;
39 wait_queue_head_t frame_end_wait;
40};
41
42struct sh_mobile_lcdc_priv {
43 void __iomem *base;
44 int irq;
45#ifdef CONFIG_HAVE_CLK
46 atomic_t clk_usecnt;
47 struct clk *dot_clk;
48 struct clk *clk;
49#endif
50 unsigned long lddckr;
51 struct sh_mobile_lcdc_chan ch[2];
52 int started;
53};
54 28
55/* shared registers */ 29/* shared registers */
56#define _LDDCKR 0x410 30#define _LDDCKR 0x410
@@ -59,17 +33,30 @@ struct sh_mobile_lcdc_priv {
59#define _LDSR 0x46c 33#define _LDSR 0x46c
60#define _LDCNT1R 0x470 34#define _LDCNT1R 0x470
61#define _LDCNT2R 0x474 35#define _LDCNT2R 0x474
36#define _LDRCNTR 0x478
62#define _LDDDSR 0x47c 37#define _LDDDSR 0x47c
63#define _LDDWD0R 0x800 38#define _LDDWD0R 0x800
64#define _LDDRDR 0x840 39#define _LDDRDR 0x840
65#define _LDDWAR 0x900 40#define _LDDWAR 0x900
66#define _LDDRAR 0x904 41#define _LDDRAR 0x904
67 42
43/* shared registers and their order for context save/restore */
44static int lcdc_shared_regs[] = {
45 _LDDCKR,
46 _LDDCKSTPR,
47 _LDINTR,
48 _LDDDSR,
49 _LDCNT1R,
50 _LDCNT2R,
51};
52#define NR_SHARED_REGS ARRAY_SIZE(lcdc_shared_regs)
53
68/* per-channel registers */ 54/* per-channel registers */
69enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R, 55enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R,
70 LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR }; 56 LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR,
57 NR_CH_REGS };
71 58
72static unsigned long lcdc_offs_mainlcd[] = { 59static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = {
73 [LDDCKPAT1R] = 0x400, 60 [LDDCKPAT1R] = 0x400,
74 [LDDCKPAT2R] = 0x404, 61 [LDDCKPAT2R] = 0x404,
75 [LDMT1R] = 0x418, 62 [LDMT1R] = 0x418,
@@ -87,7 +74,7 @@ static unsigned long lcdc_offs_mainlcd[] = {
87 [LDPMR] = 0x460, 74 [LDPMR] = 0x460,
88}; 75};
89 76
90static unsigned long lcdc_offs_sublcd[] = { 77static unsigned long lcdc_offs_sublcd[NR_CH_REGS] = {
91 [LDDCKPAT1R] = 0x408, 78 [LDDCKPAT1R] = 0x408,
92 [LDDCKPAT2R] = 0x40c, 79 [LDDCKPAT2R] = 0x40c,
93 [LDMT1R] = 0x600, 80 [LDMT1R] = 0x600,
@@ -110,12 +97,80 @@ static unsigned long lcdc_offs_sublcd[] = {
110#define DISPLAY_BEU 0x00000008 97#define DISPLAY_BEU 0x00000008
111#define LCDC_ENABLE 0x00000001 98#define LCDC_ENABLE 0x00000001
112#define LDINTR_FE 0x00000400 99#define LDINTR_FE 0x00000400
100#define LDINTR_VSE 0x00000200
101#define LDINTR_VEE 0x00000100
113#define LDINTR_FS 0x00000004 102#define LDINTR_FS 0x00000004
103#define LDINTR_VSS 0x00000002
104#define LDINTR_VES 0x00000001
105#define LDRCNTR_SRS 0x00020000
106#define LDRCNTR_SRC 0x00010000
107#define LDRCNTR_MRS 0x00000002
108#define LDRCNTR_MRC 0x00000001
109
110struct sh_mobile_lcdc_priv;
111struct sh_mobile_lcdc_chan {
112 struct sh_mobile_lcdc_priv *lcdc;
113 unsigned long *reg_offs;
114 unsigned long ldmt1r_value;
115 unsigned long enabled; /* ME and SE in LDCNT2R */
116 struct sh_mobile_lcdc_chan_cfg cfg;
117 u32 pseudo_palette[PALETTE_NR];
118 unsigned long saved_ch_regs[NR_CH_REGS];
119 struct fb_info *info;
120 dma_addr_t dma_handle;
121 struct fb_deferred_io defio;
122 struct scatterlist *sglist;
123 unsigned long frame_end;
124 unsigned long pan_offset;
125 unsigned long new_pan_offset;
126 wait_queue_head_t frame_end_wait;
127};
128
129struct sh_mobile_lcdc_priv {
130 void __iomem *base;
131 int irq;
132 atomic_t hw_usecnt;
133 struct device *dev;
134 struct clk *dot_clk;
135 unsigned long lddckr;
136 struct sh_mobile_lcdc_chan ch[2];
137 unsigned long saved_shared_regs[NR_SHARED_REGS];
138 int started;
139};
140
141static bool banked(int reg_nr)
142{
143 switch (reg_nr) {
144 case LDMT1R:
145 case LDMT2R:
146 case LDMT3R:
147 case LDDFR:
148 case LDSM1R:
149 case LDSA1R:
150 case LDMLSR:
151 case LDHCNR:
152 case LDHSYNR:
153 case LDVLNR:
154 case LDVSYNR:
155 return true;
156 }
157 return false;
158}
114 159
115static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan, 160static void lcdc_write_chan(struct sh_mobile_lcdc_chan *chan,
116 int reg_nr, unsigned long data) 161 int reg_nr, unsigned long data)
117{ 162{
118 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]); 163 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
164 if (banked(reg_nr))
165 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
166 SIDE_B_OFFSET);
167}
168
169static void lcdc_write_chan_mirror(struct sh_mobile_lcdc_chan *chan,
170 int reg_nr, unsigned long data)
171{
172 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
173 MIRROR_OFFSET);
119} 174}
120 175
121static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan, 176static unsigned long lcdc_read_chan(struct sh_mobile_lcdc_chan *chan,
@@ -156,6 +211,7 @@ static void lcdc_sys_write_index(void *handle, unsigned long data)
156 lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000); 211 lcdc_write(ch->lcdc, _LDDWD0R, data | 0x10000000);
157 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); 212 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
158 lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); 213 lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
214 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
159} 215}
160 216
161static void lcdc_sys_write_data(void *handle, unsigned long data) 217static void lcdc_sys_write_data(void *handle, unsigned long data)
@@ -165,6 +221,7 @@ static void lcdc_sys_write_data(void *handle, unsigned long data)
165 lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000); 221 lcdc_write(ch->lcdc, _LDDWD0R, data | 0x11000000);
166 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); 222 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
167 lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); 223 lcdc_write(ch->lcdc, _LDDWAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
224 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
168} 225}
169 226
170static unsigned long lcdc_sys_read_data(void *handle) 227static unsigned long lcdc_sys_read_data(void *handle)
@@ -175,8 +232,9 @@ static unsigned long lcdc_sys_read_data(void *handle)
175 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0); 232 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
176 lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0)); 233 lcdc_write(ch->lcdc, _LDDRAR, 1 | (lcdc_chan_is_sublcd(ch) ? 2 : 0));
177 udelay(1); 234 udelay(1);
235 lcdc_wait_bit(ch->lcdc, _LDSR, 2, 0);
178 236
179 return lcdc_read(ch->lcdc, _LDDRDR) & 0xffff; 237 return lcdc_read(ch->lcdc, _LDDRDR) & 0x3ffff;
180} 238}
181 239
182struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = { 240struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
@@ -185,11 +243,10 @@ struct sh_mobile_lcdc_sys_bus_ops sh_mobile_lcdc_sys_bus_ops = {
185 lcdc_sys_read_data, 243 lcdc_sys_read_data,
186}; 244};
187 245
188#ifdef CONFIG_HAVE_CLK
189static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) 246static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
190{ 247{
191 if (atomic_inc_and_test(&priv->clk_usecnt)) { 248 if (atomic_inc_and_test(&priv->hw_usecnt)) {
192 clk_enable(priv->clk); 249 pm_runtime_get_sync(priv->dev);
193 if (priv->dot_clk) 250 if (priv->dot_clk)
194 clk_enable(priv->dot_clk); 251 clk_enable(priv->dot_clk);
195 } 252 }
@@ -197,16 +254,12 @@ static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv)
197 254
198static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) 255static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv)
199{ 256{
200 if (atomic_sub_return(1, &priv->clk_usecnt) == -1) { 257 if (atomic_sub_return(1, &priv->hw_usecnt) == -1) {
201 if (priv->dot_clk) 258 if (priv->dot_clk)
202 clk_disable(priv->dot_clk); 259 clk_disable(priv->dot_clk);
203 clk_disable(priv->clk); 260 pm_runtime_put(priv->dev);
204 } 261 }
205} 262}
206#else
207static void sh_mobile_lcdc_clk_on(struct sh_mobile_lcdc_priv *priv) {}
208static void sh_mobile_lcdc_clk_off(struct sh_mobile_lcdc_priv *priv) {}
209#endif
210 263
211static int sh_mobile_lcdc_sginit(struct fb_info *info, 264static int sh_mobile_lcdc_sginit(struct fb_info *info,
212 struct list_head *pagelist) 265 struct list_head *pagelist)
@@ -255,30 +308,52 @@ static irqreturn_t sh_mobile_lcdc_irq(int irq, void *data)
255 struct sh_mobile_lcdc_priv *priv = data; 308 struct sh_mobile_lcdc_priv *priv = data;
256 struct sh_mobile_lcdc_chan *ch; 309 struct sh_mobile_lcdc_chan *ch;
257 unsigned long tmp; 310 unsigned long tmp;
311 unsigned long ldintr;
258 int is_sub; 312 int is_sub;
259 int k; 313 int k;
260 314
261 /* acknowledge interrupt */ 315 /* acknowledge interrupt */
262 tmp = lcdc_read(priv, _LDINTR); 316 ldintr = tmp = lcdc_read(priv, _LDINTR);
263 tmp &= 0xffffff00; /* mask in high 24 bits */ 317 /*
264 tmp |= 0x000000ff ^ LDINTR_FS; /* status in low 8 */ 318 * disable further VSYNC End IRQs, preserve all other enabled IRQs,
319 * write 0 to bits 0-6 to ack all triggered IRQs.
320 */
321 tmp &= 0xffffff00 & ~LDINTR_VEE;
265 lcdc_write(priv, _LDINTR, tmp); 322 lcdc_write(priv, _LDINTR, tmp);
266 323
267 /* figure out if this interrupt is for main or sub lcd */ 324 /* figure out if this interrupt is for main or sub lcd */
268 is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0; 325 is_sub = (lcdc_read(priv, _LDSR) & (1 << 10)) ? 1 : 0;
269 326
270 /* wake up channel and disable clocks*/ 327 /* wake up channel and disable clocks */
271 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { 328 for (k = 0; k < ARRAY_SIZE(priv->ch); k++) {
272 ch = &priv->ch[k]; 329 ch = &priv->ch[k];
273 330
274 if (!ch->enabled) 331 if (!ch->enabled)
275 continue; 332 continue;
276 333
277 if (is_sub == lcdc_chan_is_sublcd(ch)) { 334 /* Frame Start */
278 ch->frame_end = 1; 335 if (ldintr & LDINTR_FS) {
279 wake_up(&ch->frame_end_wait); 336 if (is_sub == lcdc_chan_is_sublcd(ch)) {
337 ch->frame_end = 1;
338 wake_up(&ch->frame_end_wait);
280 339
281 sh_mobile_lcdc_clk_off(priv); 340 sh_mobile_lcdc_clk_off(priv);
341 }
342 }
343
344 /* VSYNC End */
345 if (ldintr & LDINTR_VES) {
346 unsigned long ldrcntr = lcdc_read(priv, _LDRCNTR);
347 /* Set the source address for the next refresh */
348 lcdc_write_chan_mirror(ch, LDSA1R, ch->dma_handle +
349 ch->new_pan_offset);
350 if (lcdc_chan_is_sublcd(ch))
351 lcdc_write(ch->lcdc, _LDRCNTR,
352 ldrcntr ^ LDRCNTR_SRS);
353 else
354 lcdc_write(ch->lcdc, _LDRCNTR,
355 ldrcntr ^ LDRCNTR_MRS);
356 ch->pan_offset = ch->new_pan_offset;
282 } 357 }
283 } 358 }
284 359
@@ -520,7 +595,6 @@ static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv)
520 board_cfg = &ch->cfg.board_cfg; 595 board_cfg = &ch->cfg.board_cfg;
521 if (board_cfg->display_off) 596 if (board_cfg->display_off)
522 board_cfg->display_off(board_cfg->board_data); 597 board_cfg->display_off(board_cfg->board_data);
523
524 } 598 }
525 599
526 /* stop the lcdc */ 600 /* stop the lcdc */
@@ -579,9 +653,6 @@ static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
579 int clock_source, 653 int clock_source,
580 struct sh_mobile_lcdc_priv *priv) 654 struct sh_mobile_lcdc_priv *priv)
581{ 655{
582#ifdef CONFIG_HAVE_CLK
583 char clk_name[8];
584#endif
585 char *str; 656 char *str;
586 int icksel; 657 int icksel;
587 658
@@ -595,25 +666,21 @@ static int sh_mobile_lcdc_setup_clocks(struct platform_device *pdev,
595 666
596 priv->lddckr = icksel << 16; 667 priv->lddckr = icksel << 16;
597 668
598#ifdef CONFIG_HAVE_CLK
599 atomic_set(&priv->clk_usecnt, -1);
600 snprintf(clk_name, sizeof(clk_name), "lcdc%d", pdev->id);
601 priv->clk = clk_get(&pdev->dev, clk_name);
602 if (IS_ERR(priv->clk)) {
603 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name);
604 return PTR_ERR(priv->clk);
605 }
606
607 if (str) { 669 if (str) {
608 priv->dot_clk = clk_get(&pdev->dev, str); 670 priv->dot_clk = clk_get(&pdev->dev, str);
609 if (IS_ERR(priv->dot_clk)) { 671 if (IS_ERR(priv->dot_clk)) {
610 dev_err(&pdev->dev, "cannot get dot clock %s\n", str); 672 dev_err(&pdev->dev, "cannot get dot clock %s\n", str);
611 clk_put(priv->clk);
612 return PTR_ERR(priv->dot_clk); 673 return PTR_ERR(priv->dot_clk);
613 } 674 }
614 } 675 }
615#endif 676 atomic_set(&priv->hw_usecnt, -1);
616 677
678 /* Runtime PM support involves two step for this driver:
679 * 1) Enable Runtime PM
680 * 2) Force Runtime PM Resume since hardware is accessed from probe()
681 */
682 pm_runtime_enable(priv->dev);
683 pm_runtime_resume(priv->dev);
617 return 0; 684 return 0;
618} 685}
619 686
@@ -646,6 +713,9 @@ static struct fb_fix_screeninfo sh_mobile_lcdc_fix = {
646 .type = FB_TYPE_PACKED_PIXELS, 713 .type = FB_TYPE_PACKED_PIXELS,
647 .visual = FB_VISUAL_TRUECOLOR, 714 .visual = FB_VISUAL_TRUECOLOR,
648 .accel = FB_ACCEL_NONE, 715 .accel = FB_ACCEL_NONE,
716 .xpanstep = 0,
717 .ypanstep = 1,
718 .ywrapstep = 0,
649}; 719};
650 720
651static void sh_mobile_lcdc_fillrect(struct fb_info *info, 721static void sh_mobile_lcdc_fillrect(struct fb_info *info,
@@ -669,13 +739,38 @@ static void sh_mobile_lcdc_imageblit(struct fb_info *info,
669 sh_mobile_lcdc_deferred_io_touch(info); 739 sh_mobile_lcdc_deferred_io_touch(info);
670} 740}
671 741
742static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var,
743 struct fb_info *info)
744{
745 struct sh_mobile_lcdc_chan *ch = info->par;
746
747 if (info->var.xoffset == var->xoffset &&
748 info->var.yoffset == var->yoffset)
749 return 0; /* No change, do nothing */
750
751 ch->new_pan_offset = (var->yoffset * info->fix.line_length) +
752 (var->xoffset * (info->var.bits_per_pixel / 8));
753
754 if (ch->new_pan_offset != ch->pan_offset) {
755 unsigned long ldintr;
756 ldintr = lcdc_read(ch->lcdc, _LDINTR);
757 ldintr |= LDINTR_VEE;
758 lcdc_write(ch->lcdc, _LDINTR, ldintr);
759 sh_mobile_lcdc_deferred_io_touch(info);
760 }
761
762 return 0;
763}
764
672static struct fb_ops sh_mobile_lcdc_ops = { 765static struct fb_ops sh_mobile_lcdc_ops = {
766 .owner = THIS_MODULE,
673 .fb_setcolreg = sh_mobile_lcdc_setcolreg, 767 .fb_setcolreg = sh_mobile_lcdc_setcolreg,
674 .fb_read = fb_sys_read, 768 .fb_read = fb_sys_read,
675 .fb_write = fb_sys_write, 769 .fb_write = fb_sys_write,
676 .fb_fillrect = sh_mobile_lcdc_fillrect, 770 .fb_fillrect = sh_mobile_lcdc_fillrect,
677 .fb_copyarea = sh_mobile_lcdc_copyarea, 771 .fb_copyarea = sh_mobile_lcdc_copyarea,
678 .fb_imageblit = sh_mobile_lcdc_imageblit, 772 .fb_imageblit = sh_mobile_lcdc_imageblit,
773 .fb_pan_display = sh_mobile_fb_pan_display,
679}; 774};
680 775
681static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp) 776static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp)
@@ -731,9 +826,59 @@ static int sh_mobile_lcdc_resume(struct device *dev)
731 return sh_mobile_lcdc_start(platform_get_drvdata(pdev)); 826 return sh_mobile_lcdc_start(platform_get_drvdata(pdev));
732} 827}
733 828
829static int sh_mobile_lcdc_runtime_suspend(struct device *dev)
830{
831 struct platform_device *pdev = to_platform_device(dev);
832 struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
833 struct sh_mobile_lcdc_chan *ch;
834 int k, n;
835
836 /* save per-channel registers */
837 for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
838 ch = &p->ch[k];
839 if (!ch->enabled)
840 continue;
841 for (n = 0; n < NR_CH_REGS; n++)
842 ch->saved_ch_regs[n] = lcdc_read_chan(ch, n);
843 }
844
845 /* save shared registers */
846 for (n = 0; n < NR_SHARED_REGS; n++)
847 p->saved_shared_regs[n] = lcdc_read(p, lcdc_shared_regs[n]);
848
849 /* turn off LCDC hardware */
850 lcdc_write(p, _LDCNT1R, 0);
851 return 0;
852}
853
854static int sh_mobile_lcdc_runtime_resume(struct device *dev)
855{
856 struct platform_device *pdev = to_platform_device(dev);
857 struct sh_mobile_lcdc_priv *p = platform_get_drvdata(pdev);
858 struct sh_mobile_lcdc_chan *ch;
859 int k, n;
860
861 /* restore per-channel registers */
862 for (k = 0; k < ARRAY_SIZE(p->ch); k++) {
863 ch = &p->ch[k];
864 if (!ch->enabled)
865 continue;
866 for (n = 0; n < NR_CH_REGS; n++)
867 lcdc_write_chan(ch, n, ch->saved_ch_regs[n]);
868 }
869
870 /* restore shared registers */
871 for (n = 0; n < NR_SHARED_REGS; n++)
872 lcdc_write(p, lcdc_shared_regs[n], p->saved_shared_regs[n]);
873
874 return 0;
875}
876
734static struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = { 877static struct dev_pm_ops sh_mobile_lcdc_dev_pm_ops = {
735 .suspend = sh_mobile_lcdc_suspend, 878 .suspend = sh_mobile_lcdc_suspend,
736 .resume = sh_mobile_lcdc_resume, 879 .resume = sh_mobile_lcdc_resume,
880 .runtime_suspend = sh_mobile_lcdc_runtime_suspend,
881 .runtime_resume = sh_mobile_lcdc_runtime_resume,
737}; 882};
738 883
739static int sh_mobile_lcdc_remove(struct platform_device *pdev); 884static int sh_mobile_lcdc_remove(struct platform_device *pdev);
@@ -778,6 +923,7 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
778 } 923 }
779 924
780 priv->irq = i; 925 priv->irq = i;
926 priv->dev = &pdev->dev;
781 platform_set_drvdata(pdev, priv); 927 platform_set_drvdata(pdev, priv);
782 pdata = pdev->dev.platform_data; 928 pdata = pdev->dev.platform_data;
783 929
@@ -792,6 +938,8 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
792 goto err1; 938 goto err1;
793 } 939 }
794 init_waitqueue_head(&priv->ch[i].frame_end_wait); 940 init_waitqueue_head(&priv->ch[i].frame_end_wait);
941 priv->ch[j].pan_offset = 0;
942 priv->ch[j].new_pan_offset = 0;
795 943
796 switch (pdata->ch[i].chan) { 944 switch (pdata->ch[i].chan) {
797 case LCDC_CHAN_MAINLCD: 945 case LCDC_CHAN_MAINLCD:
@@ -834,7 +982,9 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
834 info = priv->ch[i].info; 982 info = priv->ch[i].info;
835 info->fbops = &sh_mobile_lcdc_ops; 983 info->fbops = &sh_mobile_lcdc_ops;
836 info->var.xres = info->var.xres_virtual = cfg->lcd_cfg.xres; 984 info->var.xres = info->var.xres_virtual = cfg->lcd_cfg.xres;
837 info->var.yres = info->var.yres_virtual = cfg->lcd_cfg.yres; 985 info->var.yres = cfg->lcd_cfg.yres;
986 /* Default Y virtual resolution is 2x panel size */
987 info->var.yres_virtual = info->var.yres * 2;
838 info->var.width = cfg->lcd_size_cfg.width; 988 info->var.width = cfg->lcd_size_cfg.width;
839 info->var.height = cfg->lcd_size_cfg.height; 989 info->var.height = cfg->lcd_size_cfg.height;
840 info->var.activate = FB_ACTIVATE_NOW; 990 info->var.activate = FB_ACTIVATE_NOW;
@@ -844,7 +994,8 @@ static int __init sh_mobile_lcdc_probe(struct platform_device *pdev)
844 994
845 info->fix = sh_mobile_lcdc_fix; 995 info->fix = sh_mobile_lcdc_fix;
846 info->fix.line_length = cfg->lcd_cfg.xres * (cfg->bpp / 8); 996 info->fix.line_length = cfg->lcd_cfg.xres * (cfg->bpp / 8);
847 info->fix.smem_len = info->fix.line_length * cfg->lcd_cfg.yres; 997 info->fix.smem_len = info->fix.line_length *
998 info->var.yres_virtual;
848 999
849 buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len, 1000 buf = dma_alloc_coherent(&pdev->dev, info->fix.smem_len,
850 &priv->ch[i].dma_handle, GFP_KERNEL); 1001 &priv->ch[i].dma_handle, GFP_KERNEL);
@@ -947,11 +1098,10 @@ static int sh_mobile_lcdc_remove(struct platform_device *pdev)
947 framebuffer_release(info); 1098 framebuffer_release(info);
948 } 1099 }
949 1100
950#ifdef CONFIG_HAVE_CLK
951 if (priv->dot_clk) 1101 if (priv->dot_clk)
952 clk_put(priv->dot_clk); 1102 clk_put(priv->dot_clk);
953 clk_put(priv->clk); 1103
954#endif 1104 pm_runtime_disable(priv->dev);
955 1105
956 if (priv->base) 1106 if (priv->base)
957 iounmap(priv->base); 1107 iounmap(priv->base);
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index b1ccc04f3c9a..ff3eb8ff6bd7 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -55,6 +55,13 @@ config SOFT_WATCHDOG
55 To compile this driver as a module, choose M here: the 55 To compile this driver as a module, choose M here: the
56 module will be called softdog. 56 module will be called softdog.
57 57
58config WM831X_WATCHDOG
59 tristate "WM831x watchdog"
60 depends on MFD_WM831X
61 help
62 Support for the watchdog in the WM831x AudioPlus PMICs. When
63 the watchdog triggers the system will be reset.
64
58config WM8350_WATCHDOG 65config WM8350_WATCHDOG
59 tristate "WM8350 watchdog" 66 tristate "WM8350 watchdog"
60 depends on MFD_WM8350 67 depends on MFD_WM8350
@@ -266,6 +273,15 @@ config STMP3XXX_WATCHDOG
266 To compile this driver as a module, choose M here: the 273 To compile this driver as a module, choose M here: the
267 module will be called stmp3xxx_wdt. 274 module will be called stmp3xxx_wdt.
268 275
276config NUC900_WATCHDOG
277 tristate "Nuvoton NUC900 watchdog"
278 depends on ARCH_W90X900
279 help
280 Say Y here if to include support for the watchdog timer
281 for the Nuvoton NUC900 series SoCs.
282 To compile this driver as a module, choose M here: the
283 module will be called nuc900_wdt.
284
269# AVR32 Architecture 285# AVR32 Architecture
270 286
271config AT32AP700X_WDT 287config AT32AP700X_WDT
@@ -369,6 +385,28 @@ config SC520_WDT
369 You can compile this driver directly into the kernel, or use 385 You can compile this driver directly into the kernel, or use
370 it as a module. The module will be called sc520_wdt. 386 it as a module. The module will be called sc520_wdt.
371 387
388config SBC_FITPC2_WATCHDOG
389 tristate "Compulab SBC-FITPC2 watchdog"
390 depends on X86
391 ---help---
392 This is the driver for the built-in watchdog timer on the fit-PC2
393 Single-board computer made by Compulab.
394
395 It`s possible to enable watchdog timer either from BIOS (F2) or from booted Linux.
396 When "Watchdog Timer Value" enabled one can set 31-255 s operational range.
397
398 Entering BIOS setup temporary disables watchdog operation regardless to current state,
399 so system will not be restarted while user in BIOS setup.
400
401 Once watchdog was enabled the system will be restarted every
402 "Watchdog Timer Value" period, so to prevent it user can restart or
403 disable the watchdog.
404
405 To compile this driver as a module, choose M here: the
406 module will be called sbc_fitpc2_wdt.
407
408 Most people will say N.
409
372config EUROTECH_WDT 410config EUROTECH_WDT
373 tristate "Eurotech CPU-1220/1410 Watchdog Timer" 411 tristate "Eurotech CPU-1220/1410 Watchdog Timer"
374 depends on X86 412 depends on X86
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 3d774294a2b7..348b3b862c99 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_DAVINCI_WATCHDOG) += davinci_wdt.o
44obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o 44obj-$(CONFIG_ORION_WATCHDOG) += orion_wdt.o
45obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o 45obj-$(CONFIG_COH901327_WATCHDOG) += coh901327_wdt.o
46obj-$(CONFIG_STMP3XXX_WATCHDOG) += stmp3xxx_wdt.o 46obj-$(CONFIG_STMP3XXX_WATCHDOG) += stmp3xxx_wdt.o
47obj-$(CONFIG_NUC900_WATCHDOG) += nuc900_wdt.o
47 48
48# AVR32 Architecture 49# AVR32 Architecture
49obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o 50obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
@@ -64,6 +65,7 @@ obj-$(CONFIG_ALIM1535_WDT) += alim1535_wdt.o
64obj-$(CONFIG_ALIM7101_WDT) += alim7101_wdt.o 65obj-$(CONFIG_ALIM7101_WDT) += alim7101_wdt.o
65obj-$(CONFIG_GEODE_WDT) += geodewdt.o 66obj-$(CONFIG_GEODE_WDT) += geodewdt.o
66obj-$(CONFIG_SC520_WDT) += sc520_wdt.o 67obj-$(CONFIG_SC520_WDT) += sc520_wdt.o
68obj-$(CONFIG_SBC_FITPC2_WATCHDOG) += sbc_fitpc2_wdt.o
67obj-$(CONFIG_EUROTECH_WDT) += eurotechwdt.o 69obj-$(CONFIG_EUROTECH_WDT) += eurotechwdt.o
68obj-$(CONFIG_IB700_WDT) += ib700wdt.o 70obj-$(CONFIG_IB700_WDT) += ib700wdt.o
69obj-$(CONFIG_IBMASR) += ibmasr.o 71obj-$(CONFIG_IBMASR) += ibmasr.o
@@ -139,5 +141,6 @@ obj-$(CONFIG_WATCHDOG_CP1XXX) += cpwd.o
139# XTENSA Architecture 141# XTENSA Architecture
140 142
141# Architecture Independant 143# Architecture Independant
144obj-$(CONFIG_WM831X_WATCHDOG) += wm831x_wdt.o
142obj-$(CONFIG_WM8350_WATCHDOG) += wm8350_wdt.o 145obj-$(CONFIG_WM8350_WATCHDOG) += wm8350_wdt.o
143obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o 146obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o
diff --git a/drivers/watchdog/ar7_wdt.c b/drivers/watchdog/ar7_wdt.c
index 2f8643efe92c..2e94b71b20d9 100644
--- a/drivers/watchdog/ar7_wdt.c
+++ b/drivers/watchdog/ar7_wdt.c
@@ -28,9 +28,8 @@
28#include <linux/errno.h> 28#include <linux/errno.h>
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/miscdevice.h> 30#include <linux/miscdevice.h>
31#include <linux/platform_device.h>
31#include <linux/watchdog.h> 32#include <linux/watchdog.h>
32#include <linux/notifier.h>
33#include <linux/reboot.h>
34#include <linux/fs.h> 33#include <linux/fs.h>
35#include <linux/ioport.h> 34#include <linux/ioport.h>
36#include <linux/io.h> 35#include <linux/io.h>
@@ -76,24 +75,10 @@ static unsigned expect_close;
76/* XXX currently fixed, allows max margin ~68.72 secs */ 75/* XXX currently fixed, allows max margin ~68.72 secs */
77#define prescale_value 0xffff 76#define prescale_value 0xffff
78 77
79/* Offset of the WDT registers */ 78/* Resource of the WDT registers */
80static unsigned long ar7_regs_wdt; 79static struct resource *ar7_regs_wdt;
81/* Pointer to the remapped WDT IO space */ 80/* Pointer to the remapped WDT IO space */
82static struct ar7_wdt *ar7_wdt; 81static struct ar7_wdt *ar7_wdt;
83static void ar7_wdt_get_regs(void)
84{
85 u16 chip_id = ar7_chip_id();
86 switch (chip_id) {
87 case AR7_CHIP_7100:
88 case AR7_CHIP_7200:
89 ar7_regs_wdt = AR7_REGS_WDT;
90 break;
91 default:
92 ar7_regs_wdt = UR8_REGS_WDT;
93 break;
94 }
95}
96
97 82
98static void ar7_wdt_kick(u32 value) 83static void ar7_wdt_kick(u32 value)
99{ 84{
@@ -202,20 +187,6 @@ static int ar7_wdt_release(struct inode *inode, struct file *file)
202 return 0; 187 return 0;
203} 188}
204 189
205static int ar7_wdt_notify_sys(struct notifier_block *this,
206 unsigned long code, void *unused)
207{
208 if (code == SYS_HALT || code == SYS_POWER_OFF)
209 if (!nowayout)
210 ar7_wdt_disable_wdt();
211
212 return NOTIFY_DONE;
213}
214
215static struct notifier_block ar7_wdt_notifier = {
216 .notifier_call = ar7_wdt_notify_sys,
217};
218
219static ssize_t ar7_wdt_write(struct file *file, const char *data, 190static ssize_t ar7_wdt_write(struct file *file, const char *data,
220 size_t len, loff_t *ppos) 191 size_t len, loff_t *ppos)
221{ 192{
@@ -299,56 +270,86 @@ static struct miscdevice ar7_wdt_miscdev = {
299 .fops = &ar7_wdt_fops, 270 .fops = &ar7_wdt_fops,
300}; 271};
301 272
302static int __init ar7_wdt_init(void) 273static int __devinit ar7_wdt_probe(struct platform_device *pdev)
303{ 274{
304 int rc; 275 int rc;
305 276
306 spin_lock_init(&wdt_lock); 277 spin_lock_init(&wdt_lock);
307 278
308 ar7_wdt_get_regs(); 279 ar7_regs_wdt =
280 platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
281 if (!ar7_regs_wdt) {
282 printk(KERN_ERR DRVNAME ": could not get registers resource\n");
283 rc = -ENODEV;
284 goto out;
285 }
309 286
310 if (!request_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt), 287 if (!request_mem_region(ar7_regs_wdt->start,
311 LONGNAME)) { 288 resource_size(ar7_regs_wdt), LONGNAME)) {
312 printk(KERN_WARNING DRVNAME ": watchdog I/O region busy\n"); 289 printk(KERN_WARNING DRVNAME ": watchdog I/O region busy\n");
313 return -EBUSY; 290 rc = -EBUSY;
291 goto out;
314 } 292 }
315 293
316 ar7_wdt = (struct ar7_wdt *) 294 ar7_wdt = ioremap(ar7_regs_wdt->start, resource_size(ar7_regs_wdt));
317 ioremap(ar7_regs_wdt, sizeof(struct ar7_wdt)); 295 if (!ar7_wdt) {
296 printk(KERN_ERR DRVNAME ": could not ioremap registers\n");
297 rc = -ENXIO;
298 goto out_mem_region;
299 }
318 300
319 ar7_wdt_disable_wdt(); 301 ar7_wdt_disable_wdt();
320 ar7_wdt_prescale(prescale_value); 302 ar7_wdt_prescale(prescale_value);
321 ar7_wdt_update_margin(margin); 303 ar7_wdt_update_margin(margin);
322 304
323 rc = register_reboot_notifier(&ar7_wdt_notifier);
324 if (rc) {
325 printk(KERN_ERR DRVNAME
326 ": unable to register reboot notifier\n");
327 goto out_alloc;
328 }
329
330 rc = misc_register(&ar7_wdt_miscdev); 305 rc = misc_register(&ar7_wdt_miscdev);
331 if (rc) { 306 if (rc) {
332 printk(KERN_ERR DRVNAME ": unable to register misc device\n"); 307 printk(KERN_ERR DRVNAME ": unable to register misc device\n");
333 goto out_register; 308 goto out_alloc;
334 } 309 }
335 goto out; 310 goto out;
336 311
337out_register:
338 unregister_reboot_notifier(&ar7_wdt_notifier);
339out_alloc: 312out_alloc:
340 iounmap(ar7_wdt); 313 iounmap(ar7_wdt);
341 release_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt)); 314out_mem_region:
315 release_mem_region(ar7_regs_wdt->start, resource_size(ar7_regs_wdt));
342out: 316out:
343 return rc; 317 return rc;
344} 318}
345 319
346static void __exit ar7_wdt_cleanup(void) 320static int __devexit ar7_wdt_remove(struct platform_device *pdev)
347{ 321{
348 misc_deregister(&ar7_wdt_miscdev); 322 misc_deregister(&ar7_wdt_miscdev);
349 unregister_reboot_notifier(&ar7_wdt_notifier);
350 iounmap(ar7_wdt); 323 iounmap(ar7_wdt);
351 release_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt)); 324 release_mem_region(ar7_regs_wdt->start, resource_size(ar7_regs_wdt));
325
326 return 0;
327}
328
329static void ar7_wdt_shutdown(struct platform_device *pdev)
330{
331 if (!nowayout)
332 ar7_wdt_disable_wdt();
333}
334
335static struct platform_driver ar7_wdt_driver = {
336 .probe = ar7_wdt_probe,
337 .remove = __devexit_p(ar7_wdt_remove),
338 .shutdown = ar7_wdt_shutdown,
339 .driver = {
340 .owner = THIS_MODULE,
341 .name = "ar7_wdt",
342 },
343};
344
345static int __init ar7_wdt_init(void)
346{
347 return platform_driver_register(&ar7_wdt_driver);
348}
349
350static void __exit ar7_wdt_cleanup(void)
351{
352 platform_driver_unregister(&ar7_wdt_driver);
352} 353}
353 354
354module_init(ar7_wdt_init); 355module_init(ar7_wdt_init);
diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c
index 225398fd5049..e8380ef65c1c 100644
--- a/drivers/watchdog/booke_wdt.c
+++ b/drivers/watchdog/booke_wdt.c
@@ -22,6 +22,8 @@
22 22
23#include <asm/reg_booke.h> 23#include <asm/reg_booke.h>
24#include <asm/system.h> 24#include <asm/system.h>
25#include <asm/time.h>
26#include <asm/div64.h>
25 27
26/* If the kernel parameter wdt=1, the watchdog will be enabled at boot. 28/* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
27 * Also, the wdt_period sets the watchdog timer period timeout. 29 * Also, the wdt_period sets the watchdog timer period timeout.
@@ -32,7 +34,7 @@
32 */ 34 */
33 35
34#ifdef CONFIG_FSL_BOOKE 36#ifdef CONFIG_FSL_BOOKE
35#define WDT_PERIOD_DEFAULT 63 /* Ex. wdt_period=28 bus=333Mhz,reset=~40sec */ 37#define WDT_PERIOD_DEFAULT 38 /* Ex. wdt_period=28 bus=333Mhz,reset=~40sec */
36#else 38#else
37#define WDT_PERIOD_DEFAULT 3 /* Refer to the PPC40x and PPC4xx manuals */ 39#define WDT_PERIOD_DEFAULT 3 /* Refer to the PPC40x and PPC4xx manuals */
38#endif /* for timing information */ 40#endif /* for timing information */
@@ -41,7 +43,7 @@ u32 booke_wdt_enabled;
41u32 booke_wdt_period = WDT_PERIOD_DEFAULT; 43u32 booke_wdt_period = WDT_PERIOD_DEFAULT;
42 44
43#ifdef CONFIG_FSL_BOOKE 45#ifdef CONFIG_FSL_BOOKE
44#define WDTP(x) ((((63-x)&0x3)<<30)|(((63-x)&0x3c)<<15)) 46#define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
45#define WDTP_MASK (WDTP(0)) 47#define WDTP_MASK (WDTP(0))
46#else 48#else
47#define WDTP(x) (TCR_WP(x)) 49#define WDTP(x) (TCR_WP(x))
@@ -50,6 +52,45 @@ u32 booke_wdt_period = WDT_PERIOD_DEFAULT;
50 52
51static DEFINE_SPINLOCK(booke_wdt_lock); 53static DEFINE_SPINLOCK(booke_wdt_lock);
52 54
55/* For the specified period, determine the number of seconds
56 * corresponding to the reset time. There will be a watchdog
57 * exception at approximately 3/5 of this time.
58 *
59 * The formula to calculate this is given by:
60 * 2.5 * (2^(63-period+1)) / timebase_freq
61 *
62 * In order to simplify things, we assume that period is
63 * at least 1. This will still result in a very long timeout.
64 */
65static unsigned long long period_to_sec(unsigned int period)
66{
67 unsigned long long tmp = 1ULL << (64 - period);
68 unsigned long tmp2 = ppc_tb_freq;
69
70 /* tmp may be a very large number and we don't want to overflow,
71 * so divide the timebase freq instead of multiplying tmp
72 */
73 tmp2 = tmp2 / 5 * 2;
74
75 do_div(tmp, tmp2);
76 return tmp;
77}
78
79/*
80 * This procedure will find the highest period which will give a timeout
81 * greater than the one required. e.g. for a bus speed of 66666666 and
82 * and a parameter of 2 secs, then this procedure will return a value of 38.
83 */
84static unsigned int sec_to_period(unsigned int secs)
85{
86 unsigned int period;
87 for (period = 63; period > 0; period--) {
88 if (period_to_sec(period) >= secs)
89 return period;
90 }
91 return 0;
92}
93
53static void __booke_wdt_ping(void *data) 94static void __booke_wdt_ping(void *data)
54{ 95{
55 mtspr(SPRN_TSR, TSR_ENW|TSR_WIS); 96 mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
@@ -93,7 +134,7 @@ static long booke_wdt_ioctl(struct file *file,
93 134
94 switch (cmd) { 135 switch (cmd) {
95 case WDIOC_GETSUPPORT: 136 case WDIOC_GETSUPPORT:
96 if (copy_to_user(arg, &ident, sizeof(struct watchdog_info))) 137 if (copy_to_user((void *)arg, &ident, sizeof(ident)))
97 return -EFAULT; 138 return -EFAULT;
98 case WDIOC_GETSTATUS: 139 case WDIOC_GETSTATUS:
99 return put_user(ident.options, p); 140 return put_user(ident.options, p);
@@ -115,8 +156,16 @@ static long booke_wdt_ioctl(struct file *file,
115 booke_wdt_ping(); 156 booke_wdt_ping();
116 return 0; 157 return 0;
117 case WDIOC_SETTIMEOUT: 158 case WDIOC_SETTIMEOUT:
118 if (get_user(booke_wdt_period, p)) 159 if (get_user(tmp, p))
119 return -EFAULT; 160 return -EFAULT;
161#ifdef CONFIG_FSL_BOOKE
162 /* period of 1 gives the largest possible timeout */
163 if (tmp > period_to_sec(1))
164 return -EINVAL;
165 booke_wdt_period = sec_to_period(tmp);
166#else
167 booke_wdt_period = tmp;
168#endif
120 mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WDTP_MASK) | 169 mtspr(SPRN_TCR, (mfspr(SPRN_TCR) & ~WDTP_MASK) |
121 WDTP(booke_wdt_period)); 170 WDTP(booke_wdt_period));
122 return 0; 171 return 0;
diff --git a/drivers/watchdog/coh901327_wdt.c b/drivers/watchdog/coh901327_wdt.c
index aec7cefdef21..381026c0bd7b 100644
--- a/drivers/watchdog/coh901327_wdt.c
+++ b/drivers/watchdog/coh901327_wdt.c
@@ -110,7 +110,7 @@ static void coh901327_enable(u16 timeout)
110 * Wait 3 32 kHz cycles for it to take effect 110 * Wait 3 32 kHz cycles for it to take effect
111 */ 111 */
112 freq = clk_get_rate(clk); 112 freq = clk_get_rate(clk);
113 delay_ns = (1000000000 + freq - 1) / freq; /* Freq to ns and round up */ 113 delay_ns = DIV_ROUND_UP(1000000000, freq); /* Freq to ns and round up */
114 delay_ns = 3 * delay_ns; /* Wait 3 cycles */ 114 delay_ns = 3 * delay_ns; /* Wait 3 cycles */
115 ndelay(delay_ns); 115 ndelay(delay_ns);
116 /* Enable the watchdog interrupt */ 116 /* Enable the watchdog interrupt */
diff --git a/drivers/watchdog/davinci_wdt.c b/drivers/watchdog/davinci_wdt.c
index 83e22e7ea4a2..9d7520fa9e9c 100644
--- a/drivers/watchdog/davinci_wdt.c
+++ b/drivers/watchdog/davinci_wdt.c
@@ -25,6 +25,7 @@
25#include <linux/uaccess.h> 25#include <linux/uaccess.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/device.h> 27#include <linux/device.h>
28#include <linux/clk.h>
28 29
29#define MODULE_NAME "DAVINCI-WDT: " 30#define MODULE_NAME "DAVINCI-WDT: "
30 31
@@ -69,6 +70,7 @@ static unsigned long wdt_status;
69 70
70static struct resource *wdt_mem; 71static struct resource *wdt_mem;
71static void __iomem *wdt_base; 72static void __iomem *wdt_base;
73struct clk *wdt_clk;
72 74
73static void wdt_service(void) 75static void wdt_service(void)
74{ 76{
@@ -86,6 +88,9 @@ static void wdt_enable(void)
86{ 88{
87 u32 tgcr; 89 u32 tgcr;
88 u32 timer_margin; 90 u32 timer_margin;
91 unsigned long wdt_freq;
92
93 wdt_freq = clk_get_rate(wdt_clk);
89 94
90 spin_lock(&io_lock); 95 spin_lock(&io_lock);
91 96
@@ -99,9 +104,9 @@ static void wdt_enable(void)
99 iowrite32(0, wdt_base + TIM12); 104 iowrite32(0, wdt_base + TIM12);
100 iowrite32(0, wdt_base + TIM34); 105 iowrite32(0, wdt_base + TIM34);
101 /* set timeout period */ 106 /* set timeout period */
102 timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) & 0xffffffff); 107 timer_margin = (((u64)heartbeat * wdt_freq) & 0xffffffff);
103 iowrite32(timer_margin, wdt_base + PRD12); 108 iowrite32(timer_margin, wdt_base + PRD12);
104 timer_margin = (((u64)heartbeat * CLOCK_TICK_RATE) >> 32); 109 timer_margin = (((u64)heartbeat * wdt_freq) >> 32);
105 iowrite32(timer_margin, wdt_base + PRD34); 110 iowrite32(timer_margin, wdt_base + PRD34);
106 /* enable run continuously */ 111 /* enable run continuously */
107 iowrite32(ENAMODE12_PERIODIC, wdt_base + TCR); 112 iowrite32(ENAMODE12_PERIODIC, wdt_base + TCR);
@@ -199,6 +204,12 @@ static int __devinit davinci_wdt_probe(struct platform_device *pdev)
199 struct resource *res; 204 struct resource *res;
200 struct device *dev = &pdev->dev; 205 struct device *dev = &pdev->dev;
201 206
207 wdt_clk = clk_get(dev, NULL);
208 if (WARN_ON(IS_ERR(wdt_clk)))
209 return PTR_ERR(wdt_clk);
210
211 clk_enable(wdt_clk);
212
202 if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT) 213 if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
203 heartbeat = DEFAULT_HEARTBEAT; 214 heartbeat = DEFAULT_HEARTBEAT;
204 215
@@ -245,6 +256,10 @@ static int __devexit davinci_wdt_remove(struct platform_device *pdev)
245 kfree(wdt_mem); 256 kfree(wdt_mem);
246 wdt_mem = NULL; 257 wdt_mem = NULL;
247 } 258 }
259
260 clk_disable(wdt_clk);
261 clk_put(wdt_clk);
262
248 return 0; 263 return 0;
249} 264}
250 265
diff --git a/drivers/watchdog/iop_wdt.c b/drivers/watchdog/iop_wdt.c
index 0c9059676690..aef94789019f 100644
--- a/drivers/watchdog/iop_wdt.c
+++ b/drivers/watchdog/iop_wdt.c
@@ -139,7 +139,7 @@ static long iop_wdt_ioctl(struct file *file,
139 139
140 switch (cmd) { 140 switch (cmd) {
141 case WDIOC_GETSUPPORT: 141 case WDIOC_GETSUPPORT:
142 if (copy_to_user(argp, &ident, sizeof ident)) 142 if (copy_to_user(argp, &ident, sizeof(ident)))
143 ret = -EFAULT; 143 ret = -EFAULT;
144 else 144 else
145 ret = 0; 145 ret = 0;
diff --git a/drivers/watchdog/nuc900_wdt.c b/drivers/watchdog/nuc900_wdt.c
new file mode 100644
index 000000000000..adefe3a9d510
--- /dev/null
+++ b/drivers/watchdog/nuc900_wdt.c
@@ -0,0 +1,353 @@
1/*
2 * Copyright (c) 2009 Nuvoton technology corporation.
3 *
4 * Wan ZongShun <mcuos.com@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation;version 2 of the License.
9 *
10 */
11
12#include <linux/bitops.h>
13#include <linux/errno.h>
14#include <linux/fs.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <linux/clk.h>
18#include <linux/kernel.h>
19#include <linux/miscdevice.h>
20#include <linux/module.h>
21#include <linux/moduleparam.h>
22#include <linux/platform_device.h>
23#include <linux/interrupt.h>
24#include <linux/types.h>
25#include <linux/watchdog.h>
26#include <linux/uaccess.h>
27
28#define REG_WTCR 0x1c
29#define WTCLK (0x01 << 10)
30#define WTE (0x01 << 7) /*wdt enable*/
31#define WTIS (0x03 << 4)
32#define WTIF (0x01 << 3)
33#define WTRF (0x01 << 2)
34#define WTRE (0x01 << 1)
35#define WTR (0x01 << 0)
36/*
37 * The watchdog time interval can be calculated via following formula:
38 * WTIS real time interval (formula)
39 * 0x00 ((2^ 14 ) * ((external crystal freq) / 256))seconds
40 * 0x01 ((2^ 16 ) * ((external crystal freq) / 256))seconds
41 * 0x02 ((2^ 18 ) * ((external crystal freq) / 256))seconds
42 * 0x03 ((2^ 20 ) * ((external crystal freq) / 256))seconds
43 *
44 * The external crystal freq is 15Mhz in the nuc900 evaluation board.
45 * So 0x00 = +-0.28 seconds, 0x01 = +-1.12 seconds, 0x02 = +-4.48 seconds,
46 * 0x03 = +- 16.92 seconds..
47 */
48#define WDT_HW_TIMEOUT 0x02
49#define WDT_TIMEOUT (HZ/2)
50#define WDT_HEARTBEAT 15
51
52static int heartbeat = WDT_HEARTBEAT;
53module_param(heartbeat, int, 0);
54MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
55 "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
56
57static int nowayout = WATCHDOG_NOWAYOUT;
58module_param(nowayout, int, 0);
59MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
60 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
61
62struct nuc900_wdt {
63 struct resource *res;
64 struct clk *wdt_clock;
65 struct platform_device *pdev;
66 void __iomem *wdt_base;
67 char expect_close;
68 struct timer_list timer;
69 spinlock_t wdt_lock;
70 unsigned long next_heartbeat;
71};
72
73static unsigned long nuc900wdt_busy;
74struct nuc900_wdt *nuc900_wdt;
75
76static inline void nuc900_wdt_keepalive(void)
77{
78 unsigned int val;
79
80 spin_lock(&nuc900_wdt->wdt_lock);
81
82 val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
83 val |= (WTR | WTIF);
84 __raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
85
86 spin_unlock(&nuc900_wdt->wdt_lock);
87}
88
89static inline void nuc900_wdt_start(void)
90{
91 unsigned int val;
92
93 spin_lock(&nuc900_wdt->wdt_lock);
94
95 val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
96 val |= (WTRE | WTE | WTR | WTCLK | WTIF);
97 val &= ~WTIS;
98 val |= (WDT_HW_TIMEOUT << 0x04);
99 __raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
100
101 spin_unlock(&nuc900_wdt->wdt_lock);
102
103 nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
104 mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
105}
106
107static inline void nuc900_wdt_stop(void)
108{
109 unsigned int val;
110
111 del_timer(&nuc900_wdt->timer);
112
113 spin_lock(&nuc900_wdt->wdt_lock);
114
115 val = __raw_readl(nuc900_wdt->wdt_base + REG_WTCR);
116 val &= ~WTE;
117 __raw_writel(val, nuc900_wdt->wdt_base + REG_WTCR);
118
119 spin_unlock(&nuc900_wdt->wdt_lock);
120}
121
122static inline void nuc900_wdt_ping(void)
123{
124 nuc900_wdt->next_heartbeat = jiffies + heartbeat * HZ;
125}
126
127static int nuc900_wdt_open(struct inode *inode, struct file *file)
128{
129
130 if (test_and_set_bit(0, &nuc900wdt_busy))
131 return -EBUSY;
132
133 nuc900_wdt_start();
134
135 return nonseekable_open(inode, file);
136}
137
138static int nuc900_wdt_close(struct inode *inode, struct file *file)
139{
140 if (nuc900_wdt->expect_close == 42)
141 nuc900_wdt_stop();
142 else {
143 dev_crit(&nuc900_wdt->pdev->dev,
144 "Unexpected close, not stopping watchdog!\n");
145 nuc900_wdt_ping();
146 }
147
148 nuc900_wdt->expect_close = 0;
149 clear_bit(0, &nuc900wdt_busy);
150 return 0;
151}
152
153static const struct watchdog_info nuc900_wdt_info = {
154 .identity = "nuc900 watchdog",
155 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
156 WDIOF_MAGICCLOSE,
157};
158
159static long nuc900_wdt_ioctl(struct file *file,
160 unsigned int cmd, unsigned long arg)
161{
162 void __user *argp = (void __user *)arg;
163 int __user *p = argp;
164 int new_value;
165
166 switch (cmd) {
167 case WDIOC_GETSUPPORT:
168 return copy_to_user(argp, &nuc900_wdt_info,
169 sizeof(nuc900_wdt_info)) ? -EFAULT : 0;
170 case WDIOC_GETSTATUS:
171 case WDIOC_GETBOOTSTATUS:
172 return put_user(0, p);
173
174 case WDIOC_KEEPALIVE:
175 nuc900_wdt_ping();
176 return 0;
177
178 case WDIOC_SETTIMEOUT:
179 if (get_user(new_value, p))
180 return -EFAULT;
181
182 heartbeat = new_value;
183 nuc900_wdt_ping();
184
185 return put_user(new_value, p);
186 case WDIOC_GETTIMEOUT:
187 return put_user(heartbeat, p);
188 default:
189 return -ENOTTY;
190 }
191}
192
193static ssize_t nuc900_wdt_write(struct file *file, const char __user *data,
194 size_t len, loff_t *ppos)
195{
196 if (!len)
197 return 0;
198
199 /* Scan for magic character */
200 if (!nowayout) {
201 size_t i;
202
203 nuc900_wdt->expect_close = 0;
204
205 for (i = 0; i < len; i++) {
206 char c;
207 if (get_user(c, data + i))
208 return -EFAULT;
209 if (c == 'V') {
210 nuc900_wdt->expect_close = 42;
211 break;
212 }
213 }
214 }
215
216 nuc900_wdt_ping();
217 return len;
218}
219
220static void nuc900_wdt_timer_ping(unsigned long data)
221{
222 if (time_before(jiffies, nuc900_wdt->next_heartbeat)) {
223 nuc900_wdt_keepalive();
224 mod_timer(&nuc900_wdt->timer, jiffies + WDT_TIMEOUT);
225 } else
226 dev_warn(&nuc900_wdt->pdev->dev, "Will reset the machine !\n");
227}
228
229static const struct file_operations nuc900wdt_fops = {
230 .owner = THIS_MODULE,
231 .llseek = no_llseek,
232 .unlocked_ioctl = nuc900_wdt_ioctl,
233 .open = nuc900_wdt_open,
234 .release = nuc900_wdt_close,
235 .write = nuc900_wdt_write,
236};
237
238static struct miscdevice nuc900wdt_miscdev = {
239 .minor = WATCHDOG_MINOR,
240 .name = "watchdog",
241 .fops = &nuc900wdt_fops,
242};
243
244static int __devinit nuc900wdt_probe(struct platform_device *pdev)
245{
246 int ret = 0;
247
248 nuc900_wdt = kzalloc(sizeof(struct nuc900_wdt), GFP_KERNEL);
249 if (!nuc900_wdt)
250 return -ENOMEM;
251
252 nuc900_wdt->pdev = pdev;
253
254 spin_lock_init(&nuc900_wdt->wdt_lock);
255
256 nuc900_wdt->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
257 if (nuc900_wdt->res == NULL) {
258 dev_err(&pdev->dev, "no memory resource specified\n");
259 ret = -ENOENT;
260 goto err_get;
261 }
262
263 if (!request_mem_region(nuc900_wdt->res->start,
264 resource_size(nuc900_wdt->res), pdev->name)) {
265 dev_err(&pdev->dev, "failed to get memory region\n");
266 ret = -ENOENT;
267 goto err_get;
268 }
269
270 nuc900_wdt->wdt_base = ioremap(nuc900_wdt->res->start,
271 resource_size(nuc900_wdt->res));
272 if (nuc900_wdt->wdt_base == NULL) {
273 dev_err(&pdev->dev, "failed to ioremap() region\n");
274 ret = -EINVAL;
275 goto err_req;
276 }
277
278 nuc900_wdt->wdt_clock = clk_get(&pdev->dev, NULL);
279 if (IS_ERR(nuc900_wdt->wdt_clock)) {
280 dev_err(&pdev->dev, "failed to find watchdog clock source\n");
281 ret = PTR_ERR(nuc900_wdt->wdt_clock);
282 goto err_map;
283 }
284
285 clk_enable(nuc900_wdt->wdt_clock);
286
287 setup_timer(&nuc900_wdt->timer, nuc900_wdt_timer_ping, 0);
288
289 if (misc_register(&nuc900wdt_miscdev)) {
290 dev_err(&pdev->dev, "err register miscdev on minor=%d (%d)\n",
291 WATCHDOG_MINOR, ret);
292 goto err_clk;
293 }
294
295 return 0;
296
297err_clk:
298 clk_disable(nuc900_wdt->wdt_clock);
299 clk_put(nuc900_wdt->wdt_clock);
300err_map:
301 iounmap(nuc900_wdt->wdt_base);
302err_req:
303 release_mem_region(nuc900_wdt->res->start,
304 resource_size(nuc900_wdt->res));
305err_get:
306 kfree(nuc900_wdt);
307 return ret;
308}
309
310static int __devexit nuc900wdt_remove(struct platform_device *pdev)
311{
312 misc_deregister(&nuc900wdt_miscdev);
313
314 clk_disable(nuc900_wdt->wdt_clock);
315 clk_put(nuc900_wdt->wdt_clock);
316
317 iounmap(nuc900_wdt->wdt_base);
318
319 release_mem_region(nuc900_wdt->res->start,
320 resource_size(nuc900_wdt->res));
321
322 kfree(nuc900_wdt);
323
324 return 0;
325}
326
327static struct platform_driver nuc900wdt_driver = {
328 .probe = nuc900wdt_probe,
329 .remove = __devexit_p(nuc900wdt_remove),
330 .driver = {
331 .name = "nuc900-wdt",
332 .owner = THIS_MODULE,
333 },
334};
335
336static int __init nuc900_wdt_init(void)
337{
338 return platform_driver_register(&nuc900wdt_driver);
339}
340
341static void __exit nuc900_wdt_exit(void)
342{
343 platform_driver_unregister(&nuc900wdt_driver);
344}
345
346module_init(nuc900_wdt_init);
347module_exit(nuc900_wdt_exit);
348
349MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
350MODULE_DESCRIPTION("Watchdog driver for NUC900");
351MODULE_LICENSE("GPL");
352MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
353MODULE_ALIAS("platform:nuc900-wdt");
diff --git a/drivers/watchdog/rm9k_wdt.c b/drivers/watchdog/rm9k_wdt.c
index 2e4442642262..bb66958b9433 100644
--- a/drivers/watchdog/rm9k_wdt.c
+++ b/drivers/watchdog/rm9k_wdt.c
@@ -340,7 +340,7 @@ static const struct resource *wdt_gpi_get_resource(struct platform_device *pdv,
340 const char *name, unsigned int type) 340 const char *name, unsigned int type)
341{ 341{
342 char buf[80]; 342 char buf[80];
343 if (snprintf(buf, sizeof buf, "%s_0", name) >= sizeof buf) 343 if (snprintf(buf, sizeof(buf), "%s_0", name) >= sizeof(buf))
344 return NULL; 344 return NULL;
345 return platform_get_resource_byname(pdv, type, buf); 345 return platform_get_resource_byname(pdv, type, buf);
346} 346}
diff --git a/drivers/watchdog/sbc_fitpc2_wdt.c b/drivers/watchdog/sbc_fitpc2_wdt.c
new file mode 100644
index 000000000000..852ca1977917
--- /dev/null
+++ b/drivers/watchdog/sbc_fitpc2_wdt.c
@@ -0,0 +1,267 @@
1/*
2 * Watchdog driver for SBC-FITPC2 board
3 *
4 * Author: Denis Turischev <denis@compulab.co.il>
5 *
6 * Adapted from the IXP2000 watchdog driver by Deepak Saxena.
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#define pr_fmt(fmt) KBUILD_MODNAME " WATCHDOG: " fmt
14
15#include <linux/module.h>
16#include <linux/types.h>
17#include <linux/miscdevice.h>
18#include <linux/watchdog.h>
19#include <linux/ioport.h>
20#include <linux/delay.h>
21#include <linux/fs.h>
22#include <linux/init.h>
23#include <linux/moduleparam.h>
24#include <linux/dmi.h>
25#include <linux/io.h>
26#include <linux/uaccess.h>
27
28#include <asm/system.h>
29
30static int nowayout = WATCHDOG_NOWAYOUT;
31static unsigned int margin = 60; /* (secs) Default is 1 minute */
32static unsigned long wdt_status;
33static DEFINE_SPINLOCK(wdt_lock);
34
35#define WDT_IN_USE 0
36#define WDT_OK_TO_CLOSE 1
37
38#define COMMAND_PORT 0x4c
39#define DATA_PORT 0x48
40
41#define IFACE_ON_COMMAND 1
42#define REBOOT_COMMAND 2
43
44#define WATCHDOG_NAME "SBC-FITPC2 Watchdog"
45
46static void wdt_send_data(unsigned char command, unsigned char data)
47{
48 outb(command, COMMAND_PORT);
49 mdelay(100);
50 outb(data, DATA_PORT);
51 mdelay(200);
52}
53
54static void wdt_enable(void)
55{
56 spin_lock(&wdt_lock);
57 wdt_send_data(IFACE_ON_COMMAND, 1);
58 wdt_send_data(REBOOT_COMMAND, margin);
59 spin_unlock(&wdt_lock);
60}
61
62static void wdt_disable(void)
63{
64 spin_lock(&wdt_lock);
65 wdt_send_data(IFACE_ON_COMMAND, 0);
66 wdt_send_data(REBOOT_COMMAND, 0);
67 spin_unlock(&wdt_lock);
68}
69
70static int fitpc2_wdt_open(struct inode *inode, struct file *file)
71{
72 if (test_and_set_bit(WDT_IN_USE, &wdt_status))
73 return -EBUSY;
74
75 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
76
77 wdt_enable();
78
79 return nonseekable_open(inode, file);
80}
81
82static ssize_t fitpc2_wdt_write(struct file *file, const char *data,
83 size_t len, loff_t *ppos)
84{
85 size_t i;
86
87 if (!len)
88 return 0;
89
90 if (nowayout) {
91 len = 0;
92 goto out;
93 }
94
95 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
96
97 for (i = 0; i != len; i++) {
98 char c;
99
100 if (get_user(c, data + i))
101 return -EFAULT;
102
103 if (c == 'V')
104 set_bit(WDT_OK_TO_CLOSE, &wdt_status);
105 }
106
107out:
108 wdt_enable();
109
110 return len;
111}
112
113
114static struct watchdog_info ident = {
115 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT |
116 WDIOF_KEEPALIVEPING,
117 .identity = WATCHDOG_NAME,
118};
119
120
121static long fitpc2_wdt_ioctl(struct file *file, unsigned int cmd,
122 unsigned long arg)
123{
124 int ret = -ENOTTY;
125 int time;
126
127 switch (cmd) {
128 case WDIOC_GETSUPPORT:
129 ret = copy_to_user((struct watchdog_info *)arg, &ident,
130 sizeof(ident)) ? -EFAULT : 0;
131 break;
132
133 case WDIOC_GETSTATUS:
134 ret = put_user(0, (int *)arg);
135 break;
136
137 case WDIOC_GETBOOTSTATUS:
138 ret = put_user(0, (int *)arg);
139 break;
140
141 case WDIOC_KEEPALIVE:
142 wdt_enable();
143 ret = 0;
144 break;
145
146 case WDIOC_SETTIMEOUT:
147 ret = get_user(time, (int *)arg);
148 if (ret)
149 break;
150
151 if (time < 31 || time > 255) {
152 ret = -EINVAL;
153 break;
154 }
155
156 margin = time;
157 wdt_enable();
158 /* Fall through */
159
160 case WDIOC_GETTIMEOUT:
161 ret = put_user(margin, (int *)arg);
162 break;
163 }
164
165 return ret;
166}
167
168static int fitpc2_wdt_release(struct inode *inode, struct file *file)
169{
170 if (test_bit(WDT_OK_TO_CLOSE, &wdt_status)) {
171 wdt_disable();
172 pr_info("Device disabled\n");
173 } else {
174 pr_warning("Device closed unexpectedly -"
175 " timer will not stop\n");
176 wdt_enable();
177 }
178
179 clear_bit(WDT_IN_USE, &wdt_status);
180 clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
181
182 return 0;
183}
184
185
186static const struct file_operations fitpc2_wdt_fops = {
187 .owner = THIS_MODULE,
188 .llseek = no_llseek,
189 .write = fitpc2_wdt_write,
190 .unlocked_ioctl = fitpc2_wdt_ioctl,
191 .open = fitpc2_wdt_open,
192 .release = fitpc2_wdt_release,
193};
194
195static struct miscdevice fitpc2_wdt_miscdev = {
196 .minor = WATCHDOG_MINOR,
197 .name = "watchdog",
198 .fops = &fitpc2_wdt_fops,
199};
200
201static int __init fitpc2_wdt_init(void)
202{
203 int err;
204
205 if (strcmp("SBC-FITPC2", dmi_get_system_info(DMI_BOARD_NAME))) {
206 pr_info("board name is: %s. Should be SBC-FITPC2\n",
207 dmi_get_system_info(DMI_BOARD_NAME));
208 return -ENODEV;
209 }
210
211 if (!request_region(COMMAND_PORT, 1, WATCHDOG_NAME)) {
212 pr_err("I/O address 0x%04x already in use\n", COMMAND_PORT);
213 return -EIO;
214 }
215
216 if (!request_region(DATA_PORT, 1, WATCHDOG_NAME)) {
217 pr_err("I/O address 0x%04x already in use\n", DATA_PORT);
218 err = -EIO;
219 goto err_data_port;
220 }
221
222 if (margin < 31 || margin > 255) {
223 pr_err("margin must be in range 31 - 255"
224 " seconds, you tried to set %d\n", margin);
225 err = -EINVAL;
226 goto err_margin;
227 }
228
229 err = misc_register(&fitpc2_wdt_miscdev);
230 if (!err) {
231 pr_err("cannot register miscdev on minor=%d (err=%d)\n",
232 WATCHDOG_MINOR, err);
233 goto err_margin;
234 }
235
236 return 0;
237
238err_margin:
239 release_region(DATA_PORT, 1);
240err_data_port:
241 release_region(COMMAND_PORT, 1);
242
243 return err;
244}
245
246static void __exit fitpc2_wdt_exit(void)
247{
248 misc_deregister(&fitpc2_wdt_miscdev);
249 release_region(DATA_PORT, 1);
250 release_region(COMMAND_PORT, 1);
251}
252
253module_init(fitpc2_wdt_init);
254module_exit(fitpc2_wdt_exit);
255
256MODULE_AUTHOR("Denis Turischev <denis@compulab.co.il>");
257MODULE_DESCRIPTION("SBC-FITPC2 Watchdog");
258
259module_param(margin, int, 0);
260MODULE_PARM_DESC(margin, "Watchdog margin in seconds (default 60s)");
261
262module_param(nowayout, int, 0);
263MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
264
265MODULE_LICENSE("GPL");
266MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
267
diff --git a/drivers/watchdog/sc1200wdt.c b/drivers/watchdog/sc1200wdt.c
index b5e19c1820a2..c01daca8405a 100644
--- a/drivers/watchdog/sc1200wdt.c
+++ b/drivers/watchdog/sc1200wdt.c
@@ -197,7 +197,7 @@ static long sc1200wdt_ioctl(struct file *file, unsigned int cmd,
197 197
198 switch (cmd) { 198 switch (cmd) {
199 case WDIOC_GETSUPPORT: 199 case WDIOC_GETSUPPORT:
200 if (copy_to_user(argp, &ident, sizeof ident)) 200 if (copy_to_user(argp, &ident, sizeof(ident)))
201 return -EFAULT; 201 return -EFAULT;
202 return 0; 202 return 0;
203 203
diff --git a/drivers/watchdog/wdt_pci.c b/drivers/watchdog/wdt_pci.c
index 7a1bdc7c95a9..f368dd87083a 100644
--- a/drivers/watchdog/wdt_pci.c
+++ b/drivers/watchdog/wdt_pci.c
@@ -80,7 +80,7 @@ static unsigned long open_lock;
80static DEFINE_SPINLOCK(wdtpci_lock); 80static DEFINE_SPINLOCK(wdtpci_lock);
81static char expect_close; 81static char expect_close;
82 82
83static int io; 83static resource_size_t io;
84static int irq; 84static int irq;
85 85
86/* Default timeout */ 86/* Default timeout */
@@ -647,14 +647,15 @@ static int __devinit wdtpci_init_one(struct pci_dev *dev,
647 goto out_pci; 647 goto out_pci;
648 } 648 }
649 649
650 irq = dev->irq; 650 if (pci_request_region(dev, 2, "wdt_pci")) {
651 io = pci_resource_start(dev, 2); 651 printk(KERN_ERR PFX "I/O address 0x%llx already in use\n",
652 652 (unsigned long long)pci_resource_start(dev, 2));
653 if (request_region(io, 16, "wdt_pci") == NULL) {
654 printk(KERN_ERR PFX "I/O address 0x%04x already in use\n", io);
655 goto out_pci; 653 goto out_pci;
656 } 654 }
657 655
656 irq = dev->irq;
657 io = pci_resource_start(dev, 2);
658
658 if (request_irq(irq, wdtpci_interrupt, IRQF_DISABLED | IRQF_SHARED, 659 if (request_irq(irq, wdtpci_interrupt, IRQF_DISABLED | IRQF_SHARED,
659 "wdt_pci", &wdtpci_miscdev)) { 660 "wdt_pci", &wdtpci_miscdev)) {
660 printk(KERN_ERR PFX "IRQ %d is not free\n", irq); 661 printk(KERN_ERR PFX "IRQ %d is not free\n", irq);
@@ -662,8 +663,8 @@ static int __devinit wdtpci_init_one(struct pci_dev *dev,
662 } 663 }
663 664
664 printk(KERN_INFO 665 printk(KERN_INFO
665 "PCI-WDT500/501 (PCI-WDG-CSM) driver 0.10 at 0x%04x (Interrupt %d)\n", 666 "PCI-WDT500/501 (PCI-WDG-CSM) driver 0.10 at 0x%llx (Interrupt %d)\n",
666 io, irq); 667 (unsigned long long)io, irq);
667 668
668 /* Check that the heartbeat value is within its range; 669 /* Check that the heartbeat value is within its range;
669 if not reset to the default */ 670 if not reset to the default */
@@ -717,7 +718,7 @@ out_rbt:
717out_irq: 718out_irq:
718 free_irq(irq, &wdtpci_miscdev); 719 free_irq(irq, &wdtpci_miscdev);
719out_reg: 720out_reg:
720 release_region(io, 16); 721 pci_release_region(dev, 2);
721out_pci: 722out_pci:
722 pci_disable_device(dev); 723 pci_disable_device(dev);
723 goto out; 724 goto out;
@@ -733,7 +734,7 @@ static void __devexit wdtpci_remove_one(struct pci_dev *pdev)
733 misc_deregister(&temp_miscdev); 734 misc_deregister(&temp_miscdev);
734 unregister_reboot_notifier(&wdtpci_notifier); 735 unregister_reboot_notifier(&wdtpci_notifier);
735 free_irq(irq, &wdtpci_miscdev); 736 free_irq(irq, &wdtpci_miscdev);
736 release_region(io, 16); 737 pci_release_region(pdev, 2);
737 pci_disable_device(pdev); 738 pci_disable_device(pdev);
738 dev_count--; 739 dev_count--;
739} 740}
diff --git a/drivers/watchdog/wm831x_wdt.c b/drivers/watchdog/wm831x_wdt.c
new file mode 100644
index 000000000000..775bcd807f31
--- /dev/null
+++ b/drivers/watchdog/wm831x_wdt.c
@@ -0,0 +1,441 @@
1/*
2 * Watchdog driver for the wm831x PMICs
3 *
4 * Copyright (C) 2009 Wolfson Microelectronics
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation
9 */
10
11#include <linux/module.h>
12#include <linux/moduleparam.h>
13#include <linux/types.h>
14#include <linux/kernel.h>
15#include <linux/fs.h>
16#include <linux/miscdevice.h>
17#include <linux/platform_device.h>
18#include <linux/watchdog.h>
19#include <linux/uaccess.h>
20#include <linux/gpio.h>
21
22#include <linux/mfd/wm831x/core.h>
23#include <linux/mfd/wm831x/pdata.h>
24#include <linux/mfd/wm831x/watchdog.h>
25
26static int nowayout = WATCHDOG_NOWAYOUT;
27module_param(nowayout, int, 0);
28MODULE_PARM_DESC(nowayout,
29 "Watchdog cannot be stopped once started (default="
30 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
31
32static unsigned long wm831x_wdt_users;
33static struct miscdevice wm831x_wdt_miscdev;
34static int wm831x_wdt_expect_close;
35static DEFINE_MUTEX(wdt_mutex);
36static struct wm831x *wm831x;
37static unsigned int update_gpio;
38static unsigned int update_state;
39
40/* We can't use the sub-second values here but they're included
41 * for completeness. */
42static struct {
43 int time; /* Seconds */
44 u16 val; /* WDOG_TO value */
45} wm831x_wdt_cfgs[] = {
46 { 1, 2 },
47 { 2, 3 },
48 { 4, 4 },
49 { 8, 5 },
50 { 16, 6 },
51 { 32, 7 },
52 { 33, 7 }, /* Actually 32.768s so include both, others round down */
53};
54
55static int wm831x_wdt_set_timeout(struct wm831x *wm831x, u16 value)
56{
57 int ret;
58
59 mutex_lock(&wdt_mutex);
60
61 ret = wm831x_reg_unlock(wm831x);
62 if (ret == 0) {
63 ret = wm831x_set_bits(wm831x, WM831X_WATCHDOG,
64 WM831X_WDOG_TO_MASK, value);
65 wm831x_reg_lock(wm831x);
66 } else {
67 dev_err(wm831x->dev, "Failed to unlock security key: %d\n",
68 ret);
69 }
70
71 mutex_unlock(&wdt_mutex);
72
73 return ret;
74}
75
76static int wm831x_wdt_start(struct wm831x *wm831x)
77{
78 int ret;
79
80 mutex_lock(&wdt_mutex);
81
82 ret = wm831x_reg_unlock(wm831x);
83 if (ret == 0) {
84 ret = wm831x_set_bits(wm831x, WM831X_WATCHDOG,
85 WM831X_WDOG_ENA, WM831X_WDOG_ENA);
86 wm831x_reg_lock(wm831x);
87 } else {
88 dev_err(wm831x->dev, "Failed to unlock security key: %d\n",
89 ret);
90 }
91
92 mutex_unlock(&wdt_mutex);
93
94 return ret;
95}
96
97static int wm831x_wdt_stop(struct wm831x *wm831x)
98{
99 int ret;
100
101 mutex_lock(&wdt_mutex);
102
103 ret = wm831x_reg_unlock(wm831x);
104 if (ret == 0) {
105 ret = wm831x_set_bits(wm831x, WM831X_WATCHDOG,
106 WM831X_WDOG_ENA, 0);
107 wm831x_reg_lock(wm831x);
108 } else {
109 dev_err(wm831x->dev, "Failed to unlock security key: %d\n",
110 ret);
111 }
112
113 mutex_unlock(&wdt_mutex);
114
115 return ret;
116}
117
118static int wm831x_wdt_kick(struct wm831x *wm831x)
119{
120 int ret;
121 u16 reg;
122
123 mutex_lock(&wdt_mutex);
124
125 if (update_gpio) {
126 gpio_set_value_cansleep(update_gpio, update_state);
127 update_state = !update_state;
128 ret = 0;
129 goto out;
130 }
131
132
133 reg = wm831x_reg_read(wm831x, WM831X_WATCHDOG);
134
135 if (!(reg & WM831X_WDOG_RST_SRC)) {
136 dev_err(wm831x->dev, "Hardware watchdog update unsupported\n");
137 ret = -EINVAL;
138 goto out;
139 }
140
141 reg |= WM831X_WDOG_RESET;
142
143 ret = wm831x_reg_unlock(wm831x);
144 if (ret == 0) {
145 ret = wm831x_reg_write(wm831x, WM831X_WATCHDOG, reg);
146 wm831x_reg_lock(wm831x);
147 } else {
148 dev_err(wm831x->dev, "Failed to unlock security key: %d\n",
149 ret);
150 }
151
152out:
153 mutex_unlock(&wdt_mutex);
154
155 return ret;
156}
157
158static int wm831x_wdt_open(struct inode *inode, struct file *file)
159{
160 int ret;
161
162 if (!wm831x)
163 return -ENODEV;
164
165 if (test_and_set_bit(0, &wm831x_wdt_users))
166 return -EBUSY;
167
168 ret = wm831x_wdt_start(wm831x);
169 if (ret != 0)
170 return ret;
171
172 return nonseekable_open(inode, file);
173}
174
175static int wm831x_wdt_release(struct inode *inode, struct file *file)
176{
177 if (wm831x_wdt_expect_close)
178 wm831x_wdt_stop(wm831x);
179 else {
180 dev_warn(wm831x->dev, "Watchdog device closed uncleanly\n");
181 wm831x_wdt_kick(wm831x);
182 }
183
184 clear_bit(0, &wm831x_wdt_users);
185
186 return 0;
187}
188
189static ssize_t wm831x_wdt_write(struct file *file,
190 const char __user *data, size_t count,
191 loff_t *ppos)
192{
193 size_t i;
194
195 if (count) {
196 wm831x_wdt_kick(wm831x);
197
198 if (!nowayout) {
199 /* In case it was set long ago */
200 wm831x_wdt_expect_close = 0;
201
202 /* scan to see whether or not we got the magic
203 character */
204 for (i = 0; i != count; i++) {
205 char c;
206 if (get_user(c, data + i))
207 return -EFAULT;
208 if (c == 'V')
209 wm831x_wdt_expect_close = 42;
210 }
211 }
212 }
213 return count;
214}
215
216static struct watchdog_info ident = {
217 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
218 .identity = "WM831x Watchdog",
219};
220
221static long wm831x_wdt_ioctl(struct file *file, unsigned int cmd,
222 unsigned long arg)
223{
224 int ret = -ENOTTY, time, i;
225 void __user *argp = (void __user *)arg;
226 int __user *p = argp;
227 u16 reg;
228
229 switch (cmd) {
230 case WDIOC_GETSUPPORT:
231 ret = copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
232 break;
233
234 case WDIOC_GETSTATUS:
235 case WDIOC_GETBOOTSTATUS:
236 ret = put_user(0, p);
237 break;
238
239 case WDIOC_SETOPTIONS:
240 {
241 int options;
242
243 if (get_user(options, p))
244 return -EFAULT;
245
246 ret = -EINVAL;
247
248 /* Setting both simultaneously means at least one must fail */
249 if (options == WDIOS_DISABLECARD)
250 ret = wm831x_wdt_start(wm831x);
251
252 if (options == WDIOS_ENABLECARD)
253 ret = wm831x_wdt_stop(wm831x);
254 break;
255 }
256
257 case WDIOC_KEEPALIVE:
258 ret = wm831x_wdt_kick(wm831x);
259 break;
260
261 case WDIOC_SETTIMEOUT:
262 ret = get_user(time, p);
263 if (ret)
264 break;
265
266 if (time == 0) {
267 if (nowayout)
268 ret = -EINVAL;
269 else
270 wm831x_wdt_stop(wm831x);
271 break;
272 }
273
274 for (i = 0; i < ARRAY_SIZE(wm831x_wdt_cfgs); i++)
275 if (wm831x_wdt_cfgs[i].time == time)
276 break;
277 if (i == ARRAY_SIZE(wm831x_wdt_cfgs))
278 ret = -EINVAL;
279 else
280 ret = wm831x_wdt_set_timeout(wm831x,
281 wm831x_wdt_cfgs[i].val);
282 break;
283
284 case WDIOC_GETTIMEOUT:
285 reg = wm831x_reg_read(wm831x, WM831X_WATCHDOG);
286 reg &= WM831X_WDOG_TO_MASK;
287 for (i = 0; i < ARRAY_SIZE(wm831x_wdt_cfgs); i++)
288 if (wm831x_wdt_cfgs[i].val == reg)
289 break;
290 if (i == ARRAY_SIZE(wm831x_wdt_cfgs)) {
291 dev_warn(wm831x->dev,
292 "Unknown watchdog configuration: %x\n", reg);
293 ret = -EINVAL;
294 } else
295 ret = put_user(wm831x_wdt_cfgs[i].time, p);
296
297 }
298
299 return ret;
300}
301
302static const struct file_operations wm831x_wdt_fops = {
303 .owner = THIS_MODULE,
304 .llseek = no_llseek,
305 .write = wm831x_wdt_write,
306 .unlocked_ioctl = wm831x_wdt_ioctl,
307 .open = wm831x_wdt_open,
308 .release = wm831x_wdt_release,
309};
310
311static struct miscdevice wm831x_wdt_miscdev = {
312 .minor = WATCHDOG_MINOR,
313 .name = "watchdog",
314 .fops = &wm831x_wdt_fops,
315};
316
317static int __devinit wm831x_wdt_probe(struct platform_device *pdev)
318{
319 struct wm831x_pdata *chip_pdata;
320 struct wm831x_watchdog_pdata *pdata;
321 int reg, ret;
322
323 wm831x = dev_get_drvdata(pdev->dev.parent);
324
325 ret = wm831x_reg_read(wm831x, WM831X_WATCHDOG);
326 if (ret < 0) {
327 dev_err(wm831x->dev, "Failed to read watchdog status: %d\n",
328 ret);
329 goto err;
330 }
331 reg = ret;
332
333 if (reg & WM831X_WDOG_DEBUG)
334 dev_warn(wm831x->dev, "Watchdog is paused\n");
335
336 /* Apply any configuration */
337 if (pdev->dev.parent->platform_data) {
338 chip_pdata = pdev->dev.parent->platform_data;
339 pdata = chip_pdata->watchdog;
340 } else {
341 pdata = NULL;
342 }
343
344 if (pdata) {
345 reg &= ~(WM831X_WDOG_SECACT_MASK | WM831X_WDOG_PRIMACT_MASK |
346 WM831X_WDOG_RST_SRC);
347
348 reg |= pdata->primary << WM831X_WDOG_PRIMACT_SHIFT;
349 reg |= pdata->secondary << WM831X_WDOG_SECACT_SHIFT;
350 reg |= pdata->software << WM831X_WDOG_RST_SRC_SHIFT;
351
352 if (pdata->update_gpio) {
353 ret = gpio_request(pdata->update_gpio,
354 "Watchdog update");
355 if (ret < 0) {
356 dev_err(wm831x->dev,
357 "Failed to request update GPIO: %d\n",
358 ret);
359 goto err;
360 }
361
362 ret = gpio_direction_output(pdata->update_gpio, 0);
363 if (ret != 0) {
364 dev_err(wm831x->dev,
365 "gpio_direction_output returned: %d\n",
366 ret);
367 goto err_gpio;
368 }
369
370 update_gpio = pdata->update_gpio;
371
372 /* Make sure the watchdog takes hardware updates */
373 reg |= WM831X_WDOG_RST_SRC;
374 }
375
376 ret = wm831x_reg_unlock(wm831x);
377 if (ret == 0) {
378 ret = wm831x_reg_write(wm831x, WM831X_WATCHDOG, reg);
379 wm831x_reg_lock(wm831x);
380 } else {
381 dev_err(wm831x->dev,
382 "Failed to unlock security key: %d\n", ret);
383 goto err_gpio;
384 }
385 }
386
387 wm831x_wdt_miscdev.parent = &pdev->dev;
388
389 ret = misc_register(&wm831x_wdt_miscdev);
390 if (ret != 0) {
391 dev_err(wm831x->dev, "Failed to register miscdev: %d\n", ret);
392 goto err_gpio;
393 }
394
395 return 0;
396
397err_gpio:
398 if (update_gpio) {
399 gpio_free(update_gpio);
400 update_gpio = 0;
401 }
402err:
403 return ret;
404}
405
406static int __devexit wm831x_wdt_remove(struct platform_device *pdev)
407{
408 if (update_gpio) {
409 gpio_free(update_gpio);
410 update_gpio = 0;
411 }
412
413 misc_deregister(&wm831x_wdt_miscdev);
414
415 return 0;
416}
417
418static struct platform_driver wm831x_wdt_driver = {
419 .probe = wm831x_wdt_probe,
420 .remove = __devexit_p(wm831x_wdt_remove),
421 .driver = {
422 .name = "wm831x-watchdog",
423 },
424};
425
426static int __init wm831x_wdt_init(void)
427{
428 return platform_driver_register(&wm831x_wdt_driver);
429}
430module_init(wm831x_wdt_init);
431
432static void __exit wm831x_wdt_exit(void)
433{
434 platform_driver_unregister(&wm831x_wdt_driver);
435}
436module_exit(wm831x_wdt_exit);
437
438MODULE_AUTHOR("Mark Brown");
439MODULE_DESCRIPTION("WM831x Watchdog");
440MODULE_LICENSE("GPL");
441MODULE_ALIAS("platform:wm831x-watchdog");
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-21 04:39:12 -0500