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authorDaniel Vetter <daniel.vetter@ffwll.ch>2010-08-04 15:22:10 -0400
committerEric Anholt <eric@anholt.net>2010-08-09 14:24:30 -0400
commit6146b3d61925116e3fecce36c2fd873665bd6614 (patch)
treeab3993e2ce1503fdd0926e14e342ad5b09d37d58 /drivers
parent69d0b96c095468526009cb3104eee561c9252a84 (diff)
drm/i915: i8xx also doesn't like multiple oustanding pageflips
My i855GM suffers from a 80k/s interrupt storm without this. So add 2nd gen to the list of things that don't like more than one outstanding pageflip request. Furthermore I've changed the busy loop into a ringbuffer wait. Busy-loops that don't check whether the chip died are simply evil. And performance should actually improve, because there's usually a decent amount of rendering queued on the gpu, hopefully rendering that MI_WAIT into a noop by the time it's executed. The current code holds dev->struct_mutex while executing this loop, hence stalling all other gem activity anyway. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@kernel.org Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [anholt: resolved against conflict] Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ce7a46b6909b..22966bd9aa96 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5098,14 +5098,16 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
5098 work->pending_flip_obj = obj; 5098 work->pending_flip_obj = obj;
5099 5099
5100 if (intel_crtc->plane) 5100 if (intel_crtc->plane)
5101 flip_mask = I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT; 5101 flip_mask = MI_WAIT_FOR_PLANE_B_FLIP;
5102 else 5102 else
5103 flip_mask = I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT; 5103 flip_mask = MI_WAIT_FOR_PLANE_A_FLIP;
5104 5104
5105 /* Wait for any previous flip to finish */ 5105 if (IS_GEN3(dev) || IS_GEN2(dev)) {
5106 if (IS_GEN3(dev)) 5106 BEGIN_LP_RING(2);
5107 while (I915_READ(ISR) & flip_mask) 5107 OUT_RING(MI_WAIT_FOR_EVENT | flip_mask);
5108 ; 5108 OUT_RING(0);
5109 ADVANCE_LP_RING();
5110 }
5109 5111
5110 /* Offset into the new buffer for cases of shared fbs between CRTCs */ 5112 /* Offset into the new buffer for cases of shared fbs between CRTCs */
5111 offset = obj_priv->gtt_offset; 5113 offset = obj_priv->gtt_offset;