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authorRhyland Klein <rklein@nvidia.com>2012-05-08 14:42:38 -0400
committerSamuel Ortiz <sameo@linux.intel.com>2012-05-20 11:25:23 -0400
commit3f7e82759c692df473675ed06fb90b20f1f225c3 (patch)
treef8f120546e55def9cb88ff9a0b8e13d4b36bb342 /drivers
parent7ccfe9b1d58ef5cf8fdbd50b6ee2ae0e9aa9cb36 (diff)
mfd: Commonize tps65910 regmap access through header
This change removes the read/write callback functions in favor of common regmap accessors inside the header file. This change also makes use of regmap_read/write for single register access which maps better onto what this driver actually needs. Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpio/gpio-tps65910.c14
-rw-r--r--drivers/mfd/tps65910-irq.c34
-rw-r--r--drivers/mfd/tps65910.c40
-rw-r--r--drivers/regulator/tps65910-regulator.c88
4 files changed, 75 insertions, 101 deletions
diff --git a/drivers/gpio/gpio-tps65910.c b/drivers/gpio/gpio-tps65910.c
index 7eef648a3351..bc155f2509ba 100644
--- a/drivers/gpio/gpio-tps65910.c
+++ b/drivers/gpio/gpio-tps65910.c
@@ -23,9 +23,9 @@
23static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset) 23static int tps65910_gpio_get(struct gpio_chip *gc, unsigned offset)
24{ 24{
25 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); 25 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);
26 uint8_t val; 26 unsigned int val;
27 27
28 tps65910->read(tps65910, TPS65910_GPIO0 + offset, 1, &val); 28 tps65910_reg_read(tps65910, TPS65910_GPIO0 + offset, &val);
29 29
30 if (val & GPIO_STS_MASK) 30 if (val & GPIO_STS_MASK)
31 return 1; 31 return 1;
@@ -39,10 +39,10 @@ static void tps65910_gpio_set(struct gpio_chip *gc, unsigned offset,
39 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); 39 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);
40 40
41 if (value) 41 if (value)
42 tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset, 42 tps65910_reg_set_bits(tps65910, TPS65910_GPIO0 + offset,
43 GPIO_SET_MASK); 43 GPIO_SET_MASK);
44 else 44 else
45 tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset, 45 tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset,
46 GPIO_SET_MASK); 46 GPIO_SET_MASK);
47} 47}
48 48
@@ -54,7 +54,7 @@ static int tps65910_gpio_output(struct gpio_chip *gc, unsigned offset,
54 /* Set the initial value */ 54 /* Set the initial value */
55 tps65910_gpio_set(gc, offset, value); 55 tps65910_gpio_set(gc, offset, value);
56 56
57 return tps65910_set_bits(tps65910, TPS65910_GPIO0 + offset, 57 return tps65910_reg_set_bits(tps65910, TPS65910_GPIO0 + offset,
58 GPIO_CFG_MASK); 58 GPIO_CFG_MASK);
59} 59}
60 60
@@ -62,7 +62,7 @@ static int tps65910_gpio_input(struct gpio_chip *gc, unsigned offset)
62{ 62{
63 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio); 63 struct tps65910 *tps65910 = container_of(gc, struct tps65910, gpio);
64 64
65 return tps65910_clear_bits(tps65910, TPS65910_GPIO0 + offset, 65 return tps65910_reg_clear_bits(tps65910, TPS65910_GPIO0 + offset,
66 GPIO_CFG_MASK); 66 GPIO_CFG_MASK);
67} 67}
68 68
@@ -102,7 +102,7 @@ void tps65910_gpio_init(struct tps65910 *tps65910, int gpio_base)
102 int i; 102 int i;
103 for (i = 0; i < tps65910->gpio.ngpio; ++i) { 103 for (i = 0; i < tps65910->gpio.ngpio; ++i) {
104 if (board_data->en_gpio_sleep[i]) { 104 if (board_data->en_gpio_sleep[i]) {
105 ret = tps65910_set_bits(tps65910, 105 ret = tps65910_reg_set_bits(tps65910,
106 TPS65910_GPIO0 + i, GPIO_SLEEP_MASK); 106 TPS65910_GPIO0 + i, GPIO_SLEEP_MASK);
107 if (ret < 0) 107 if (ret < 0)
108 dev_warn(tps65910->dev, 108 dev_warn(tps65910->dev,
diff --git a/drivers/mfd/tps65910-irq.c b/drivers/mfd/tps65910-irq.c
index c9ed5c00a621..0f1ff7fbdc74 100644
--- a/drivers/mfd/tps65910-irq.c
+++ b/drivers/mfd/tps65910-irq.c
@@ -41,28 +41,28 @@ static inline int irq_to_tps65910_irq(struct tps65910 *tps65910,
41static irqreturn_t tps65910_irq(int irq, void *irq_data) 41static irqreturn_t tps65910_irq(int irq, void *irq_data)
42{ 42{
43 struct tps65910 *tps65910 = irq_data; 43 struct tps65910 *tps65910 = irq_data;
44 unsigned int reg;
44 u32 irq_sts; 45 u32 irq_sts;
45 u32 irq_mask; 46 u32 irq_mask;
46 u8 reg;
47 int i; 47 int i;
48 48
49 tps65910->read(tps65910, TPS65910_INT_STS, 1, &reg); 49 tps65910_reg_read(tps65910, TPS65910_INT_STS, &reg);
50 irq_sts = reg; 50 irq_sts = reg;
51 tps65910->read(tps65910, TPS65910_INT_STS2, 1, &reg); 51 tps65910_reg_read(tps65910, TPS65910_INT_STS2, &reg);
52 irq_sts |= reg << 8; 52 irq_sts |= reg << 8;
53 switch (tps65910_chip_id(tps65910)) { 53 switch (tps65910_chip_id(tps65910)) {
54 case TPS65911: 54 case TPS65911:
55 tps65910->read(tps65910, TPS65910_INT_STS3, 1, &reg); 55 tps65910_reg_read(tps65910, TPS65910_INT_STS3, &reg);
56 irq_sts |= reg << 16; 56 irq_sts |= reg << 16;
57 } 57 }
58 58
59 tps65910->read(tps65910, TPS65910_INT_MSK, 1, &reg); 59 tps65910_reg_read(tps65910, TPS65910_INT_MSK, &reg);
60 irq_mask = reg; 60 irq_mask = reg;
61 tps65910->read(tps65910, TPS65910_INT_MSK2, 1, &reg); 61 tps65910_reg_read(tps65910, TPS65910_INT_MSK2, &reg);
62 irq_mask |= reg << 8; 62 irq_mask |= reg << 8;
63 switch (tps65910_chip_id(tps65910)) { 63 switch (tps65910_chip_id(tps65910)) {
64 case TPS65911: 64 case TPS65911:
65 tps65910->read(tps65910, TPS65910_INT_MSK3, 1, &reg); 65 tps65910_reg_read(tps65910, TPS65910_INT_MSK3, &reg);
66 irq_mask |= reg << 16; 66 irq_mask |= reg << 16;
67 } 67 }
68 68
@@ -82,13 +82,13 @@ static irqreturn_t tps65910_irq(int irq, void *irq_data)
82 /* Write the STS register back to clear IRQs we handled */ 82 /* Write the STS register back to clear IRQs we handled */
83 reg = irq_sts & 0xFF; 83 reg = irq_sts & 0xFF;
84 irq_sts >>= 8; 84 irq_sts >>= 8;
85 tps65910->write(tps65910, TPS65910_INT_STS, 1, &reg); 85 tps65910_reg_write(tps65910, TPS65910_INT_STS, reg);
86 reg = irq_sts & 0xFF; 86 reg = irq_sts & 0xFF;
87 tps65910->write(tps65910, TPS65910_INT_STS2, 1, &reg); 87 tps65910_reg_write(tps65910, TPS65910_INT_STS2, reg);
88 switch (tps65910_chip_id(tps65910)) { 88 switch (tps65910_chip_id(tps65910)) {
89 case TPS65911: 89 case TPS65911:
90 reg = irq_sts >> 8; 90 reg = irq_sts >> 8;
91 tps65910->write(tps65910, TPS65910_INT_STS3, 1, &reg); 91 tps65910_reg_write(tps65910, TPS65910_INT_STS3, reg);
92 } 92 }
93 93
94 return IRQ_HANDLED; 94 return IRQ_HANDLED;
@@ -105,27 +105,27 @@ static void tps65910_irq_sync_unlock(struct irq_data *data)
105{ 105{
106 struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data); 106 struct tps65910 *tps65910 = irq_data_get_irq_chip_data(data);
107 u32 reg_mask; 107 u32 reg_mask;
108 u8 reg; 108 unsigned int reg;
109 109
110 tps65910->read(tps65910, TPS65910_INT_MSK, 1, &reg); 110 tps65910_reg_read(tps65910, TPS65910_INT_MSK, &reg);
111 reg_mask = reg; 111 reg_mask = reg;
112 tps65910->read(tps65910, TPS65910_INT_MSK2, 1, &reg); 112 tps65910_reg_read(tps65910, TPS65910_INT_MSK2, &reg);
113 reg_mask |= reg << 8; 113 reg_mask |= reg << 8;
114 switch (tps65910_chip_id(tps65910)) { 114 switch (tps65910_chip_id(tps65910)) {
115 case TPS65911: 115 case TPS65911:
116 tps65910->read(tps65910, TPS65910_INT_MSK3, 1, &reg); 116 tps65910_reg_read(tps65910, TPS65910_INT_MSK3, &reg);
117 reg_mask |= reg << 16; 117 reg_mask |= reg << 16;
118 } 118 }
119 119
120 if (tps65910->irq_mask != reg_mask) { 120 if (tps65910->irq_mask != reg_mask) {
121 reg = tps65910->irq_mask & 0xFF; 121 reg = tps65910->irq_mask & 0xFF;
122 tps65910->write(tps65910, TPS65910_INT_MSK, 1, &reg); 122 tps65910_reg_write(tps65910, TPS65910_INT_MSK, reg);
123 reg = tps65910->irq_mask >> 8 & 0xFF; 123 reg = tps65910->irq_mask >> 8 & 0xFF;
124 tps65910->write(tps65910, TPS65910_INT_MSK2, 1, &reg); 124 tps65910_reg_write(tps65910, TPS65910_INT_MSK2, reg);
125 switch (tps65910_chip_id(tps65910)) { 125 switch (tps65910_chip_id(tps65910)) {
126 case TPS65911: 126 case TPS65911:
127 reg = tps65910->irq_mask >> 16; 127 reg = tps65910->irq_mask >> 16;
128 tps65910->write(tps65910, TPS65910_INT_MSK3, 1, &reg); 128 tps65910_reg_write(tps65910, TPS65910_INT_MSK3, reg);
129 } 129 }
130 } 130 }
131 mutex_unlock(&tps65910->irq_lock); 131 mutex_unlock(&tps65910->irq_lock);
diff --git a/drivers/mfd/tps65910.c b/drivers/mfd/tps65910.c
index 7a55af921e25..7dffbe1a50c6 100644
--- a/drivers/mfd/tps65910.c
+++ b/drivers/mfd/tps65910.c
@@ -37,30 +37,6 @@ static struct mfd_cell tps65910s[] = {
37}; 37};
38 38
39 39
40static int tps65910_i2c_read(struct tps65910 *tps65910, u8 reg,
41 int bytes, void *dest)
42{
43 return regmap_bulk_read(tps65910->regmap, reg, dest, bytes);
44}
45
46static int tps65910_i2c_write(struct tps65910 *tps65910, u8 reg,
47 int bytes, void *src)
48{
49 return regmap_bulk_write(tps65910->regmap, reg, src, bytes);
50}
51
52int tps65910_set_bits(struct tps65910 *tps65910, u8 reg, u8 mask)
53{
54 return regmap_update_bits(tps65910->regmap, reg, mask, mask);
55}
56EXPORT_SYMBOL_GPL(tps65910_set_bits);
57
58int tps65910_clear_bits(struct tps65910 *tps65910, u8 reg, u8 mask)
59{
60 return regmap_update_bits(tps65910->regmap, reg, mask, 0);
61}
62EXPORT_SYMBOL_GPL(tps65910_clear_bits);
63
64static bool is_volatile_reg(struct device *dev, unsigned int reg) 40static bool is_volatile_reg(struct device *dev, unsigned int reg)
65{ 41{
66 struct tps65910 *tps65910 = dev_get_drvdata(dev); 42 struct tps65910 *tps65910 = dev_get_drvdata(dev);
@@ -102,7 +78,7 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910,
102 return 0; 78 return 0;
103 79
104 /* enabling SLEEP device state */ 80 /* enabling SLEEP device state */
105 ret = tps65910_set_bits(tps65910, TPS65910_DEVCTRL, 81 ret = tps65910_reg_set_bits(tps65910, TPS65910_DEVCTRL,
106 DEVCTRL_DEV_SLP_MASK); 82 DEVCTRL_DEV_SLP_MASK);
107 if (ret < 0) { 83 if (ret < 0) {
108 dev_err(dev, "set dev_slp failed: %d\n", ret); 84 dev_err(dev, "set dev_slp failed: %d\n", ret);
@@ -114,7 +90,8 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910,
114 return 0; 90 return 0;
115 91
116 if (pmic_pdata->slp_keepon->therm_keepon) { 92 if (pmic_pdata->slp_keepon->therm_keepon) {
117 ret = tps65910_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON, 93 ret = tps65910_reg_set_bits(tps65910,
94 TPS65910_SLEEP_KEEP_RES_ON,
118 SLEEP_KEEP_RES_ON_THERM_KEEPON_MASK); 95 SLEEP_KEEP_RES_ON_THERM_KEEPON_MASK);
119 if (ret < 0) { 96 if (ret < 0) {
120 dev_err(dev, "set therm_keepon failed: %d\n", ret); 97 dev_err(dev, "set therm_keepon failed: %d\n", ret);
@@ -123,7 +100,8 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910,
123 } 100 }
124 101
125 if (pmic_pdata->slp_keepon->clkout32k_keepon) { 102 if (pmic_pdata->slp_keepon->clkout32k_keepon) {
126 ret = tps65910_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON, 103 ret = tps65910_reg_set_bits(tps65910,
104 TPS65910_SLEEP_KEEP_RES_ON,
127 SLEEP_KEEP_RES_ON_CLKOUT32K_KEEPON_MASK); 105 SLEEP_KEEP_RES_ON_CLKOUT32K_KEEPON_MASK);
128 if (ret < 0) { 106 if (ret < 0) {
129 dev_err(dev, "set clkout32k_keepon failed: %d\n", ret); 107 dev_err(dev, "set clkout32k_keepon failed: %d\n", ret);
@@ -132,7 +110,8 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910,
132 } 110 }
133 111
134 if (pmic_pdata->slp_keepon->i2chs_keepon) { 112 if (pmic_pdata->slp_keepon->i2chs_keepon) {
135 ret = tps65910_set_bits(tps65910, TPS65910_SLEEP_KEEP_RES_ON, 113 ret = tps65910_reg_set_bits(tps65910,
114 TPS65910_SLEEP_KEEP_RES_ON,
136 SLEEP_KEEP_RES_ON_I2CHS_KEEPON_MASK); 115 SLEEP_KEEP_RES_ON_I2CHS_KEEPON_MASK);
137 if (ret < 0) { 116 if (ret < 0) {
138 dev_err(dev, "set i2chs_keepon failed: %d\n", ret); 117 dev_err(dev, "set i2chs_keepon failed: %d\n", ret);
@@ -143,7 +122,8 @@ static int __devinit tps65910_sleepinit(struct tps65910 *tps65910,
143 return 0; 122 return 0;
144 123
145disable_dev_slp: 124disable_dev_slp:
146 tps65910_clear_bits(tps65910, TPS65910_DEVCTRL, DEVCTRL_DEV_SLP_MASK); 125 tps65910_reg_clear_bits(tps65910, TPS65910_DEVCTRL,
126 DEVCTRL_DEV_SLP_MASK);
147 127
148err_sleep_init: 128err_sleep_init:
149 return ret; 129 return ret;
@@ -176,8 +156,6 @@ static __devinit int tps65910_i2c_probe(struct i2c_client *i2c,
176 tps65910->dev = &i2c->dev; 156 tps65910->dev = &i2c->dev;
177 tps65910->i2c_client = i2c; 157 tps65910->i2c_client = i2c;
178 tps65910->id = id->driver_data; 158 tps65910->id = id->driver_data;
179 tps65910->read = tps65910_i2c_read;
180 tps65910->write = tps65910_i2c_write;
181 mutex_init(&tps65910->io_mutex); 159 mutex_init(&tps65910->io_mutex);
182 160
183 tps65910->regmap = regmap_init_i2c(i2c, &tps65910_regmap_config); 161 tps65910->regmap = regmap_init_i2c(i2c, &tps65910_regmap_config);
diff --git a/drivers/regulator/tps65910-regulator.c b/drivers/regulator/tps65910-regulator.c
index 4a37c2b6367f..852b05b20de9 100644
--- a/drivers/regulator/tps65910-regulator.c
+++ b/drivers/regulator/tps65910-regulator.c
@@ -331,21 +331,16 @@ struct tps65910_reg {
331 331
332static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg) 332static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg)
333{ 333{
334 u8 val; 334 unsigned int val;
335 int err; 335 int err;
336 336
337 err = pmic->mfd->read(pmic->mfd, reg, 1, &val); 337 err = tps65910_reg_read(pmic->mfd, reg, &val);
338 if (err) 338 if (err)
339 return err; 339 return err;
340 340
341 return val; 341 return val;
342} 342}
343 343
344static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val)
345{
346 return pmic->mfd->write(pmic->mfd, reg, 1, &val);
347}
348
349static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg, 344static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
350 u8 set_mask, u8 clear_mask) 345 u8 set_mask, u8 clear_mask)
351{ 346{
@@ -362,7 +357,7 @@ static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg,
362 357
363 data &= ~clear_mask; 358 data &= ~clear_mask;
364 data |= set_mask; 359 data |= set_mask;
365 err = tps65910_write(pmic, reg, data); 360 err = tps65910_reg_write(pmic->mfd, reg, data);
366 if (err) 361 if (err)
367 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); 362 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
368 363
@@ -371,7 +366,7 @@ out:
371 return err; 366 return err;
372} 367}
373 368
374static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg) 369static int tps65910_reg_read_locked(struct tps65910_reg *pmic, u8 reg)
375{ 370{
376 int data; 371 int data;
377 372
@@ -385,13 +380,13 @@ static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg)
385 return data; 380 return data;
386} 381}
387 382
388static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val) 383static int tps65910_reg_write_locked(struct tps65910_reg *pmic, u8 reg, u8 val)
389{ 384{
390 int err; 385 int err;
391 386
392 mutex_lock(&pmic->mutex); 387 mutex_lock(&pmic->mutex);
393 388
394 err = tps65910_write(pmic, reg, val); 389 err = tps65910_reg_write(pmic->mfd, reg, val);
395 if (err < 0) 390 if (err < 0)
396 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); 391 dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg);
397 392
@@ -476,7 +471,7 @@ static int tps65910_is_enabled(struct regulator_dev *dev)
476 if (reg < 0) 471 if (reg < 0)
477 return reg; 472 return reg;
478 473
479 value = tps65910_reg_read(pmic, reg); 474 value = tps65910_reg_read_locked(pmic, reg);
480 if (value < 0) 475 if (value < 0)
481 return value; 476 return value;
482 477
@@ -493,7 +488,7 @@ static int tps65910_enable(struct regulator_dev *dev)
493 if (reg < 0) 488 if (reg < 0)
494 return reg; 489 return reg;
495 490
496 return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED); 491 return tps65910_reg_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
497} 492}
498 493
499static int tps65910_disable(struct regulator_dev *dev) 494static int tps65910_disable(struct regulator_dev *dev)
@@ -506,7 +501,7 @@ static int tps65910_disable(struct regulator_dev *dev)
506 if (reg < 0) 501 if (reg < 0)
507 return reg; 502 return reg;
508 503
509 return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED); 504 return tps65910_reg_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED);
510} 505}
511 506
512static int tps65910_enable_time(struct regulator_dev *dev) 507static int tps65910_enable_time(struct regulator_dev *dev)
@@ -532,9 +527,9 @@ static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode)
532 LDO_ST_MODE_BIT); 527 LDO_ST_MODE_BIT);
533 case REGULATOR_MODE_IDLE: 528 case REGULATOR_MODE_IDLE:
534 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT; 529 value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT;
535 return tps65910_set_bits(mfd, reg, value); 530 return tps65910_reg_set_bits(mfd, reg, value);
536 case REGULATOR_MODE_STANDBY: 531 case REGULATOR_MODE_STANDBY:
537 return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT); 532 return tps65910_reg_clear_bits(mfd, reg, LDO_ST_ON_BIT);
538 } 533 }
539 534
540 return -EINVAL; 535 return -EINVAL;
@@ -549,7 +544,7 @@ static unsigned int tps65910_get_mode(struct regulator_dev *dev)
549 if (reg < 0) 544 if (reg < 0)
550 return reg; 545 return reg;
551 546
552 value = tps65910_reg_read(pmic, reg); 547 value = tps65910_reg_read_locked(pmic, reg);
553 if (value < 0) 548 if (value < 0)
554 return value; 549 return value;
555 550
@@ -569,28 +564,28 @@ static int tps65910_get_voltage_dcdc_sel(struct regulator_dev *dev)
569 564
570 switch (id) { 565 switch (id) {
571 case TPS65910_REG_VDD1: 566 case TPS65910_REG_VDD1:
572 opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP); 567 opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_OP);
573 mult = tps65910_reg_read(pmic, TPS65910_VDD1); 568 mult = tps65910_reg_read_locked(pmic, TPS65910_VDD1);
574 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT; 569 mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT;
575 srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR); 570 srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD1_SR);
576 sr = opvsel & VDD1_OP_CMD_MASK; 571 sr = opvsel & VDD1_OP_CMD_MASK;
577 opvsel &= VDD1_OP_SEL_MASK; 572 opvsel &= VDD1_OP_SEL_MASK;
578 srvsel &= VDD1_SR_SEL_MASK; 573 srvsel &= VDD1_SR_SEL_MASK;
579 vselmax = 75; 574 vselmax = 75;
580 break; 575 break;
581 case TPS65910_REG_VDD2: 576 case TPS65910_REG_VDD2:
582 opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP); 577 opvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_OP);
583 mult = tps65910_reg_read(pmic, TPS65910_VDD2); 578 mult = tps65910_reg_read_locked(pmic, TPS65910_VDD2);
584 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT; 579 mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT;
585 srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR); 580 srvsel = tps65910_reg_read_locked(pmic, TPS65910_VDD2_SR);
586 sr = opvsel & VDD2_OP_CMD_MASK; 581 sr = opvsel & VDD2_OP_CMD_MASK;
587 opvsel &= VDD2_OP_SEL_MASK; 582 opvsel &= VDD2_OP_SEL_MASK;
588 srvsel &= VDD2_SR_SEL_MASK; 583 srvsel &= VDD2_SR_SEL_MASK;
589 vselmax = 75; 584 vselmax = 75;
590 break; 585 break;
591 case TPS65911_REG_VDDCTRL: 586 case TPS65911_REG_VDDCTRL:
592 opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP); 587 opvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_OP);
593 srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR); 588 srvsel = tps65910_reg_read_locked(pmic, TPS65911_VDDCTRL_SR);
594 sr = opvsel & VDDCTRL_OP_CMD_MASK; 589 sr = opvsel & VDDCTRL_OP_CMD_MASK;
595 opvsel &= VDDCTRL_OP_SEL_MASK; 590 opvsel &= VDDCTRL_OP_SEL_MASK;
596 srvsel &= VDDCTRL_SR_SEL_MASK; 591 srvsel &= VDDCTRL_SR_SEL_MASK;
@@ -630,7 +625,7 @@ static int tps65910_get_voltage(struct regulator_dev *dev)
630 if (reg < 0) 625 if (reg < 0)
631 return reg; 626 return reg;
632 627
633 value = tps65910_reg_read(pmic, reg); 628 value = tps65910_reg_read_locked(pmic, reg);
634 if (value < 0) 629 if (value < 0)
635 return value; 630 return value;
636 631
@@ -669,7 +664,7 @@ static int tps65911_get_voltage(struct regulator_dev *dev)
669 664
670 reg = pmic->get_ctrl_reg(id); 665 reg = pmic->get_ctrl_reg(id);
671 666
672 value = tps65910_reg_read(pmic, reg); 667 value = tps65910_reg_read_locked(pmic, reg);
673 668
674 switch (id) { 669 switch (id) {
675 case TPS65911_REG_LDO1: 670 case TPS65911_REG_LDO1:
@@ -728,7 +723,7 @@ static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
728 tps65910_modify_bits(pmic, TPS65910_VDD1, 723 tps65910_modify_bits(pmic, TPS65910_VDD1,
729 (dcdc_mult << VDD1_VGAIN_SEL_SHIFT), 724 (dcdc_mult << VDD1_VGAIN_SEL_SHIFT),
730 VDD1_VGAIN_SEL_MASK); 725 VDD1_VGAIN_SEL_MASK);
731 tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel); 726 tps65910_reg_write_locked(pmic, TPS65910_VDD1_OP, vsel);
732 break; 727 break;
733 case TPS65910_REG_VDD2: 728 case TPS65910_REG_VDD2:
734 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; 729 dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1;
@@ -739,11 +734,11 @@ static int tps65910_set_voltage_dcdc_sel(struct regulator_dev *dev,
739 tps65910_modify_bits(pmic, TPS65910_VDD2, 734 tps65910_modify_bits(pmic, TPS65910_VDD2,
740 (dcdc_mult << VDD2_VGAIN_SEL_SHIFT), 735 (dcdc_mult << VDD2_VGAIN_SEL_SHIFT),
741 VDD1_VGAIN_SEL_MASK); 736 VDD1_VGAIN_SEL_MASK);
742 tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel); 737 tps65910_reg_write_locked(pmic, TPS65910_VDD2_OP, vsel);
743 break; 738 break;
744 case TPS65911_REG_VDDCTRL: 739 case TPS65911_REG_VDDCTRL:
745 vsel = selector + 3; 740 vsel = selector + 3;
746 tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel); 741 tps65910_reg_write_locked(pmic, TPS65911_VDDCTRL_OP, vsel);
747 } 742 }
748 743
749 return 0; 744 return 0;
@@ -994,10 +989,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
994 989
995 /* External EN1 control */ 990 /* External EN1 control */
996 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) 991 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1)
997 ret = tps65910_set_bits(mfd, 992 ret = tps65910_reg_set_bits(mfd,
998 TPS65910_EN1_LDO_ASS + regoffs, bit_pos); 993 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
999 else 994 else
1000 ret = tps65910_clear_bits(mfd, 995 ret = tps65910_reg_clear_bits(mfd,
1001 TPS65910_EN1_LDO_ASS + regoffs, bit_pos); 996 TPS65910_EN1_LDO_ASS + regoffs, bit_pos);
1002 if (ret < 0) { 997 if (ret < 0) {
1003 dev_err(mfd->dev, 998 dev_err(mfd->dev,
@@ -1007,10 +1002,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
1007 1002
1008 /* External EN2 control */ 1003 /* External EN2 control */
1009 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) 1004 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2)
1010 ret = tps65910_set_bits(mfd, 1005 ret = tps65910_reg_set_bits(mfd,
1011 TPS65910_EN2_LDO_ASS + regoffs, bit_pos); 1006 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
1012 else 1007 else
1013 ret = tps65910_clear_bits(mfd, 1008 ret = tps65910_reg_clear_bits(mfd,
1014 TPS65910_EN2_LDO_ASS + regoffs, bit_pos); 1009 TPS65910_EN2_LDO_ASS + regoffs, bit_pos);
1015 if (ret < 0) { 1010 if (ret < 0) {
1016 dev_err(mfd->dev, 1011 dev_err(mfd->dev,
@@ -1022,10 +1017,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
1022 if ((tps65910_chip_id(mfd) == TPS65910) && 1017 if ((tps65910_chip_id(mfd) == TPS65910) &&
1023 (id >= TPS65910_REG_VDIG1)) { 1018 (id >= TPS65910_REG_VDIG1)) {
1024 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) 1019 if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3)
1025 ret = tps65910_set_bits(mfd, 1020 ret = tps65910_reg_set_bits(mfd,
1026 TPS65910_EN3_LDO_ASS + regoffs, bit_pos); 1021 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
1027 else 1022 else
1028 ret = tps65910_clear_bits(mfd, 1023 ret = tps65910_reg_clear_bits(mfd,
1029 TPS65910_EN3_LDO_ASS + regoffs, bit_pos); 1024 TPS65910_EN3_LDO_ASS + regoffs, bit_pos);
1030 if (ret < 0) { 1025 if (ret < 0) {
1031 dev_err(mfd->dev, 1026 dev_err(mfd->dev,
@@ -1037,10 +1032,10 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
1037 /* Return if no external control is selected */ 1032 /* Return if no external control is selected */
1038 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) { 1033 if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) {
1039 /* Clear all sleep controls */ 1034 /* Clear all sleep controls */
1040 ret = tps65910_clear_bits(mfd, 1035 ret = tps65910_reg_clear_bits(mfd,
1041 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); 1036 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
1042 if (!ret) 1037 if (!ret)
1043 ret = tps65910_clear_bits(mfd, 1038 ret = tps65910_reg_clear_bits(mfd,
1044 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); 1039 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1045 if (ret < 0) 1040 if (ret < 0)
1046 dev_err(mfd->dev, 1041 dev_err(mfd->dev,
@@ -1059,32 +1054,33 @@ static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic,
1059 (tps65910_chip_id(mfd) == TPS65911))) { 1054 (tps65910_chip_id(mfd) == TPS65911))) {
1060 int op_reg_add = pmic->get_ctrl_reg(id) + 1; 1055 int op_reg_add = pmic->get_ctrl_reg(id) + 1;
1061 int sr_reg_add = pmic->get_ctrl_reg(id) + 2; 1056 int sr_reg_add = pmic->get_ctrl_reg(id) + 2;
1062 int opvsel = tps65910_reg_read(pmic, op_reg_add); 1057 int opvsel = tps65910_reg_read_locked(pmic, op_reg_add);
1063 int srvsel = tps65910_reg_read(pmic, sr_reg_add); 1058 int srvsel = tps65910_reg_read_locked(pmic, sr_reg_add);
1064 if (opvsel & VDD1_OP_CMD_MASK) { 1059 if (opvsel & VDD1_OP_CMD_MASK) {
1065 u8 reg_val = srvsel & VDD1_OP_SEL_MASK; 1060 u8 reg_val = srvsel & VDD1_OP_SEL_MASK;
1066 ret = tps65910_reg_write(pmic, op_reg_add, reg_val); 1061 ret = tps65910_reg_write_locked(pmic, op_reg_add,
1062 reg_val);
1067 if (ret < 0) { 1063 if (ret < 0) {
1068 dev_err(mfd->dev, 1064 dev_err(mfd->dev,
1069 "Error in configuring op register\n"); 1065 "Error in configuring op register\n");
1070 return ret; 1066 return ret;
1071 } 1067 }
1072 } 1068 }
1073 ret = tps65910_reg_write(pmic, sr_reg_add, 0); 1069 ret = tps65910_reg_write_locked(pmic, sr_reg_add, 0);
1074 if (ret < 0) { 1070 if (ret < 0) {
1075 dev_err(mfd->dev, "Error in settting sr register\n"); 1071 dev_err(mfd->dev, "Error in settting sr register\n");
1076 return ret; 1072 return ret;
1077 } 1073 }
1078 } 1074 }
1079 1075
1080 ret = tps65910_clear_bits(mfd, 1076 ret = tps65910_reg_clear_bits(mfd,
1081 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); 1077 TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos);
1082 if (!ret) { 1078 if (!ret) {
1083 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) 1079 if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP)
1084 ret = tps65910_set_bits(mfd, 1080 ret = tps65910_reg_set_bits(mfd,
1085 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); 1081 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1086 else 1082 else
1087 ret = tps65910_clear_bits(mfd, 1083 ret = tps65910_reg_clear_bits(mfd,
1088 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); 1084 TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos);
1089 } 1085 }
1090 if (ret < 0) 1086 if (ret < 0)
@@ -1117,7 +1113,7 @@ static __devinit int tps65910_probe(struct platform_device *pdev)
1117 platform_set_drvdata(pdev, pmic); 1113 platform_set_drvdata(pdev, pmic);
1118 1114
1119 /* Give control of all register to control port */ 1115 /* Give control of all register to control port */
1120 tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL, 1116 tps65910_reg_set_bits(pmic->mfd, TPS65910_DEVCTRL,
1121 DEVCTRL_SR_CTL_I2C_SEL_MASK); 1117 DEVCTRL_SR_CTL_I2C_SEL_MASK);
1122 1118
1123 switch(tps65910_chip_id(tps65910)) { 1119 switch(tps65910_chip_id(tps65910)) {