diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2009-11-02 09:24:36 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-11-03 02:39:01 -0500 |
commit | 3f0e3ad72393db9c2932a2ca86cc1a49294bbc63 (patch) | |
tree | abba6a3c1d5cdb6a3fe05d79a78c45c41ae7bc71 /drivers | |
parent | f40386c8452f9eead9c5906bfffaaf59f3dc748f (diff) |
tg3: Convert PHY_ADDR => TG3_PHY_MII_ADDR
This patch renames the PHY_ADDR preprocessor definition. The following
patch will identify a new member on the MDIO bus, so we want this
preprocessor definition to be a little more descriptive.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/tg3.c | 51 | ||||
-rw-r--r-- | drivers/net/tg3.h | 2 |
2 files changed, 30 insertions, 23 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index b3c5d74022f2..1c53250e4007 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -937,7 +937,7 @@ static void tg3_mdio_config_5785(struct tg3 *tp) | |||
937 | u32 val; | 937 | u32 val; |
938 | struct phy_device *phydev; | 938 | struct phy_device *phydev; |
939 | 939 | ||
940 | phydev = tp->mdio_bus->phy_map[PHY_ADDR]; | 940 | phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]; |
941 | switch (phydev->drv->phy_id & phydev->drv->phy_id_mask) { | 941 | switch (phydev->drv->phy_id & phydev->drv->phy_id_mask) { |
942 | case TG3_PHY_ID_BCM50610: | 942 | case TG3_PHY_ID_BCM50610: |
943 | val = MAC_PHYCFG2_50610_LED_MODES; | 943 | val = MAC_PHYCFG2_50610_LED_MODES; |
@@ -1031,7 +1031,7 @@ static void tg3_mdio_start(struct tg3 *tp) | |||
1031 | if (is_serdes) | 1031 | if (is_serdes) |
1032 | tp->phy_addr += 7; | 1032 | tp->phy_addr += 7; |
1033 | } else | 1033 | } else |
1034 | tp->phy_addr = PHY_ADDR; | 1034 | tp->phy_addr = TG3_PHY_MII_ADDR; |
1035 | 1035 | ||
1036 | if ((tp->tg3_flags3 & TG3_FLG3_MDIOBUS_INITED) && | 1036 | if ((tp->tg3_flags3 & TG3_FLG3_MDIOBUS_INITED) && |
1037 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) | 1037 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785) |
@@ -1062,7 +1062,7 @@ static int tg3_mdio_init(struct tg3 *tp) | |||
1062 | tp->mdio_bus->read = &tg3_mdio_read; | 1062 | tp->mdio_bus->read = &tg3_mdio_read; |
1063 | tp->mdio_bus->write = &tg3_mdio_write; | 1063 | tp->mdio_bus->write = &tg3_mdio_write; |
1064 | tp->mdio_bus->reset = &tg3_mdio_reset; | 1064 | tp->mdio_bus->reset = &tg3_mdio_reset; |
1065 | tp->mdio_bus->phy_mask = ~(1 << PHY_ADDR); | 1065 | tp->mdio_bus->phy_mask = ~(1 << TG3_PHY_MII_ADDR); |
1066 | tp->mdio_bus->irq = &tp->mdio_irq[0]; | 1066 | tp->mdio_bus->irq = &tp->mdio_irq[0]; |
1067 | 1067 | ||
1068 | for (i = 0; i < PHY_MAX_ADDR; i++) | 1068 | for (i = 0; i < PHY_MAX_ADDR; i++) |
@@ -1084,7 +1084,7 @@ static int tg3_mdio_init(struct tg3 *tp) | |||
1084 | return i; | 1084 | return i; |
1085 | } | 1085 | } |
1086 | 1086 | ||
1087 | phydev = tp->mdio_bus->phy_map[PHY_ADDR]; | 1087 | phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]; |
1088 | 1088 | ||
1089 | if (!phydev || !phydev->drv) { | 1089 | if (!phydev || !phydev->drv) { |
1090 | printk(KERN_WARNING "%s: No PHY devices\n", tp->dev->name); | 1090 | printk(KERN_WARNING "%s: No PHY devices\n", tp->dev->name); |
@@ -1311,7 +1311,7 @@ static void tg3_setup_flow_control(struct tg3 *tp, u32 lcladv, u32 rmtadv) | |||
1311 | u32 old_tx_mode = tp->tx_mode; | 1311 | u32 old_tx_mode = tp->tx_mode; |
1312 | 1312 | ||
1313 | if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) | 1313 | if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) |
1314 | autoneg = tp->mdio_bus->phy_map[PHY_ADDR]->autoneg; | 1314 | autoneg = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]->autoneg; |
1315 | else | 1315 | else |
1316 | autoneg = tp->link_config.autoneg; | 1316 | autoneg = tp->link_config.autoneg; |
1317 | 1317 | ||
@@ -1348,7 +1348,7 @@ static void tg3_adjust_link(struct net_device *dev) | |||
1348 | u8 oldflowctrl, linkmesg = 0; | 1348 | u8 oldflowctrl, linkmesg = 0; |
1349 | u32 mac_mode, lcl_adv, rmt_adv; | 1349 | u32 mac_mode, lcl_adv, rmt_adv; |
1350 | struct tg3 *tp = netdev_priv(dev); | 1350 | struct tg3 *tp = netdev_priv(dev); |
1351 | struct phy_device *phydev = tp->mdio_bus->phy_map[PHY_ADDR]; | 1351 | struct phy_device *phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]; |
1352 | 1352 | ||
1353 | spin_lock_bh(&tp->lock); | 1353 | spin_lock_bh(&tp->lock); |
1354 | 1354 | ||
@@ -1434,7 +1434,7 @@ static int tg3_phy_init(struct tg3 *tp) | |||
1434 | /* Bring the PHY back to a known state. */ | 1434 | /* Bring the PHY back to a known state. */ |
1435 | tg3_bmcr_reset(tp); | 1435 | tg3_bmcr_reset(tp); |
1436 | 1436 | ||
1437 | phydev = tp->mdio_bus->phy_map[PHY_ADDR]; | 1437 | phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]; |
1438 | 1438 | ||
1439 | /* Attach the MAC to the PHY. */ | 1439 | /* Attach the MAC to the PHY. */ |
1440 | phydev = phy_connect(tp->dev, dev_name(&phydev->dev), tg3_adjust_link, | 1440 | phydev = phy_connect(tp->dev, dev_name(&phydev->dev), tg3_adjust_link, |
@@ -1461,7 +1461,7 @@ static int tg3_phy_init(struct tg3 *tp) | |||
1461 | SUPPORTED_Asym_Pause); | 1461 | SUPPORTED_Asym_Pause); |
1462 | break; | 1462 | break; |
1463 | default: | 1463 | default: |
1464 | phy_disconnect(tp->mdio_bus->phy_map[PHY_ADDR]); | 1464 | phy_disconnect(tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]); |
1465 | return -EINVAL; | 1465 | return -EINVAL; |
1466 | } | 1466 | } |
1467 | 1467 | ||
@@ -1479,7 +1479,7 @@ static void tg3_phy_start(struct tg3 *tp) | |||
1479 | if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)) | 1479 | if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)) |
1480 | return; | 1480 | return; |
1481 | 1481 | ||
1482 | phydev = tp->mdio_bus->phy_map[PHY_ADDR]; | 1482 | phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]; |
1483 | 1483 | ||
1484 | if (tp->link_config.phy_is_low_power) { | 1484 | if (tp->link_config.phy_is_low_power) { |
1485 | tp->link_config.phy_is_low_power = 0; | 1485 | tp->link_config.phy_is_low_power = 0; |
@@ -1499,13 +1499,13 @@ static void tg3_phy_stop(struct tg3 *tp) | |||
1499 | if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)) | 1499 | if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)) |
1500 | return; | 1500 | return; |
1501 | 1501 | ||
1502 | phy_stop(tp->mdio_bus->phy_map[PHY_ADDR]); | 1502 | phy_stop(tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]); |
1503 | } | 1503 | } |
1504 | 1504 | ||
1505 | static void tg3_phy_fini(struct tg3 *tp) | 1505 | static void tg3_phy_fini(struct tg3 *tp) |
1506 | { | 1506 | { |
1507 | if (tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED) { | 1507 | if (tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED) { |
1508 | phy_disconnect(tp->mdio_bus->phy_map[PHY_ADDR]); | 1508 | phy_disconnect(tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]); |
1509 | tp->tg3_flags3 &= ~TG3_FLG3_PHY_CONNECTED; | 1509 | tp->tg3_flags3 &= ~TG3_FLG3_PHY_CONNECTED; |
1510 | } | 1510 | } |
1511 | } | 1511 | } |
@@ -2474,7 +2474,7 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state) | |||
2474 | struct phy_device *phydev; | 2474 | struct phy_device *phydev; |
2475 | u32 phyid, advertising; | 2475 | u32 phyid, advertising; |
2476 | 2476 | ||
2477 | phydev = tp->mdio_bus->phy_map[PHY_ADDR]; | 2477 | phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]; |
2478 | 2478 | ||
2479 | tp->link_config.phy_is_low_power = 1; | 2479 | tp->link_config.phy_is_low_power = 1; |
2480 | 2480 | ||
@@ -9243,9 +9243,11 @@ static int tg3_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
9243 | struct tg3 *tp = netdev_priv(dev); | 9243 | struct tg3 *tp = netdev_priv(dev); |
9244 | 9244 | ||
9245 | if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) { | 9245 | if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) { |
9246 | struct phy_device *phydev; | ||
9246 | if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)) | 9247 | if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)) |
9247 | return -EAGAIN; | 9248 | return -EAGAIN; |
9248 | return phy_ethtool_gset(tp->mdio_bus->phy_map[PHY_ADDR], cmd); | 9249 | phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]; |
9250 | return phy_ethtool_gset(phydev, cmd); | ||
9249 | } | 9251 | } |
9250 | 9252 | ||
9251 | cmd->supported = (SUPPORTED_Autoneg); | 9253 | cmd->supported = (SUPPORTED_Autoneg); |
@@ -9284,9 +9286,11 @@ static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
9284 | struct tg3 *tp = netdev_priv(dev); | 9286 | struct tg3 *tp = netdev_priv(dev); |
9285 | 9287 | ||
9286 | if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) { | 9288 | if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) { |
9289 | struct phy_device *phydev; | ||
9287 | if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)) | 9290 | if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)) |
9288 | return -EAGAIN; | 9291 | return -EAGAIN; |
9289 | return phy_ethtool_sset(tp->mdio_bus->phy_map[PHY_ADDR], cmd); | 9292 | phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]; |
9293 | return phy_ethtool_sset(phydev, cmd); | ||
9290 | } | 9294 | } |
9291 | 9295 | ||
9292 | if (cmd->autoneg != AUTONEG_ENABLE && | 9296 | if (cmd->autoneg != AUTONEG_ENABLE && |
@@ -9469,7 +9473,7 @@ static int tg3_nway_reset(struct net_device *dev) | |||
9469 | if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) { | 9473 | if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) { |
9470 | if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)) | 9474 | if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)) |
9471 | return -EAGAIN; | 9475 | return -EAGAIN; |
9472 | r = phy_start_aneg(tp->mdio_bus->phy_map[PHY_ADDR]); | 9476 | r = phy_start_aneg(tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]); |
9473 | } else { | 9477 | } else { |
9474 | u32 bmcr; | 9478 | u32 bmcr; |
9475 | 9479 | ||
@@ -9588,7 +9592,7 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam | |||
9588 | u32 newadv; | 9592 | u32 newadv; |
9589 | struct phy_device *phydev; | 9593 | struct phy_device *phydev; |
9590 | 9594 | ||
9591 | phydev = tp->mdio_bus->phy_map[PHY_ADDR]; | 9595 | phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]; |
9592 | 9596 | ||
9593 | if (epause->rx_pause) { | 9597 | if (epause->rx_pause) { |
9594 | if (epause->tx_pause) | 9598 | if (epause->tx_pause) |
@@ -10568,9 +10572,11 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
10568 | int err; | 10572 | int err; |
10569 | 10573 | ||
10570 | if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) { | 10574 | if (tp->tg3_flags3 & TG3_FLG3_USE_PHYLIB) { |
10575 | struct phy_device *phydev; | ||
10571 | if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)) | 10576 | if (!(tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED)) |
10572 | return -EAGAIN; | 10577 | return -EAGAIN; |
10573 | return phy_mii_ioctl(tp->mdio_bus->phy_map[PHY_ADDR], data, cmd); | 10578 | phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]; |
10579 | return phy_mii_ioctl(phydev, data, cmd); | ||
10574 | } | 10580 | } |
10575 | 10581 | ||
10576 | switch(cmd) { | 10582 | switch(cmd) { |
@@ -14135,13 +14141,14 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
14135 | tg3_bus_string(tp, str), | 14141 | tg3_bus_string(tp, str), |
14136 | dev->dev_addr); | 14142 | dev->dev_addr); |
14137 | 14143 | ||
14138 | if (tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED) | 14144 | if (tp->tg3_flags3 & TG3_FLG3_PHY_CONNECTED) { |
14145 | struct phy_device *phydev; | ||
14146 | phydev = tp->mdio_bus->phy_map[TG3_PHY_MII_ADDR]; | ||
14139 | printk(KERN_INFO | 14147 | printk(KERN_INFO |
14140 | "%s: attached PHY driver [%s] (mii_bus:phy_addr=%s)\n", | 14148 | "%s: attached PHY driver [%s] (mii_bus:phy_addr=%s)\n", |
14141 | tp->dev->name, | 14149 | tp->dev->name, phydev->drv->name, |
14142 | tp->mdio_bus->phy_map[PHY_ADDR]->drv->name, | 14150 | dev_name(&phydev->dev)); |
14143 | dev_name(&tp->mdio_bus->phy_map[PHY_ADDR]->dev)); | 14151 | } else |
14144 | else | ||
14145 | printk(KERN_INFO | 14152 | printk(KERN_INFO |
14146 | "%s: attached PHY is %s (%s Ethernet) (WireSpeed[%d])\n", | 14153 | "%s: attached PHY is %s (%s Ethernet) (WireSpeed[%d])\n", |
14147 | tp->dev->name, tg3_phy_string(tp), | 14154 | tp->dev->name, tg3_phy_string(tp), |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index eb4ed82d71e0..40501cb3b359 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -1954,7 +1954,7 @@ | |||
1954 | #define NIC_SRAM_MBUF_POOL_SIZE5705 0x0000e000 | 1954 | #define NIC_SRAM_MBUF_POOL_SIZE5705 0x0000e000 |
1955 | 1955 | ||
1956 | /* Currently this is fixed. */ | 1956 | /* Currently this is fixed. */ |
1957 | #define PHY_ADDR 0x01 | 1957 | #define TG3_PHY_MII_ADDR 0x01 |
1958 | 1958 | ||
1959 | /* Tigon3 specific PHY MII registers. */ | 1959 | /* Tigon3 specific PHY MII registers. */ |
1960 | #define TG3_BMCR_SPEED1000 0x0040 | 1960 | #define TG3_BMCR_SPEED1000 0x0040 |